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Alexandre Belloni1aa15f42015-03-12 13:07:26 +01001/*
2 * Copyright (C) 2005 Ivan Kokshaysky
3 * Copyright (C) SAN People
4 *
5 * System Timer (ST) - System peripherals registers.
6 * Based on AT91RM9200 datasheet revision E.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#ifndef _LINUX_MFD_SYSCON_ATMEL_ST_H
15#define _LINUX_MFD_SYSCON_ATMEL_ST_H
16
17#include <linux/bitops.h>
18
19#define AT91_ST_CR 0x00 /* Control Register */
20#define AT91_ST_WDRST BIT(0) /* Watchdog Timer Restart */
21
22#define AT91_ST_PIMR 0x04 /* Period Interval Mode Register */
23#define AT91_ST_PIV 0xffff /* Period Interval Value */
24
25#define AT91_ST_WDMR 0x08 /* Watchdog Mode Register */
26#define AT91_ST_WDV 0xffff /* Watchdog Counter Value */
27#define AT91_ST_RSTEN BIT(16) /* Reset Enable */
28#define AT91_ST_EXTEN BIT(17) /* External Signal Assertion Enable */
29
30#define AT91_ST_RTMR 0x0c /* Real-time Mode Register */
31#define AT91_ST_RTPRES 0xffff /* Real-time Prescalar Value */
32
33#define AT91_ST_SR 0x10 /* Status Register */
34#define AT91_ST_PITS BIT(0) /* Period Interval Timer Status */
35#define AT91_ST_WDOVF BIT(1) /* Watchdog Overflow */
36#define AT91_ST_RTTINC BIT(2) /* Real-time Timer Increment */
37#define AT91_ST_ALMS BIT(3) /* Alarm Status */
38
39#define AT91_ST_IER 0x14 /* Interrupt Enable Register */
40#define AT91_ST_IDR 0x18 /* Interrupt Disable Register */
41#define AT91_ST_IMR 0x1c /* Interrupt Mask Register */
42
43#define AT91_ST_RTAR 0x20 /* Real-time Alarm Register */
44#define AT91_ST_ALMV 0xfffff /* Alarm Value */
45
46#define AT91_ST_CRTR 0x24 /* Current Real-time Register */
47#define AT91_ST_CRTV 0xfffff /* Current Real-Time Value */
48
49#endif /* _LINUX_MFD_SYSCON_ATMEL_ST_H */