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Kumar Galaa2f40cc2005-09-03 15:55:33 -07001/*
Kumar Galaa2f40cc2005-09-03 15:55:33 -07002 * Watchdog timer for PowerPC Book-E systems
3 *
4 * Author: Matthew McClintock
Kumar Gala4c8d3d92005-11-13 16:06:30 -08005 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
Kumar Galaa2f40cc2005-09-03 15:55:33 -07006 *
Timur Tabi112e7542011-02-08 17:39:46 -06007 * Copyright 2005, 2008, 2010-2011 Freescale Semiconductor Inc.
Kumar Galaa2f40cc2005-09-03 15:55:33 -07008 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14
Joe Perches27c766a2012-02-15 15:06:19 -080015#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16
Kumar Galaa2f40cc2005-09-03 15:55:33 -070017#include <linux/module.h>
Chen Gongf172ddc62008-04-29 16:42:05 +080018#include <linux/smp.h>
Kumar Galaa2f40cc2005-09-03 15:55:33 -070019#include <linux/watchdog.h>
20
21#include <asm/reg_booke.h>
Chris Friesendcfb7482009-08-12 12:02:46 -060022#include <asm/time.h>
23#include <asm/div64.h>
Kumar Galaa2f40cc2005-09-03 15:55:33 -070024
Dave Jiang40ebbcb2007-04-12 13:34:55 -070025/* If the kernel parameter wdt=1, the watchdog will be enabled at boot.
Kumar Galaa2f40cc2005-09-03 15:55:33 -070026 * Also, the wdt_period sets the watchdog timer period timeout.
27 * For E500 cpus the wdt_period sets which bit changing from 0->1 will
28 * trigger a watchog timeout. This watchdog timeout will occur 3 times, the
29 * first time nothing will happen, the second time a watchdog exception will
30 * occur, and the final time the board will reset.
31 */
32
Kumar Galaa2f40cc2005-09-03 15:55:33 -070033
Shaohui Xiebe0884c2012-05-11 13:33:40 +080034#ifdef CONFIG_PPC_FSL_BOOK3E
Chris Friesendcfb7482009-08-12 12:02:46 -060035#define WDTP(x) ((((x)&0x3)<<30)|(((x)&0x3c)<<15))
Luuk Paulussen0fb06572010-04-15 15:59:10 +120036#define WDTP_MASK (WDTP(0x3f))
Kumar Galaa2f40cc2005-09-03 15:55:33 -070037#else
38#define WDTP(x) (TCR_WP(x))
Matthias Fuchs0a0e9e02008-11-05 21:53:56 +010039#define WDTP_MASK (TCR_WP_MASK)
Kumar Galaa2f40cc2005-09-03 15:55:33 -070040#endif
41
Pranith Kumar62ce2542014-08-20 15:26:46 -040042static bool booke_wdt_enabled;
43module_param(booke_wdt_enabled, bool, 0);
44static int booke_wdt_period = CONFIG_BOOKE_WDT_DEFAULT_TIMEOUT;
45module_param(booke_wdt_period, int, 0);
Tang Yuantiand2deeba2014-05-08 10:04:26 +080046
Guenter Roeck52e5cc42013-02-05 12:14:23 -080047#ifdef CONFIG_PPC_FSL_BOOK3E
Chen Gongf172ddc62008-04-29 16:42:05 +080048
Chris Friesendcfb7482009-08-12 12:02:46 -060049/* For the specified period, determine the number of seconds
50 * corresponding to the reset time. There will be a watchdog
51 * exception at approximately 3/5 of this time.
52 *
53 * The formula to calculate this is given by:
54 * 2.5 * (2^(63-period+1)) / timebase_freq
55 *
56 * In order to simplify things, we assume that period is
57 * at least 1. This will still result in a very long timeout.
58 */
59static unsigned long long period_to_sec(unsigned int period)
60{
61 unsigned long long tmp = 1ULL << (64 - period);
62 unsigned long tmp2 = ppc_tb_freq;
63
64 /* tmp may be a very large number and we don't want to overflow,
65 * so divide the timebase freq instead of multiplying tmp
66 */
67 tmp2 = tmp2 / 5 * 2;
68
69 do_div(tmp, tmp2);
70 return tmp;
71}
72
73/*
74 * This procedure will find the highest period which will give a timeout
75 * greater than the one required. e.g. for a bus speed of 66666666 and
76 * and a parameter of 2 secs, then this procedure will return a value of 38.
77 */
78static unsigned int sec_to_period(unsigned int secs)
79{
80 unsigned int period;
81 for (period = 63; period > 0; period--) {
82 if (period_to_sec(period) >= secs)
83 return period;
84 }
85 return 0;
86}
87
Guenter Roeck52e5cc42013-02-05 12:14:23 -080088#define MAX_WDT_TIMEOUT period_to_sec(1)
89
90#else /* CONFIG_PPC_FSL_BOOK3E */
91
92static unsigned long long period_to_sec(unsigned int period)
93{
94 return period;
95}
96
97static unsigned int sec_to_period(unsigned int secs)
98{
99 return secs;
100}
101
102#define MAX_WDT_TIMEOUT 3 /* from Kconfig */
103
104#endif /* !CONFIG_PPC_FSL_BOOK3E */
105
Randy Vinson6ae98ed2010-12-06 14:02:23 -0700106static void __booke_wdt_set(void *data)
107{
108 u32 val;
Tang Yuantiand2deeba2014-05-08 10:04:26 +0800109 struct watchdog_device *wdog = data;
Randy Vinson6ae98ed2010-12-06 14:02:23 -0700110
111 val = mfspr(SPRN_TCR);
112 val &= ~WDTP_MASK;
Tang Yuantiand2deeba2014-05-08 10:04:26 +0800113 val |= WDTP(sec_to_period(wdog->timeout));
Randy Vinson6ae98ed2010-12-06 14:02:23 -0700114
115 mtspr(SPRN_TCR, val);
116}
117
Tang Yuantiand2deeba2014-05-08 10:04:26 +0800118static void booke_wdt_set(void *data)
Randy Vinson6ae98ed2010-12-06 14:02:23 -0700119{
Tang Yuantiand2deeba2014-05-08 10:04:26 +0800120 on_each_cpu(__booke_wdt_set, data, 0);
Randy Vinson6ae98ed2010-12-06 14:02:23 -0700121}
122
Chen Gongf172ddc62008-04-29 16:42:05 +0800123static void __booke_wdt_ping(void *data)
Stefan Roesef31909c2007-02-07 09:45:55 +0100124{
125 mtspr(SPRN_TSR, TSR_ENW|TSR_WIS);
126}
127
Guenter Roeck52e5cc42013-02-05 12:14:23 -0800128static int booke_wdt_ping(struct watchdog_device *wdog)
Chen Gongf172ddc62008-04-29 16:42:05 +0800129{
Ingo Molnarf6f88e92008-07-15 22:08:52 +0200130 on_each_cpu(__booke_wdt_ping, NULL, 0);
Guenter Roeck52e5cc42013-02-05 12:14:23 -0800131
132 return 0;
Chen Gongf172ddc62008-04-29 16:42:05 +0800133}
134
135static void __booke_wdt_enable(void *data)
Kumar Galaa2f40cc2005-09-03 15:55:33 -0700136{
137 u32 val;
Tang Yuantiand2deeba2014-05-08 10:04:26 +0800138 struct watchdog_device *wdog = data;
Kumar Galaa2f40cc2005-09-03 15:55:33 -0700139
Stefan Roesef31909c2007-02-07 09:45:55 +0100140 /* clear status before enabling watchdog */
Chen Gongf172ddc62008-04-29 16:42:05 +0800141 __booke_wdt_ping(NULL);
Kumar Galaa2f40cc2005-09-03 15:55:33 -0700142 val = mfspr(SPRN_TCR);
Matthias Fuchs0a0e9e02008-11-05 21:53:56 +0100143 val &= ~WDTP_MASK;
Tang Yuantiand2deeba2014-05-08 10:04:26 +0800144 val |= (TCR_WIE|TCR_WRC(WRC_CHIP)|WDTP(sec_to_period(wdog->timeout)));
Kumar Galaa2f40cc2005-09-03 15:55:33 -0700145
146 mtspr(SPRN_TCR, val);
147}
148
Timur Tabifbdd7142010-09-20 11:23:42 -0500149/**
150 * booke_wdt_disable - disable the watchdog on the given CPU
151 *
152 * This function is called on each CPU. It disables the watchdog on that CPU.
153 *
154 * TCR[WRC] cannot be changed once it has been set to non-zero, but we can
155 * effectively disable the watchdog by setting its period to the maximum value.
156 */
157static void __booke_wdt_disable(void *data)
158{
159 u32 val;
160
161 val = mfspr(SPRN_TCR);
162 val &= ~(TCR_WIE | WDTP_MASK);
163 mtspr(SPRN_TCR, val);
164
165 /* clear status to make sure nothing is pending */
166 __booke_wdt_ping(NULL);
167
168}
169
Guenter Roeck52e5cc42013-02-05 12:14:23 -0800170static int booke_wdt_start(struct watchdog_device *wdog)
171{
Tang Yuantiand2deeba2014-05-08 10:04:26 +0800172 on_each_cpu(__booke_wdt_enable, wdog, 0);
173 pr_debug("watchdog enabled (timeout = %u sec)\n", wdog->timeout);
174
Guenter Roeck52e5cc42013-02-05 12:14:23 -0800175 return 0;
176}
177
178static int booke_wdt_stop(struct watchdog_device *wdog)
179{
180 on_each_cpu(__booke_wdt_disable, NULL, 0);
Guenter Roeck52e5cc42013-02-05 12:14:23 -0800181 pr_debug("watchdog disabled\n");
182
183 return 0;
184}
185
186static int booke_wdt_set_timeout(struct watchdog_device *wdt_dev,
187 unsigned int timeout)
188{
189 if (timeout > MAX_WDT_TIMEOUT)
190 return -EINVAL;
Guenter Roeck52e5cc42013-02-05 12:14:23 -0800191 wdt_dev->timeout = timeout;
Tang Yuantiand2deeba2014-05-08 10:04:26 +0800192 booke_wdt_set(wdt_dev);
Guenter Roeck52e5cc42013-02-05 12:14:23 -0800193
194 return 0;
195}
196
197static struct watchdog_info booke_wdt_info = {
Chen Gongf172ddc62008-04-29 16:42:05 +0800198 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
199 .identity = "PowerPC Book-E Watchdog",
Kumar Galaa2f40cc2005-09-03 15:55:33 -0700200};
201
Guenter Roeck52e5cc42013-02-05 12:14:23 -0800202static struct watchdog_ops booke_wdt_ops = {
Chen Gongf172ddc62008-04-29 16:42:05 +0800203 .owner = THIS_MODULE,
Guenter Roeck52e5cc42013-02-05 12:14:23 -0800204 .start = booke_wdt_start,
205 .stop = booke_wdt_stop,
206 .ping = booke_wdt_ping,
207 .set_timeout = booke_wdt_set_timeout,
Kumar Galaa2f40cc2005-09-03 15:55:33 -0700208};
209
Guenter Roeck52e5cc42013-02-05 12:14:23 -0800210static struct watchdog_device booke_wdt_dev = {
211 .info = &booke_wdt_info,
212 .ops = &booke_wdt_ops,
213 .min_timeout = 1,
214 .max_timeout = 0xFFFF
Kumar Galaa2f40cc2005-09-03 15:55:33 -0700215};
216
217static void __exit booke_wdt_exit(void)
218{
Guenter Roeck52e5cc42013-02-05 12:14:23 -0800219 watchdog_unregister_device(&booke_wdt_dev);
Kumar Galaa2f40cc2005-09-03 15:55:33 -0700220}
221
Kumar Galaa2f40cc2005-09-03 15:55:33 -0700222static int __init booke_wdt_init(void)
223{
224 int ret = 0;
Guenter Roeck52e5cc42013-02-05 12:14:23 -0800225 bool nowayout = WATCHDOG_NOWAYOUT;
Kumar Galaa2f40cc2005-09-03 15:55:33 -0700226
Joe Perches27c766a2012-02-15 15:06:19 -0800227 pr_info("powerpc book-e watchdog driver loaded\n");
Guenter Roeck52e5cc42013-02-05 12:14:23 -0800228 booke_wdt_info.firmware_version = cur_cpu_spec->pvr_value;
229 booke_wdt_set_timeout(&booke_wdt_dev,
Tang Yuantiand2deeba2014-05-08 10:04:26 +0800230 period_to_sec(booke_wdt_period));
Guenter Roeck52e5cc42013-02-05 12:14:23 -0800231 watchdog_set_nowayout(&booke_wdt_dev, nowayout);
232 if (booke_wdt_enabled)
Tang Yuantiand2deeba2014-05-08 10:04:26 +0800233 booke_wdt_start(&booke_wdt_dev);
Kumar Galaa2f40cc2005-09-03 15:55:33 -0700234
Guenter Roeck52e5cc42013-02-05 12:14:23 -0800235 ret = watchdog_register_device(&booke_wdt_dev);
Kumar Galaa2f40cc2005-09-03 15:55:33 -0700236
237 return ret;
238}
Timur Tabifbdd7142010-09-20 11:23:42 -0500239
240module_init(booke_wdt_init);
241module_exit(booke_wdt_exit);
242
Pranith Kumar62ce2542014-08-20 15:26:46 -0400243MODULE_ALIAS("booke_wdt");
Timur Tabifbdd7142010-09-20 11:23:42 -0500244MODULE_DESCRIPTION("PowerPC Book-E watchdog driver");
245MODULE_LICENSE("GPL");