blob: 09d0d638c987f0ad40e90ece21a33adc6332c65c [file] [log] [blame]
Hariram Purushothamandc4402e2017-03-28 20:41:43 -07001/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#ifndef _CAM_CDM_UTIL_H_
14#define _CAM_CDM_UTIL_H_
15
16#define CAM_CDM_SW_CMD_COUNT 2
17#define CAM_CMD_LENGTH_MASK 0xFFFF
18#define CAM_CDM_COMMAND_OFFSET 24
19
20#define CAM_CDM_DMI_DATA_HI_OFFSET 8
21#define CAM_CDM_DMI_DATA_LO_OFFSET 12
22
23enum cam_cdm_command {
24 CAM_CDM_CMD_UNUSED = 0x0,
25 CAM_CDM_CMD_DMI = 0x1,
26 CAM_CDM_CMD_NOT_DEFINED = 0x2,
27 CAM_CDM_CMD_REG_CONT = 0x3,
28 CAM_CDM_CMD_REG_RANDOM = 0x4,
29 CAM_CDM_CMD_BUFF_INDIRECT = 0x5,
30 CAM_CDM_CMD_GEN_IRQ = 0x6,
31 CAM_CDM_CMD_WAIT_EVENT = 0x7,
32 CAM_CDM_CMD_CHANGE_BASE = 0x8,
33 CAM_CDM_CMD_PERF_CTRL = 0x9,
34 CAM_CDM_CMD_DMI_32 = 0xa,
35 CAM_CDM_CMD_DMI_64 = 0xb,
36 CAM_CDM_CMD_PRIVATE_BASE = 0xc,
37 CAM_CDM_CMD_SWD_DMI_32 = (CAM_CDM_CMD_PRIVATE_BASE + 0x64),
38 CAM_CDM_CMD_SWD_DMI_64 = (CAM_CDM_CMD_PRIVATE_BASE + 0x65),
39 CAM_CDM_CMD_PRIVATE_BASE_MAX = 0x7F
40};
41
42/**
43 * struct cam_cdm_utils_ops - Camera CDM util ops
44 *
45 * @cdm_get_cmd_header_size: Returns the size of the given command header
46 * in DWORDs.
47 * @command Command ID
48 * @return Size of the command in DWORDs
49 *
50 * @cdm_required_size_reg_continuous: Calculates the size of a reg-continuous
51 * command in dwords.
52 * @numVals Number of continuous values
53 * @return Size in dwords
54 *
55 * @cdm_required_size_reg_random: Calculates the size of a reg-random command
56 * in dwords.
57 * @numRegVals Number of register/value pairs
58 * @return Size in dwords
59 *
60 * @cdm_required_size_dmi: Calculates the size of a DMI command in dwords.
61 * @return Size in dwords
62 *
63 * @cdm_required_size_genirq: Calculates size of a Genirq command in dwords.
64 * @return Size in dwords
65 *
66 * @cdm_required_size_indirect: Calculates the size of an indirect command
67 * in dwords.
68 * @return Size in dwords
69 *
70 * @cdm_required_size_changebase: Calculates the size of a change-base command
71 * in dwords.
72 * @return Size in dwords
73 *
74 * @cdm_offsetof_dmi_addr: Returns the offset of address field in the DMI
75 * command header.
76 * @return Offset of addr field
77 *
78 * @cdm_offsetof_indirect_addr: Returns the offset of address field in the
79 * indirect command header.
80 * @return Offset of addr field
81 *
82 * @cdm_write_regcontinuous: Writes a command into the command buffer.
83 * @pCmdBuffer: Pointer to command buffer
84 * @reg: Beginning of the register address range where
85 * values will be written.
86 * @numVals: Number of values (registers) that will be written
87 * @pVals : An array of values that will be written
88 * @return Pointer in command buffer pointing past the written commands
89 *
90 * @cdm_write_regrandom: Writes a command into the command buffer in
91 * register/value pairs.
92 * @pCmdBuffer: Pointer to command buffer
93 * @numRegVals: Number of register/value pairs that will be written
94 * @pRegVals: An array of register/value pairs that will be written
95 * The even indices are registers and the odd indices
96 * arevalues, e.g., {reg1, val1, reg2, val2, ...}.
97 * @return Pointer in command buffer pointing past the written commands
98 *
99 * @cdm_write_dmi: Writes a DMI command into the command bufferM.
100 * @pCmdBuffer: Pointer to command buffer
101 * @dmiCmd: DMI command
102 * @DMIAddr: Address of the DMI
103 * @DMISel: Selected bank that the DMI will write to
104 * @length: Size of data in bytes
105 * @return Pointer in command buffer pointing past the written commands
106 *
107 * @cdm_write_indirect: Writes a indirect command into the command buffer.
108 * @pCmdBuffer: Pointer to command buffer
109 * @indirectBufferAddr: Device address of the indirect cmd buffer.
110 * @length: Size of data in bytes
111 * @return Pointer in command buffer pointing past the written commands
112 *
113 * @cdm_write_changebase: Writes a changing CDM (address) base command into
114 * the command buffer.
115 * @pCmdBuffer: Pointer to command buffer
116 * @base: New base (device) address
117 * @return Pointer in command buffer pointing past the written commands
118 *
119 * @cdm_write_genirq: Writes a gen irq command into the command buffer.
120 * @pCmdBuffer: Pointer to command buffer
121 * @userdata: userdata or cookie return by hardware during irq.
122 */
123struct cam_cdm_utils_ops {
124uint32_t (*cdm_get_cmd_header_size)(unsigned int command);
125uint32_t (*cdm_required_size_reg_continuous)(uint32_t numVals);
126uint32_t (*cdm_required_size_reg_random)(uint32_t numRegVals);
127uint32_t (*cdm_required_size_dmi)(void);
128uint32_t (*cdm_required_size_genirq)(void);
129uint32_t (*cdm_required_size_indirect)(void);
130uint32_t (*cdm_required_size_changebase)(void);
131uint32_t (*cdm_offsetof_dmi_addr)(void);
132uint32_t (*cdm_offsetof_indirect_addr)(void);
133uint32_t* (*cdm_write_regcontinuous)(
134 uint32_t *pCmdBuffer,
135 uint32_t reg,
136 uint32_t numVals,
137 uint32_t *pVals);
138uint32_t *(*cdm_write_regrandom)(
139 uint32_t *pCmdBuffer,
140 uint32_t numRegVals,
141 uint32_t *pRegVals);
142uint32_t *(*cdm_write_dmi)(
143 uint32_t *pCmdBuffer,
144 uint8_t dmiCmd,
145 uint32_t DMIAddr,
146 uint8_t DMISel,
147 uint32_t dmiBufferAddr,
148 uint32_t length);
149uint32_t *(*cdm_write_indirect)(
150 uint32_t *pCmdBuffer,
151 uint32_t indirectBufferAddr,
152 uint32_t length);
153uint32_t *(*cdm_write_changebase)(
154 uint32_t *pCmdBuffer,
155 uint32_t base);
156void (*cdm_write_genirq)(
157 uint32_t *pCmdBuffer,
158 uint32_t userdata);
159};
160
161#endif /* _CAM_CDM_UTIL_H_ */