Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) ST-Ericsson AB 2010 |
| 3 | * Contact: Sjur Brendeland / sjur.brandeland@stericsson.com |
| 4 | * Author: Daniel Martensson / daniel.martensson@stericsson.com |
| 5 | * Dmitry.Tarnyagin / dmitry.tarnyagin@stericsson.com |
| 6 | * License terms: GNU General Public License (GPL) version 2. |
| 7 | */ |
| 8 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 9 | #include <linux/init.h> |
| 10 | #include <linux/module.h> |
| 11 | #include <linux/device.h> |
| 12 | #include <linux/platform_device.h> |
| 13 | #include <linux/netdevice.h> |
| 14 | #include <linux/string.h> |
| 15 | #include <linux/list.h> |
| 16 | #include <linux/interrupt.h> |
| 17 | #include <linux/delay.h> |
| 18 | #include <linux/sched.h> |
| 19 | #include <linux/if_arp.h> |
| 20 | #include <linux/timer.h> |
Daniel Martensson | 5bbed92 | 2011-10-13 11:29:28 +0000 | [diff] [blame] | 21 | #include <linux/rtnetlink.h> |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 22 | #include <linux/pkt_sched.h> |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 23 | #include <net/caif/caif_layer.h> |
| 24 | #include <net/caif/caif_hsi.h> |
| 25 | |
| 26 | MODULE_LICENSE("GPL"); |
| 27 | MODULE_AUTHOR("Daniel Martensson<daniel.martensson@stericsson.com>"); |
| 28 | MODULE_DESCRIPTION("CAIF HSI driver"); |
| 29 | |
| 30 | /* Returns the number of padding bytes for alignment. */ |
| 31 | #define PAD_POW2(x, pow) ((((x)&((pow)-1)) == 0) ? 0 :\ |
| 32 | (((pow)-((x)&((pow)-1))))) |
| 33 | |
Dmitry Tarnyagin | 28bd204 | 2011-10-13 11:29:27 +0000 | [diff] [blame] | 34 | static int inactivity_timeout = 1000; |
| 35 | module_param(inactivity_timeout, int, S_IRUGO | S_IWUSR); |
| 36 | MODULE_PARM_DESC(inactivity_timeout, "Inactivity timeout on HSI, ms."); |
| 37 | |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 38 | static int aggregation_timeout = 1; |
| 39 | module_param(aggregation_timeout, int, S_IRUGO | S_IWUSR); |
| 40 | MODULE_PARM_DESC(aggregation_timeout, "Aggregation timeout on HSI, ms."); |
| 41 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 42 | /* |
| 43 | * HSI padding options. |
| 44 | * Warning: must be a base of 2 (& operation used) and can not be zero ! |
| 45 | */ |
| 46 | static int hsi_head_align = 4; |
| 47 | module_param(hsi_head_align, int, S_IRUGO); |
| 48 | MODULE_PARM_DESC(hsi_head_align, "HSI head alignment."); |
| 49 | |
| 50 | static int hsi_tail_align = 4; |
| 51 | module_param(hsi_tail_align, int, S_IRUGO); |
| 52 | MODULE_PARM_DESC(hsi_tail_align, "HSI tail alignment."); |
| 53 | |
| 54 | /* |
| 55 | * HSI link layer flowcontrol thresholds. |
| 56 | * Warning: A high threshold value migth increase throughput but it will at |
| 57 | * the same time prevent channel prioritization and increase the risk of |
| 58 | * flooding the modem. The high threshold should be above the low. |
| 59 | */ |
| 60 | static int hsi_high_threshold = 100; |
| 61 | module_param(hsi_high_threshold, int, S_IRUGO); |
| 62 | MODULE_PARM_DESC(hsi_high_threshold, "HSI high threshold (FLOW OFF)."); |
| 63 | |
| 64 | static int hsi_low_threshold = 50; |
| 65 | module_param(hsi_low_threshold, int, S_IRUGO); |
| 66 | MODULE_PARM_DESC(hsi_low_threshold, "HSI high threshold (FLOW ON)."); |
| 67 | |
| 68 | #define ON 1 |
| 69 | #define OFF 0 |
| 70 | |
| 71 | /* |
| 72 | * Threshold values for the HSI packet queue. Flowcontrol will be asserted |
| 73 | * when the number of packets exceeds HIGH_WATER_MARK. It will not be |
| 74 | * de-asserted before the number of packets drops below LOW_WATER_MARK. |
| 75 | */ |
| 76 | #define LOW_WATER_MARK hsi_low_threshold |
| 77 | #define HIGH_WATER_MARK hsi_high_threshold |
| 78 | |
| 79 | static LIST_HEAD(cfhsi_list); |
| 80 | static spinlock_t cfhsi_list_lock; |
| 81 | |
| 82 | static void cfhsi_inactivity_tout(unsigned long arg) |
| 83 | { |
| 84 | struct cfhsi *cfhsi = (struct cfhsi *)arg; |
| 85 | |
| 86 | dev_dbg(&cfhsi->ndev->dev, "%s.\n", |
| 87 | __func__); |
| 88 | |
| 89 | /* Schedule power down work queue. */ |
| 90 | if (!test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) |
| 91 | queue_work(cfhsi->wq, &cfhsi->wake_down_work); |
| 92 | } |
| 93 | |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 94 | static void cfhsi_update_aggregation_stats(struct cfhsi *cfhsi, |
| 95 | const struct sk_buff *skb, |
| 96 | int direction) |
| 97 | { |
| 98 | struct caif_payload_info *info; |
| 99 | int hpad, tpad, len; |
| 100 | |
| 101 | info = (struct caif_payload_info *)&skb->cb; |
| 102 | hpad = 1 + PAD_POW2((info->hdr_len + 1), hsi_head_align); |
| 103 | tpad = PAD_POW2((skb->len + hpad), hsi_tail_align); |
| 104 | len = skb->len + hpad + tpad; |
| 105 | |
| 106 | if (direction > 0) |
| 107 | cfhsi->aggregation_len += len; |
| 108 | else if (direction < 0) |
| 109 | cfhsi->aggregation_len -= len; |
| 110 | } |
| 111 | |
| 112 | static bool cfhsi_can_send_aggregate(struct cfhsi *cfhsi) |
| 113 | { |
| 114 | int i; |
| 115 | |
| 116 | if (cfhsi->aggregation_timeout < 0) |
| 117 | return true; |
| 118 | |
| 119 | for (i = 0; i < CFHSI_PRIO_BEBK; ++i) { |
| 120 | if (cfhsi->qhead[i].qlen) |
| 121 | return true; |
| 122 | } |
| 123 | |
| 124 | /* TODO: Use aggregation_len instead */ |
| 125 | if (cfhsi->qhead[CFHSI_PRIO_BEBK].qlen >= CFHSI_MAX_PKTS) |
| 126 | return true; |
| 127 | |
| 128 | return false; |
| 129 | } |
| 130 | |
| 131 | static struct sk_buff *cfhsi_dequeue(struct cfhsi *cfhsi) |
| 132 | { |
| 133 | struct sk_buff *skb; |
| 134 | int i; |
| 135 | |
| 136 | for (i = 0; i < CFHSI_PRIO_LAST; ++i) { |
| 137 | skb = skb_dequeue(&cfhsi->qhead[i]); |
| 138 | if (skb) |
| 139 | break; |
| 140 | } |
| 141 | |
| 142 | return skb; |
| 143 | } |
| 144 | |
| 145 | static int cfhsi_tx_queue_len(struct cfhsi *cfhsi) |
| 146 | { |
| 147 | int i, len = 0; |
| 148 | for (i = 0; i < CFHSI_PRIO_LAST; ++i) |
| 149 | len += skb_queue_len(&cfhsi->qhead[i]); |
| 150 | return len; |
| 151 | } |
| 152 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 153 | static void cfhsi_abort_tx(struct cfhsi *cfhsi) |
| 154 | { |
| 155 | struct sk_buff *skb; |
| 156 | |
| 157 | for (;;) { |
| 158 | spin_lock_bh(&cfhsi->lock); |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 159 | skb = cfhsi_dequeue(cfhsi); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 160 | if (!skb) |
| 161 | break; |
| 162 | |
| 163 | cfhsi->ndev->stats.tx_errors++; |
| 164 | cfhsi->ndev->stats.tx_dropped++; |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 165 | cfhsi_update_aggregation_stats(cfhsi, skb, -1); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 166 | spin_unlock_bh(&cfhsi->lock); |
| 167 | kfree_skb(skb); |
| 168 | } |
| 169 | cfhsi->tx_state = CFHSI_TX_STATE_IDLE; |
| 170 | if (!test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 171 | mod_timer(&cfhsi->inactivity_timer, |
Dmitry Tarnyagin | 28bd204 | 2011-10-13 11:29:27 +0000 | [diff] [blame] | 172 | jiffies + cfhsi->inactivity_timeout); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 173 | spin_unlock_bh(&cfhsi->lock); |
| 174 | } |
| 175 | |
| 176 | static int cfhsi_flush_fifo(struct cfhsi *cfhsi) |
| 177 | { |
| 178 | char buffer[32]; /* Any reasonable value */ |
| 179 | size_t fifo_occupancy; |
| 180 | int ret; |
| 181 | |
| 182 | dev_dbg(&cfhsi->ndev->dev, "%s.\n", |
| 183 | __func__); |
| 184 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 185 | do { |
| 186 | ret = cfhsi->dev->cfhsi_fifo_occupancy(cfhsi->dev, |
| 187 | &fifo_occupancy); |
| 188 | if (ret) { |
| 189 | dev_warn(&cfhsi->ndev->dev, |
| 190 | "%s: can't get FIFO occupancy: %d.\n", |
| 191 | __func__, ret); |
| 192 | break; |
| 193 | } else if (!fifo_occupancy) |
| 194 | /* No more data, exitting normally */ |
| 195 | break; |
| 196 | |
| 197 | fifo_occupancy = min(sizeof(buffer), fifo_occupancy); |
| 198 | set_bit(CFHSI_FLUSH_FIFO, &cfhsi->bits); |
| 199 | ret = cfhsi->dev->cfhsi_rx(buffer, fifo_occupancy, |
| 200 | cfhsi->dev); |
| 201 | if (ret) { |
| 202 | clear_bit(CFHSI_FLUSH_FIFO, &cfhsi->bits); |
| 203 | dev_warn(&cfhsi->ndev->dev, |
| 204 | "%s: can't read data: %d.\n", |
| 205 | __func__, ret); |
| 206 | break; |
| 207 | } |
| 208 | |
| 209 | ret = 5 * HZ; |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 210 | ret = wait_event_interruptible_timeout(cfhsi->flush_fifo_wait, |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 211 | !test_bit(CFHSI_FLUSH_FIFO, &cfhsi->bits), ret); |
| 212 | |
| 213 | if (ret < 0) { |
| 214 | dev_warn(&cfhsi->ndev->dev, |
| 215 | "%s: can't wait for flush complete: %d.\n", |
| 216 | __func__, ret); |
| 217 | break; |
| 218 | } else if (!ret) { |
| 219 | ret = -ETIMEDOUT; |
| 220 | dev_warn(&cfhsi->ndev->dev, |
| 221 | "%s: timeout waiting for flush complete.\n", |
| 222 | __func__); |
| 223 | break; |
| 224 | } |
| 225 | } while (1); |
| 226 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 227 | return ret; |
| 228 | } |
| 229 | |
| 230 | static int cfhsi_tx_frm(struct cfhsi_desc *desc, struct cfhsi *cfhsi) |
| 231 | { |
| 232 | int nfrms = 0; |
| 233 | int pld_len = 0; |
| 234 | struct sk_buff *skb; |
| 235 | u8 *pfrm = desc->emb_frm + CFHSI_MAX_EMB_FRM_SZ; |
| 236 | |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 237 | skb = cfhsi_dequeue(cfhsi); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 238 | if (!skb) |
| 239 | return 0; |
| 240 | |
sjur.brandeland@stericsson.com | 94230fe | 2011-10-13 11:29:22 +0000 | [diff] [blame] | 241 | /* Clear offset. */ |
| 242 | desc->offset = 0; |
| 243 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 244 | /* Check if we can embed a CAIF frame. */ |
| 245 | if (skb->len < CFHSI_MAX_EMB_FRM_SZ) { |
| 246 | struct caif_payload_info *info; |
| 247 | int hpad = 0; |
| 248 | int tpad = 0; |
| 249 | |
| 250 | /* Calculate needed head alignment and tail alignment. */ |
| 251 | info = (struct caif_payload_info *)&skb->cb; |
| 252 | |
| 253 | hpad = 1 + PAD_POW2((info->hdr_len + 1), hsi_head_align); |
| 254 | tpad = PAD_POW2((skb->len + hpad), hsi_tail_align); |
| 255 | |
| 256 | /* Check if frame still fits with added alignment. */ |
| 257 | if ((skb->len + hpad + tpad) <= CFHSI_MAX_EMB_FRM_SZ) { |
| 258 | u8 *pemb = desc->emb_frm; |
| 259 | desc->offset = CFHSI_DESC_SHORT_SZ; |
| 260 | *pemb = (u8)(hpad - 1); |
| 261 | pemb += hpad; |
| 262 | |
| 263 | /* Update network statistics. */ |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 264 | spin_lock_bh(&cfhsi->lock); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 265 | cfhsi->ndev->stats.tx_packets++; |
| 266 | cfhsi->ndev->stats.tx_bytes += skb->len; |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 267 | cfhsi_update_aggregation_stats(cfhsi, skb, -1); |
| 268 | spin_unlock_bh(&cfhsi->lock); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 269 | |
| 270 | /* Copy in embedded CAIF frame. */ |
| 271 | skb_copy_bits(skb, 0, pemb, skb->len); |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 272 | |
| 273 | /* Consume the SKB */ |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 274 | consume_skb(skb); |
| 275 | skb = NULL; |
| 276 | } |
sjur.brandeland@stericsson.com | 94230fe | 2011-10-13 11:29:22 +0000 | [diff] [blame] | 277 | } |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 278 | |
| 279 | /* Create payload CAIF frames. */ |
| 280 | pfrm = desc->emb_frm + CFHSI_MAX_EMB_FRM_SZ; |
| 281 | while (nfrms < CFHSI_MAX_PKTS) { |
| 282 | struct caif_payload_info *info; |
| 283 | int hpad = 0; |
| 284 | int tpad = 0; |
| 285 | |
| 286 | if (!skb) |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 287 | skb = cfhsi_dequeue(cfhsi); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 288 | |
| 289 | if (!skb) |
| 290 | break; |
| 291 | |
| 292 | /* Calculate needed head alignment and tail alignment. */ |
| 293 | info = (struct caif_payload_info *)&skb->cb; |
| 294 | |
| 295 | hpad = 1 + PAD_POW2((info->hdr_len + 1), hsi_head_align); |
| 296 | tpad = PAD_POW2((skb->len + hpad), hsi_tail_align); |
| 297 | |
| 298 | /* Fill in CAIF frame length in descriptor. */ |
| 299 | desc->cffrm_len[nfrms] = hpad + skb->len + tpad; |
| 300 | |
| 301 | /* Fill head padding information. */ |
| 302 | *pfrm = (u8)(hpad - 1); |
| 303 | pfrm += hpad; |
| 304 | |
| 305 | /* Update network statistics. */ |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 306 | spin_lock_bh(&cfhsi->lock); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 307 | cfhsi->ndev->stats.tx_packets++; |
| 308 | cfhsi->ndev->stats.tx_bytes += skb->len; |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 309 | cfhsi_update_aggregation_stats(cfhsi, skb, -1); |
| 310 | spin_unlock_bh(&cfhsi->lock); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 311 | |
| 312 | /* Copy in CAIF frame. */ |
| 313 | skb_copy_bits(skb, 0, pfrm, skb->len); |
| 314 | |
| 315 | /* Update payload length. */ |
| 316 | pld_len += desc->cffrm_len[nfrms]; |
| 317 | |
| 318 | /* Update frame pointer. */ |
| 319 | pfrm += skb->len + tpad; |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 320 | |
| 321 | /* Consume the SKB */ |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 322 | consume_skb(skb); |
| 323 | skb = NULL; |
| 324 | |
| 325 | /* Update number of frames. */ |
| 326 | nfrms++; |
| 327 | } |
| 328 | |
| 329 | /* Unused length fields should be zero-filled (according to SPEC). */ |
| 330 | while (nfrms < CFHSI_MAX_PKTS) { |
| 331 | desc->cffrm_len[nfrms] = 0x0000; |
| 332 | nfrms++; |
| 333 | } |
| 334 | |
| 335 | /* Check if we can piggy-back another descriptor. */ |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 336 | if (cfhsi_can_send_aggregate(cfhsi)) |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 337 | desc->header |= CFHSI_PIGGY_DESC; |
| 338 | else |
| 339 | desc->header &= ~CFHSI_PIGGY_DESC; |
| 340 | |
| 341 | return CFHSI_DESC_SZ + pld_len; |
| 342 | } |
| 343 | |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 344 | static void cfhsi_start_tx(struct cfhsi *cfhsi) |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 345 | { |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 346 | struct cfhsi_desc *desc = (struct cfhsi_desc *)cfhsi->tx_buf; |
| 347 | int len, res; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 348 | |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 349 | dev_dbg(&cfhsi->ndev->dev, "%s.\n", __func__); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 350 | |
| 351 | if (test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) |
| 352 | return; |
| 353 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 354 | do { |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 355 | /* Create HSI frame. */ |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 356 | len = cfhsi_tx_frm(desc, cfhsi); |
| 357 | if (!len) { |
| 358 | spin_lock_bh(&cfhsi->lock); |
| 359 | if (unlikely(cfhsi_tx_queue_len(cfhsi))) { |
Dmitry Tarnyagin | fe47f12 | 2011-10-13 11:29:23 +0000 | [diff] [blame] | 360 | spin_unlock_bh(&cfhsi->lock); |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 361 | res = -EAGAIN; |
| 362 | continue; |
Dmitry Tarnyagin | fe47f12 | 2011-10-13 11:29:23 +0000 | [diff] [blame] | 363 | } |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 364 | cfhsi->tx_state = CFHSI_TX_STATE_IDLE; |
| 365 | /* Start inactivity timer. */ |
| 366 | mod_timer(&cfhsi->inactivity_timer, |
| 367 | jiffies + cfhsi->inactivity_timeout); |
| 368 | spin_unlock_bh(&cfhsi->lock); |
| 369 | break; |
| 370 | } |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 371 | |
| 372 | /* Set up new transfer. */ |
| 373 | res = cfhsi->dev->cfhsi_tx(cfhsi->tx_buf, len, cfhsi->dev); |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 374 | if (WARN_ON(res < 0)) |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 375 | dev_err(&cfhsi->ndev->dev, "%s: TX error %d.\n", |
| 376 | __func__, res); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 377 | } while (res < 0); |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 378 | } |
Dmitry Tarnyagin | fe47f12 | 2011-10-13 11:29:23 +0000 | [diff] [blame] | 379 | |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 380 | static void cfhsi_tx_done(struct cfhsi *cfhsi) |
| 381 | { |
| 382 | dev_dbg(&cfhsi->ndev->dev, "%s.\n", __func__); |
| 383 | |
| 384 | if (test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) |
| 385 | return; |
| 386 | |
| 387 | /* |
| 388 | * Send flow on if flow off has been previously signalled |
| 389 | * and number of packets is below low water mark. |
| 390 | */ |
| 391 | spin_lock_bh(&cfhsi->lock); |
| 392 | if (cfhsi->flow_off_sent && |
| 393 | cfhsi_tx_queue_len(cfhsi) <= cfhsi->q_low_mark && |
| 394 | cfhsi->cfdev.flowctrl) { |
| 395 | |
| 396 | cfhsi->flow_off_sent = 0; |
| 397 | cfhsi->cfdev.flowctrl(cfhsi->ndev, ON); |
| 398 | } |
| 399 | |
| 400 | if (cfhsi_can_send_aggregate(cfhsi)) { |
| 401 | spin_unlock_bh(&cfhsi->lock); |
| 402 | cfhsi_start_tx(cfhsi); |
| 403 | } else { |
| 404 | mod_timer(&cfhsi->aggregation_timer, |
| 405 | jiffies + cfhsi->aggregation_timeout); |
| 406 | spin_unlock_bh(&cfhsi->lock); |
| 407 | } |
| 408 | |
Dmitry Tarnyagin | fe47f12 | 2011-10-13 11:29:23 +0000 | [diff] [blame] | 409 | return; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 410 | } |
| 411 | |
| 412 | static void cfhsi_tx_done_cb(struct cfhsi_drv *drv) |
| 413 | { |
| 414 | struct cfhsi *cfhsi; |
| 415 | |
| 416 | cfhsi = container_of(drv, struct cfhsi, drv); |
| 417 | dev_dbg(&cfhsi->ndev->dev, "%s.\n", |
| 418 | __func__); |
| 419 | |
| 420 | if (test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) |
| 421 | return; |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 422 | cfhsi_tx_done(cfhsi); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 423 | } |
| 424 | |
Daniel Martensson | 5bbed92 | 2011-10-13 11:29:28 +0000 | [diff] [blame] | 425 | static int cfhsi_rx_desc(struct cfhsi_desc *desc, struct cfhsi *cfhsi) |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 426 | { |
| 427 | int xfer_sz = 0; |
| 428 | int nfrms = 0; |
| 429 | u16 *plen = NULL; |
| 430 | u8 *pfrm = NULL; |
| 431 | |
| 432 | if ((desc->header & ~CFHSI_PIGGY_DESC) || |
| 433 | (desc->offset > CFHSI_MAX_EMB_FRM_SZ)) { |
| 434 | dev_err(&cfhsi->ndev->dev, "%s: Invalid descriptor.\n", |
| 435 | __func__); |
Daniel Martensson | 5bbed92 | 2011-10-13 11:29:28 +0000 | [diff] [blame] | 436 | return -EPROTO; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 437 | } |
| 438 | |
| 439 | /* Check for embedded CAIF frame. */ |
| 440 | if (desc->offset) { |
| 441 | struct sk_buff *skb; |
| 442 | u8 *dst = NULL; |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 443 | int len = 0; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 444 | pfrm = ((u8 *)desc) + desc->offset; |
| 445 | |
| 446 | /* Remove offset padding. */ |
| 447 | pfrm += *pfrm + 1; |
| 448 | |
| 449 | /* Read length of CAIF frame (little endian). */ |
| 450 | len = *pfrm; |
| 451 | len |= ((*(pfrm+1)) << 8) & 0xFF00; |
| 452 | len += 2; /* Add FCS fields. */ |
| 453 | |
Daniel Martensson | 5bbed92 | 2011-10-13 11:29:28 +0000 | [diff] [blame] | 454 | /* Sanity check length of CAIF frame. */ |
| 455 | if (unlikely(len > CFHSI_MAX_CAIF_FRAME_SZ)) { |
| 456 | dev_err(&cfhsi->ndev->dev, "%s: Invalid length.\n", |
| 457 | __func__); |
| 458 | return -EPROTO; |
| 459 | } |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 460 | |
| 461 | /* Allocate SKB (OK even in IRQ context). */ |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 462 | skb = alloc_skb(len + 1, GFP_ATOMIC); |
| 463 | if (!skb) { |
| 464 | dev_err(&cfhsi->ndev->dev, "%s: Out of memory !\n", |
| 465 | __func__); |
| 466 | return -ENOMEM; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 467 | } |
| 468 | caif_assert(skb != NULL); |
| 469 | |
| 470 | dst = skb_put(skb, len); |
| 471 | memcpy(dst, pfrm, len); |
| 472 | |
| 473 | skb->protocol = htons(ETH_P_CAIF); |
| 474 | skb_reset_mac_header(skb); |
| 475 | skb->dev = cfhsi->ndev; |
| 476 | |
| 477 | /* |
| 478 | * We are called from a arch specific platform device. |
| 479 | * Unfortunately we don't know what context we're |
| 480 | * running in. |
| 481 | */ |
| 482 | if (in_interrupt()) |
| 483 | netif_rx(skb); |
| 484 | else |
| 485 | netif_rx_ni(skb); |
| 486 | |
| 487 | /* Update network statistics. */ |
| 488 | cfhsi->ndev->stats.rx_packets++; |
| 489 | cfhsi->ndev->stats.rx_bytes += len; |
| 490 | } |
| 491 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 492 | /* Calculate transfer length. */ |
| 493 | plen = desc->cffrm_len; |
| 494 | while (nfrms < CFHSI_MAX_PKTS && *plen) { |
| 495 | xfer_sz += *plen; |
| 496 | plen++; |
| 497 | nfrms++; |
| 498 | } |
| 499 | |
| 500 | /* Check for piggy-backed descriptor. */ |
| 501 | if (desc->header & CFHSI_PIGGY_DESC) |
| 502 | xfer_sz += CFHSI_DESC_SZ; |
| 503 | |
Daniel Martensson | 5bbed92 | 2011-10-13 11:29:28 +0000 | [diff] [blame] | 504 | if ((xfer_sz % 4) || (xfer_sz > (CFHSI_BUF_SZ_RX - CFHSI_DESC_SZ))) { |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 505 | dev_err(&cfhsi->ndev->dev, |
| 506 | "%s: Invalid payload len: %d, ignored.\n", |
| 507 | __func__, xfer_sz); |
Daniel Martensson | 5bbed92 | 2011-10-13 11:29:28 +0000 | [diff] [blame] | 508 | return -EPROTO; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 509 | } |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 510 | return xfer_sz; |
| 511 | } |
| 512 | |
sjur.brandeland@stericsson.com | 332ad43 | 2012-02-03 04:36:21 +0000 | [diff] [blame] | 513 | static int cfhsi_rx_desc_len(struct cfhsi_desc *desc) |
| 514 | { |
| 515 | int xfer_sz = 0; |
| 516 | int nfrms = 0; |
| 517 | u16 *plen; |
| 518 | |
| 519 | if ((desc->header & ~CFHSI_PIGGY_DESC) || |
| 520 | (desc->offset > CFHSI_MAX_EMB_FRM_SZ)) { |
| 521 | |
| 522 | pr_err("Invalid descriptor. %x %x\n", desc->header, |
| 523 | desc->offset); |
| 524 | return -EPROTO; |
| 525 | } |
| 526 | |
| 527 | /* Calculate transfer length. */ |
| 528 | plen = desc->cffrm_len; |
| 529 | while (nfrms < CFHSI_MAX_PKTS && *plen) { |
| 530 | xfer_sz += *plen; |
| 531 | plen++; |
| 532 | nfrms++; |
| 533 | } |
| 534 | |
| 535 | if (xfer_sz % 4) { |
| 536 | pr_err("Invalid payload len: %d, ignored.\n", xfer_sz); |
| 537 | return -EPROTO; |
| 538 | } |
| 539 | return xfer_sz; |
| 540 | } |
| 541 | |
Daniel Martensson | 5bbed92 | 2011-10-13 11:29:28 +0000 | [diff] [blame] | 542 | static int cfhsi_rx_pld(struct cfhsi_desc *desc, struct cfhsi *cfhsi) |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 543 | { |
| 544 | int rx_sz = 0; |
| 545 | int nfrms = 0; |
| 546 | u16 *plen = NULL; |
| 547 | u8 *pfrm = NULL; |
| 548 | |
| 549 | /* Sanity check header and offset. */ |
| 550 | if (WARN_ON((desc->header & ~CFHSI_PIGGY_DESC) || |
| 551 | (desc->offset > CFHSI_MAX_EMB_FRM_SZ))) { |
| 552 | dev_err(&cfhsi->ndev->dev, "%s: Invalid descriptor.\n", |
| 553 | __func__); |
Daniel Martensson | 5bbed92 | 2011-10-13 11:29:28 +0000 | [diff] [blame] | 554 | return -EPROTO; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 555 | } |
| 556 | |
| 557 | /* Set frame pointer to start of payload. */ |
| 558 | pfrm = desc->emb_frm + CFHSI_MAX_EMB_FRM_SZ; |
| 559 | plen = desc->cffrm_len; |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 560 | |
| 561 | /* Skip already processed frames. */ |
| 562 | while (nfrms < cfhsi->rx_state.nfrms) { |
| 563 | pfrm += *plen; |
| 564 | rx_sz += *plen; |
| 565 | plen++; |
| 566 | nfrms++; |
| 567 | } |
| 568 | |
| 569 | /* Parse payload. */ |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 570 | while (nfrms < CFHSI_MAX_PKTS && *plen) { |
| 571 | struct sk_buff *skb; |
| 572 | u8 *dst = NULL; |
| 573 | u8 *pcffrm = NULL; |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 574 | int len = 0; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 575 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 576 | /* CAIF frame starts after head padding. */ |
| 577 | pcffrm = pfrm + *pfrm + 1; |
| 578 | |
| 579 | /* Read length of CAIF frame (little endian). */ |
| 580 | len = *pcffrm; |
| 581 | len |= ((*(pcffrm + 1)) << 8) & 0xFF00; |
| 582 | len += 2; /* Add FCS fields. */ |
| 583 | |
Daniel Martensson | 5bbed92 | 2011-10-13 11:29:28 +0000 | [diff] [blame] | 584 | /* Sanity check length of CAIF frames. */ |
| 585 | if (unlikely(len > CFHSI_MAX_CAIF_FRAME_SZ)) { |
| 586 | dev_err(&cfhsi->ndev->dev, "%s: Invalid length.\n", |
| 587 | __func__); |
| 588 | return -EPROTO; |
| 589 | } |
| 590 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 591 | /* Allocate SKB (OK even in IRQ context). */ |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 592 | skb = alloc_skb(len + 1, GFP_ATOMIC); |
| 593 | if (!skb) { |
| 594 | dev_err(&cfhsi->ndev->dev, "%s: Out of memory !\n", |
| 595 | __func__); |
| 596 | cfhsi->rx_state.nfrms = nfrms; |
| 597 | return -ENOMEM; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 598 | } |
| 599 | caif_assert(skb != NULL); |
| 600 | |
| 601 | dst = skb_put(skb, len); |
| 602 | memcpy(dst, pcffrm, len); |
| 603 | |
| 604 | skb->protocol = htons(ETH_P_CAIF); |
| 605 | skb_reset_mac_header(skb); |
| 606 | skb->dev = cfhsi->ndev; |
| 607 | |
| 608 | /* |
| 609 | * We're called from a platform device, |
| 610 | * and don't know the context we're running in. |
| 611 | */ |
| 612 | if (in_interrupt()) |
| 613 | netif_rx(skb); |
| 614 | else |
| 615 | netif_rx_ni(skb); |
| 616 | |
| 617 | /* Update network statistics. */ |
| 618 | cfhsi->ndev->stats.rx_packets++; |
| 619 | cfhsi->ndev->stats.rx_bytes += len; |
| 620 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 621 | pfrm += *plen; |
| 622 | rx_sz += *plen; |
| 623 | plen++; |
| 624 | nfrms++; |
| 625 | } |
| 626 | |
| 627 | return rx_sz; |
| 628 | } |
| 629 | |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 630 | static void cfhsi_rx_done(struct cfhsi *cfhsi) |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 631 | { |
| 632 | int res; |
sjur.brandeland@stericsson.com | 332ad43 | 2012-02-03 04:36:21 +0000 | [diff] [blame] | 633 | int desc_pld_len = 0, rx_len, rx_state; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 634 | struct cfhsi_desc *desc = NULL; |
sjur.brandeland@stericsson.com | 332ad43 | 2012-02-03 04:36:21 +0000 | [diff] [blame] | 635 | u8 *rx_ptr, *rx_buf; |
| 636 | struct cfhsi_desc *piggy_desc = NULL; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 637 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 638 | desc = (struct cfhsi_desc *)cfhsi->rx_buf; |
| 639 | |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 640 | dev_dbg(&cfhsi->ndev->dev, "%s\n", __func__); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 641 | |
| 642 | if (test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) |
| 643 | return; |
| 644 | |
| 645 | /* Update inactivity timer if pending. */ |
Dmitry Tarnyagin | 73033c9 | 2011-10-13 11:29:24 +0000 | [diff] [blame] | 646 | spin_lock_bh(&cfhsi->lock); |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 647 | mod_timer_pending(&cfhsi->inactivity_timer, |
Dmitry Tarnyagin | 28bd204 | 2011-10-13 11:29:27 +0000 | [diff] [blame] | 648 | jiffies + cfhsi->inactivity_timeout); |
Dmitry Tarnyagin | 73033c9 | 2011-10-13 11:29:24 +0000 | [diff] [blame] | 649 | spin_unlock_bh(&cfhsi->lock); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 650 | |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 651 | if (cfhsi->rx_state.state == CFHSI_RX_STATE_DESC) { |
sjur.brandeland@stericsson.com | 332ad43 | 2012-02-03 04:36:21 +0000 | [diff] [blame] | 652 | desc_pld_len = cfhsi_rx_desc_len(desc); |
| 653 | |
| 654 | if (desc_pld_len < 0) |
Daniel Martensson | 5bbed92 | 2011-10-13 11:29:28 +0000 | [diff] [blame] | 655 | goto out_of_sync; |
sjur.brandeland@stericsson.com | 332ad43 | 2012-02-03 04:36:21 +0000 | [diff] [blame] | 656 | |
| 657 | rx_buf = cfhsi->rx_buf; |
| 658 | rx_len = desc_pld_len; |
| 659 | if (desc_pld_len > 0 && (desc->header & CFHSI_PIGGY_DESC)) |
| 660 | rx_len += CFHSI_DESC_SZ; |
| 661 | if (desc_pld_len == 0) |
| 662 | rx_buf = cfhsi->rx_flip_buf; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 663 | } else { |
sjur.brandeland@stericsson.com | 332ad43 | 2012-02-03 04:36:21 +0000 | [diff] [blame] | 664 | rx_buf = cfhsi->rx_flip_buf; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 665 | |
sjur.brandeland@stericsson.com | 332ad43 | 2012-02-03 04:36:21 +0000 | [diff] [blame] | 666 | rx_len = CFHSI_DESC_SZ; |
| 667 | if (cfhsi->rx_state.pld_len > 0 && |
| 668 | (desc->header & CFHSI_PIGGY_DESC)) { |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 669 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 670 | piggy_desc = (struct cfhsi_desc *) |
| 671 | (desc->emb_frm + CFHSI_MAX_EMB_FRM_SZ + |
sjur.brandeland@stericsson.com | 332ad43 | 2012-02-03 04:36:21 +0000 | [diff] [blame] | 672 | cfhsi->rx_state.pld_len); |
| 673 | |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 674 | cfhsi->rx_state.piggy_desc = true; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 675 | |
sjur.brandeland@stericsson.com | 332ad43 | 2012-02-03 04:36:21 +0000 | [diff] [blame] | 676 | /* Extract payload len from piggy-backed descriptor. */ |
| 677 | desc_pld_len = cfhsi_rx_desc_len(piggy_desc); |
| 678 | if (desc_pld_len < 0) |
| 679 | goto out_of_sync; |
| 680 | |
| 681 | if (desc_pld_len > 0) |
| 682 | rx_len = desc_pld_len; |
| 683 | |
| 684 | if (desc_pld_len > 0 && |
| 685 | (piggy_desc->header & CFHSI_PIGGY_DESC)) |
| 686 | rx_len += CFHSI_DESC_SZ; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 687 | |
| 688 | /* |
| 689 | * Copy needed information from the piggy-backed |
| 690 | * descriptor to the descriptor in the start. |
| 691 | */ |
sjur.brandeland@stericsson.com | 332ad43 | 2012-02-03 04:36:21 +0000 | [diff] [blame] | 692 | memcpy(rx_buf, (u8 *)piggy_desc, |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 693 | CFHSI_DESC_SHORT_SZ); |
sjur.brandeland@stericsson.com | 332ad43 | 2012-02-03 04:36:21 +0000 | [diff] [blame] | 694 | /* Mark no embedded frame here */ |
| 695 | piggy_desc->offset = 0; |
Daniel Martensson | 5bbed92 | 2011-10-13 11:29:28 +0000 | [diff] [blame] | 696 | if (desc_pld_len == -EPROTO) |
| 697 | goto out_of_sync; |
| 698 | } |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 699 | } |
| 700 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 701 | if (desc_pld_len) { |
sjur.brandeland@stericsson.com | 332ad43 | 2012-02-03 04:36:21 +0000 | [diff] [blame] | 702 | rx_state = CFHSI_RX_STATE_PAYLOAD; |
| 703 | rx_ptr = rx_buf + CFHSI_DESC_SZ; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 704 | } else { |
sjur.brandeland@stericsson.com | 332ad43 | 2012-02-03 04:36:21 +0000 | [diff] [blame] | 705 | rx_state = CFHSI_RX_STATE_DESC; |
| 706 | rx_ptr = rx_buf; |
| 707 | rx_len = CFHSI_DESC_SZ; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 708 | } |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 709 | |
sjur.brandeland@stericsson.com | 332ad43 | 2012-02-03 04:36:21 +0000 | [diff] [blame] | 710 | /* Initiate next read */ |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 711 | if (test_bit(CFHSI_AWAKE, &cfhsi->bits)) { |
| 712 | /* Set up new transfer. */ |
| 713 | dev_dbg(&cfhsi->ndev->dev, "%s: Start RX.\n", |
sjur.brandeland@stericsson.com | 332ad43 | 2012-02-03 04:36:21 +0000 | [diff] [blame] | 714 | __func__); |
| 715 | |
| 716 | res = cfhsi->dev->cfhsi_rx(rx_ptr, rx_len, |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 717 | cfhsi->dev); |
| 718 | if (WARN_ON(res < 0)) { |
| 719 | dev_err(&cfhsi->ndev->dev, "%s: RX error %d.\n", |
| 720 | __func__, res); |
| 721 | cfhsi->ndev->stats.rx_errors++; |
| 722 | cfhsi->ndev->stats.rx_dropped++; |
| 723 | } |
| 724 | } |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 725 | |
sjur.brandeland@stericsson.com | 332ad43 | 2012-02-03 04:36:21 +0000 | [diff] [blame] | 726 | if (cfhsi->rx_state.state == CFHSI_RX_STATE_DESC) { |
| 727 | /* Extract payload from descriptor */ |
| 728 | if (cfhsi_rx_desc(desc, cfhsi) < 0) |
| 729 | goto out_of_sync; |
| 730 | } else { |
| 731 | /* Extract payload */ |
| 732 | if (cfhsi_rx_pld(desc, cfhsi) < 0) |
| 733 | goto out_of_sync; |
| 734 | if (piggy_desc) { |
| 735 | /* Extract any payload in piggyback descriptor. */ |
| 736 | if (cfhsi_rx_desc(piggy_desc, cfhsi) < 0) |
| 737 | goto out_of_sync; |
| 738 | } |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 739 | } |
sjur.brandeland@stericsson.com | 332ad43 | 2012-02-03 04:36:21 +0000 | [diff] [blame] | 740 | |
| 741 | /* Update state info */ |
| 742 | memset(&cfhsi->rx_state, 0, sizeof(cfhsi->rx_state)); |
| 743 | cfhsi->rx_state.state = rx_state; |
| 744 | cfhsi->rx_ptr = rx_ptr; |
| 745 | cfhsi->rx_len = rx_len; |
| 746 | cfhsi->rx_state.pld_len = desc_pld_len; |
| 747 | cfhsi->rx_state.piggy_desc = desc->header & CFHSI_PIGGY_DESC; |
| 748 | |
| 749 | if (rx_buf != cfhsi->rx_buf) |
| 750 | swap(cfhsi->rx_buf, cfhsi->rx_flip_buf); |
Daniel Martensson | 5bbed92 | 2011-10-13 11:29:28 +0000 | [diff] [blame] | 751 | return; |
| 752 | |
| 753 | out_of_sync: |
| 754 | dev_err(&cfhsi->ndev->dev, "%s: Out of sync.\n", __func__); |
| 755 | print_hex_dump_bytes("--> ", DUMP_PREFIX_NONE, |
| 756 | cfhsi->rx_buf, CFHSI_DESC_SZ); |
| 757 | schedule_work(&cfhsi->out_of_sync_work); |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 758 | } |
| 759 | |
| 760 | static void cfhsi_rx_slowpath(unsigned long arg) |
| 761 | { |
| 762 | struct cfhsi *cfhsi = (struct cfhsi *)arg; |
| 763 | |
| 764 | dev_dbg(&cfhsi->ndev->dev, "%s.\n", |
| 765 | __func__); |
| 766 | |
| 767 | cfhsi_rx_done(cfhsi); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 768 | } |
| 769 | |
| 770 | static void cfhsi_rx_done_cb(struct cfhsi_drv *drv) |
| 771 | { |
| 772 | struct cfhsi *cfhsi; |
| 773 | |
| 774 | cfhsi = container_of(drv, struct cfhsi, drv); |
| 775 | dev_dbg(&cfhsi->ndev->dev, "%s.\n", |
| 776 | __func__); |
| 777 | |
| 778 | if (test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) |
| 779 | return; |
| 780 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 781 | if (test_and_clear_bit(CFHSI_FLUSH_FIFO, &cfhsi->bits)) |
| 782 | wake_up_interruptible(&cfhsi->flush_fifo_wait); |
| 783 | else |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 784 | cfhsi_rx_done(cfhsi); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 785 | } |
| 786 | |
| 787 | static void cfhsi_wake_up(struct work_struct *work) |
| 788 | { |
| 789 | struct cfhsi *cfhsi = NULL; |
| 790 | int res; |
| 791 | int len; |
| 792 | long ret; |
| 793 | |
| 794 | cfhsi = container_of(work, struct cfhsi, wake_up_work); |
| 795 | |
| 796 | if (test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) |
| 797 | return; |
| 798 | |
| 799 | if (unlikely(test_bit(CFHSI_AWAKE, &cfhsi->bits))) { |
| 800 | /* It happenes when wakeup is requested by |
| 801 | * both ends at the same time. */ |
| 802 | clear_bit(CFHSI_WAKE_UP, &cfhsi->bits); |
Daniel Martensson | 5ea2ef5 | 2011-10-13 11:29:29 +0000 | [diff] [blame] | 803 | clear_bit(CFHSI_WAKE_UP_ACK, &cfhsi->bits); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 804 | return; |
| 805 | } |
| 806 | |
| 807 | /* Activate wake line. */ |
| 808 | cfhsi->dev->cfhsi_wake_up(cfhsi->dev); |
| 809 | |
| 810 | dev_dbg(&cfhsi->ndev->dev, "%s: Start waiting.\n", |
| 811 | __func__); |
| 812 | |
| 813 | /* Wait for acknowledge. */ |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 814 | ret = CFHSI_WAKE_TOUT; |
| 815 | ret = wait_event_interruptible_timeout(cfhsi->wake_up_wait, |
| 816 | test_and_clear_bit(CFHSI_WAKE_UP_ACK, |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 817 | &cfhsi->bits), ret); |
| 818 | if (unlikely(ret < 0)) { |
| 819 | /* Interrupted by signal. */ |
Daniel Martensson | 5ea2ef5 | 2011-10-13 11:29:29 +0000 | [diff] [blame] | 820 | dev_err(&cfhsi->ndev->dev, "%s: Signalled: %ld.\n", |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 821 | __func__, ret); |
Daniel Martensson | 5ea2ef5 | 2011-10-13 11:29:29 +0000 | [diff] [blame] | 822 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 823 | clear_bit(CFHSI_WAKE_UP, &cfhsi->bits); |
| 824 | cfhsi->dev->cfhsi_wake_down(cfhsi->dev); |
| 825 | return; |
| 826 | } else if (!ret) { |
Daniel Martensson | 5ea2ef5 | 2011-10-13 11:29:29 +0000 | [diff] [blame] | 827 | bool ca_wake = false; |
| 828 | size_t fifo_occupancy = 0; |
| 829 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 830 | /* Wakeup timeout */ |
Kim Lilliestierna XX | d62f8db | 2012-04-12 08:18:09 +0000 | [diff] [blame] | 831 | dev_dbg(&cfhsi->ndev->dev, "%s: Timeout.\n", |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 832 | __func__); |
Daniel Martensson | 5ea2ef5 | 2011-10-13 11:29:29 +0000 | [diff] [blame] | 833 | |
| 834 | /* Check FIFO to check if modem has sent something. */ |
| 835 | WARN_ON(cfhsi->dev->cfhsi_fifo_occupancy(cfhsi->dev, |
| 836 | &fifo_occupancy)); |
| 837 | |
Kim Lilliestierna XX | d62f8db | 2012-04-12 08:18:09 +0000 | [diff] [blame] | 838 | dev_dbg(&cfhsi->ndev->dev, "%s: Bytes in FIFO: %u.\n", |
Daniel Martensson | 5ea2ef5 | 2011-10-13 11:29:29 +0000 | [diff] [blame] | 839 | __func__, (unsigned) fifo_occupancy); |
| 840 | |
| 841 | /* Check if we misssed the interrupt. */ |
| 842 | WARN_ON(cfhsi->dev->cfhsi_get_peer_wake(cfhsi->dev, |
| 843 | &ca_wake)); |
| 844 | |
| 845 | if (ca_wake) { |
| 846 | dev_err(&cfhsi->ndev->dev, "%s: CA Wake missed !.\n", |
| 847 | __func__); |
| 848 | |
| 849 | /* Clear the CFHSI_WAKE_UP_ACK bit to prevent race. */ |
| 850 | clear_bit(CFHSI_WAKE_UP_ACK, &cfhsi->bits); |
| 851 | |
| 852 | /* Continue execution. */ |
| 853 | goto wake_ack; |
| 854 | } |
| 855 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 856 | clear_bit(CFHSI_WAKE_UP, &cfhsi->bits); |
| 857 | cfhsi->dev->cfhsi_wake_down(cfhsi->dev); |
| 858 | return; |
| 859 | } |
Daniel Martensson | 5ea2ef5 | 2011-10-13 11:29:29 +0000 | [diff] [blame] | 860 | wake_ack: |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 861 | dev_dbg(&cfhsi->ndev->dev, "%s: Woken.\n", |
| 862 | __func__); |
| 863 | |
| 864 | /* Clear power up bit. */ |
| 865 | set_bit(CFHSI_AWAKE, &cfhsi->bits); |
| 866 | clear_bit(CFHSI_WAKE_UP, &cfhsi->bits); |
| 867 | |
| 868 | /* Resume read operation. */ |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 869 | dev_dbg(&cfhsi->ndev->dev, "%s: Start RX.\n", __func__); |
| 870 | res = cfhsi->dev->cfhsi_rx(cfhsi->rx_ptr, cfhsi->rx_len, cfhsi->dev); |
| 871 | |
| 872 | if (WARN_ON(res < 0)) |
| 873 | dev_err(&cfhsi->ndev->dev, "%s: RX err %d.\n", __func__, res); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 874 | |
| 875 | /* Clear power up acknowledment. */ |
| 876 | clear_bit(CFHSI_WAKE_UP_ACK, &cfhsi->bits); |
| 877 | |
| 878 | spin_lock_bh(&cfhsi->lock); |
| 879 | |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 880 | /* Resume transmit if queues are not empty. */ |
| 881 | if (!cfhsi_tx_queue_len(cfhsi)) { |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 882 | dev_dbg(&cfhsi->ndev->dev, "%s: Peer wake, start timer.\n", |
| 883 | __func__); |
| 884 | /* Start inactivity timer. */ |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 885 | mod_timer(&cfhsi->inactivity_timer, |
Dmitry Tarnyagin | 28bd204 | 2011-10-13 11:29:27 +0000 | [diff] [blame] | 886 | jiffies + cfhsi->inactivity_timeout); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 887 | spin_unlock_bh(&cfhsi->lock); |
| 888 | return; |
| 889 | } |
| 890 | |
| 891 | dev_dbg(&cfhsi->ndev->dev, "%s: Host wake.\n", |
| 892 | __func__); |
| 893 | |
| 894 | spin_unlock_bh(&cfhsi->lock); |
| 895 | |
| 896 | /* Create HSI frame. */ |
| 897 | len = cfhsi_tx_frm((struct cfhsi_desc *)cfhsi->tx_buf, cfhsi); |
| 898 | |
| 899 | if (likely(len > 0)) { |
| 900 | /* Set up new transfer. */ |
| 901 | res = cfhsi->dev->cfhsi_tx(cfhsi->tx_buf, len, cfhsi->dev); |
| 902 | if (WARN_ON(res < 0)) { |
| 903 | dev_err(&cfhsi->ndev->dev, "%s: TX error %d.\n", |
| 904 | __func__, res); |
| 905 | cfhsi_abort_tx(cfhsi); |
| 906 | } |
| 907 | } else { |
| 908 | dev_err(&cfhsi->ndev->dev, |
| 909 | "%s: Failed to create HSI frame: %d.\n", |
| 910 | __func__, len); |
| 911 | } |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 912 | } |
| 913 | |
| 914 | static void cfhsi_wake_down(struct work_struct *work) |
| 915 | { |
| 916 | long ret; |
| 917 | struct cfhsi *cfhsi = NULL; |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 918 | size_t fifo_occupancy = 0; |
| 919 | int retry = CFHSI_WAKE_TOUT; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 920 | |
| 921 | cfhsi = container_of(work, struct cfhsi, wake_down_work); |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 922 | dev_dbg(&cfhsi->ndev->dev, "%s.\n", __func__); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 923 | |
| 924 | if (test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) |
| 925 | return; |
| 926 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 927 | /* Deactivate wake line. */ |
| 928 | cfhsi->dev->cfhsi_wake_down(cfhsi->dev); |
| 929 | |
| 930 | /* Wait for acknowledge. */ |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 931 | ret = CFHSI_WAKE_TOUT; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 932 | ret = wait_event_interruptible_timeout(cfhsi->wake_down_wait, |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 933 | test_and_clear_bit(CFHSI_WAKE_DOWN_ACK, |
| 934 | &cfhsi->bits), ret); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 935 | if (ret < 0) { |
| 936 | /* Interrupted by signal. */ |
Daniel Martensson | 5ea2ef5 | 2011-10-13 11:29:29 +0000 | [diff] [blame] | 937 | dev_err(&cfhsi->ndev->dev, "%s: Signalled: %ld.\n", |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 938 | __func__, ret); |
| 939 | return; |
| 940 | } else if (!ret) { |
Daniel Martensson | 5ea2ef5 | 2011-10-13 11:29:29 +0000 | [diff] [blame] | 941 | bool ca_wake = true; |
| 942 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 943 | /* Timeout */ |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 944 | dev_err(&cfhsi->ndev->dev, "%s: Timeout.\n", __func__); |
Daniel Martensson | 5ea2ef5 | 2011-10-13 11:29:29 +0000 | [diff] [blame] | 945 | |
| 946 | /* Check if we misssed the interrupt. */ |
| 947 | WARN_ON(cfhsi->dev->cfhsi_get_peer_wake(cfhsi->dev, |
| 948 | &ca_wake)); |
| 949 | if (!ca_wake) |
| 950 | dev_err(&cfhsi->ndev->dev, "%s: CA Wake missed !.\n", |
| 951 | __func__); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 952 | } |
| 953 | |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 954 | /* Check FIFO occupancy. */ |
| 955 | while (retry) { |
| 956 | WARN_ON(cfhsi->dev->cfhsi_fifo_occupancy(cfhsi->dev, |
| 957 | &fifo_occupancy)); |
| 958 | |
| 959 | if (!fifo_occupancy) |
| 960 | break; |
| 961 | |
| 962 | set_current_state(TASK_INTERRUPTIBLE); |
| 963 | schedule_timeout(1); |
| 964 | retry--; |
| 965 | } |
| 966 | |
| 967 | if (!retry) |
| 968 | dev_err(&cfhsi->ndev->dev, "%s: FIFO Timeout.\n", __func__); |
| 969 | |
| 970 | /* Clear AWAKE condition. */ |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 971 | clear_bit(CFHSI_AWAKE, &cfhsi->bits); |
| 972 | |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 973 | /* Cancel pending RX requests. */ |
| 974 | cfhsi->dev->cfhsi_rx_cancel(cfhsi->dev); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 975 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 976 | } |
| 977 | |
Daniel Martensson | 5bbed92 | 2011-10-13 11:29:28 +0000 | [diff] [blame] | 978 | static void cfhsi_out_of_sync(struct work_struct *work) |
| 979 | { |
| 980 | struct cfhsi *cfhsi = NULL; |
| 981 | |
| 982 | cfhsi = container_of(work, struct cfhsi, out_of_sync_work); |
| 983 | |
| 984 | rtnl_lock(); |
| 985 | dev_close(cfhsi->ndev); |
| 986 | rtnl_unlock(); |
| 987 | } |
| 988 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 989 | static void cfhsi_wake_up_cb(struct cfhsi_drv *drv) |
| 990 | { |
| 991 | struct cfhsi *cfhsi = NULL; |
| 992 | |
| 993 | cfhsi = container_of(drv, struct cfhsi, drv); |
| 994 | dev_dbg(&cfhsi->ndev->dev, "%s.\n", |
| 995 | __func__); |
| 996 | |
| 997 | set_bit(CFHSI_WAKE_UP_ACK, &cfhsi->bits); |
| 998 | wake_up_interruptible(&cfhsi->wake_up_wait); |
| 999 | |
| 1000 | if (test_bit(CFHSI_SHUTDOWN, &cfhsi->bits)) |
| 1001 | return; |
| 1002 | |
| 1003 | /* Schedule wake up work queue if the peer initiates. */ |
| 1004 | if (!test_and_set_bit(CFHSI_WAKE_UP, &cfhsi->bits)) |
| 1005 | queue_work(cfhsi->wq, &cfhsi->wake_up_work); |
| 1006 | } |
| 1007 | |
| 1008 | static void cfhsi_wake_down_cb(struct cfhsi_drv *drv) |
| 1009 | { |
| 1010 | struct cfhsi *cfhsi = NULL; |
| 1011 | |
| 1012 | cfhsi = container_of(drv, struct cfhsi, drv); |
| 1013 | dev_dbg(&cfhsi->ndev->dev, "%s.\n", |
| 1014 | __func__); |
| 1015 | |
| 1016 | /* Initiating low power is only permitted by the host (us). */ |
| 1017 | set_bit(CFHSI_WAKE_DOWN_ACK, &cfhsi->bits); |
| 1018 | wake_up_interruptible(&cfhsi->wake_down_wait); |
| 1019 | } |
| 1020 | |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 1021 | static void cfhsi_aggregation_tout(unsigned long arg) |
| 1022 | { |
| 1023 | struct cfhsi *cfhsi = (struct cfhsi *)arg; |
| 1024 | |
| 1025 | dev_dbg(&cfhsi->ndev->dev, "%s.\n", |
| 1026 | __func__); |
| 1027 | |
| 1028 | cfhsi_start_tx(cfhsi); |
| 1029 | } |
| 1030 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1031 | static int cfhsi_xmit(struct sk_buff *skb, struct net_device *dev) |
| 1032 | { |
| 1033 | struct cfhsi *cfhsi = NULL; |
| 1034 | int start_xfer = 0; |
| 1035 | int timer_active; |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 1036 | int prio; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1037 | |
| 1038 | if (!dev) |
| 1039 | return -EINVAL; |
| 1040 | |
| 1041 | cfhsi = netdev_priv(dev); |
| 1042 | |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 1043 | switch (skb->priority) { |
| 1044 | case TC_PRIO_BESTEFFORT: |
| 1045 | case TC_PRIO_FILLER: |
| 1046 | case TC_PRIO_BULK: |
| 1047 | prio = CFHSI_PRIO_BEBK; |
| 1048 | break; |
| 1049 | case TC_PRIO_INTERACTIVE_BULK: |
| 1050 | prio = CFHSI_PRIO_VI; |
| 1051 | break; |
| 1052 | case TC_PRIO_INTERACTIVE: |
| 1053 | prio = CFHSI_PRIO_VO; |
| 1054 | break; |
| 1055 | case TC_PRIO_CONTROL: |
| 1056 | default: |
| 1057 | prio = CFHSI_PRIO_CTL; |
| 1058 | break; |
| 1059 | } |
| 1060 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1061 | spin_lock_bh(&cfhsi->lock); |
| 1062 | |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 1063 | /* Update aggregation statistics */ |
| 1064 | cfhsi_update_aggregation_stats(cfhsi, skb, 1); |
| 1065 | |
| 1066 | /* Queue the SKB */ |
| 1067 | skb_queue_tail(&cfhsi->qhead[prio], skb); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1068 | |
| 1069 | /* Sanity check; xmit should not be called after unregister_netdev */ |
| 1070 | if (WARN_ON(test_bit(CFHSI_SHUTDOWN, &cfhsi->bits))) { |
| 1071 | spin_unlock_bh(&cfhsi->lock); |
| 1072 | cfhsi_abort_tx(cfhsi); |
| 1073 | return -EINVAL; |
| 1074 | } |
| 1075 | |
| 1076 | /* Send flow off if number of packets is above high water mark. */ |
| 1077 | if (!cfhsi->flow_off_sent && |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 1078 | cfhsi_tx_queue_len(cfhsi) > cfhsi->q_high_mark && |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1079 | cfhsi->cfdev.flowctrl) { |
| 1080 | cfhsi->flow_off_sent = 1; |
| 1081 | cfhsi->cfdev.flowctrl(cfhsi->ndev, OFF); |
| 1082 | } |
| 1083 | |
| 1084 | if (cfhsi->tx_state == CFHSI_TX_STATE_IDLE) { |
| 1085 | cfhsi->tx_state = CFHSI_TX_STATE_XFER; |
| 1086 | start_xfer = 1; |
| 1087 | } |
| 1088 | |
Dmitry Tarnyagin | 73033c9 | 2011-10-13 11:29:24 +0000 | [diff] [blame] | 1089 | if (!start_xfer) { |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 1090 | /* Send aggregate if it is possible */ |
| 1091 | bool aggregate_ready = |
| 1092 | cfhsi_can_send_aggregate(cfhsi) && |
| 1093 | del_timer(&cfhsi->aggregation_timer) > 0; |
Dmitry Tarnyagin | 73033c9 | 2011-10-13 11:29:24 +0000 | [diff] [blame] | 1094 | spin_unlock_bh(&cfhsi->lock); |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 1095 | if (aggregate_ready) |
| 1096 | cfhsi_start_tx(cfhsi); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1097 | return 0; |
Dmitry Tarnyagin | 73033c9 | 2011-10-13 11:29:24 +0000 | [diff] [blame] | 1098 | } |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1099 | |
| 1100 | /* Delete inactivity timer if started. */ |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 1101 | timer_active = del_timer_sync(&cfhsi->inactivity_timer); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1102 | |
Dmitry Tarnyagin | 73033c9 | 2011-10-13 11:29:24 +0000 | [diff] [blame] | 1103 | spin_unlock_bh(&cfhsi->lock); |
| 1104 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1105 | if (timer_active) { |
| 1106 | struct cfhsi_desc *desc = (struct cfhsi_desc *)cfhsi->tx_buf; |
| 1107 | int len; |
| 1108 | int res; |
| 1109 | |
| 1110 | /* Create HSI frame. */ |
| 1111 | len = cfhsi_tx_frm(desc, cfhsi); |
Roar Førde | f84ea77 | 2011-12-06 12:15:44 +0000 | [diff] [blame] | 1112 | WARN_ON(!len); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1113 | |
| 1114 | /* Set up new transfer. */ |
| 1115 | res = cfhsi->dev->cfhsi_tx(cfhsi->tx_buf, len, cfhsi->dev); |
| 1116 | if (WARN_ON(res < 0)) { |
| 1117 | dev_err(&cfhsi->ndev->dev, "%s: TX error %d.\n", |
| 1118 | __func__, res); |
| 1119 | cfhsi_abort_tx(cfhsi); |
| 1120 | } |
| 1121 | } else { |
| 1122 | /* Schedule wake up work queue if the we initiate. */ |
| 1123 | if (!test_and_set_bit(CFHSI_WAKE_UP, &cfhsi->bits)) |
| 1124 | queue_work(cfhsi->wq, &cfhsi->wake_up_work); |
| 1125 | } |
| 1126 | |
| 1127 | return 0; |
| 1128 | } |
| 1129 | |
| 1130 | static int cfhsi_open(struct net_device *dev) |
| 1131 | { |
| 1132 | netif_wake_queue(dev); |
| 1133 | |
| 1134 | return 0; |
| 1135 | } |
| 1136 | |
| 1137 | static int cfhsi_close(struct net_device *dev) |
| 1138 | { |
| 1139 | netif_stop_queue(dev); |
| 1140 | |
| 1141 | return 0; |
| 1142 | } |
| 1143 | |
| 1144 | static const struct net_device_ops cfhsi_ops = { |
| 1145 | .ndo_open = cfhsi_open, |
| 1146 | .ndo_stop = cfhsi_close, |
| 1147 | .ndo_start_xmit = cfhsi_xmit |
| 1148 | }; |
| 1149 | |
| 1150 | static void cfhsi_setup(struct net_device *dev) |
| 1151 | { |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 1152 | int i; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1153 | struct cfhsi *cfhsi = netdev_priv(dev); |
| 1154 | dev->features = 0; |
| 1155 | dev->netdev_ops = &cfhsi_ops; |
| 1156 | dev->type = ARPHRD_CAIF; |
| 1157 | dev->flags = IFF_POINTOPOINT | IFF_NOARP; |
Sjur Brændeland | 34efc28 | 2012-03-04 08:38:58 +0000 | [diff] [blame] | 1158 | dev->mtu = CFHSI_MAX_CAIF_FRAME_SZ; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1159 | dev->tx_queue_len = 0; |
| 1160 | dev->destructor = free_netdev; |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 1161 | for (i = 0; i < CFHSI_PRIO_LAST; ++i) |
| 1162 | skb_queue_head_init(&cfhsi->qhead[i]); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1163 | cfhsi->cfdev.link_select = CAIF_LINK_HIGH_BANDW; |
| 1164 | cfhsi->cfdev.use_frag = false; |
| 1165 | cfhsi->cfdev.use_stx = false; |
| 1166 | cfhsi->cfdev.use_fcs = false; |
| 1167 | cfhsi->ndev = dev; |
| 1168 | } |
| 1169 | |
| 1170 | int cfhsi_probe(struct platform_device *pdev) |
| 1171 | { |
| 1172 | struct cfhsi *cfhsi = NULL; |
| 1173 | struct net_device *ndev; |
| 1174 | struct cfhsi_dev *dev; |
| 1175 | int res; |
| 1176 | |
| 1177 | ndev = alloc_netdev(sizeof(struct cfhsi), "cfhsi%d", cfhsi_setup); |
Joe Perches | 7ac2ed0 | 2011-08-25 13:22:24 +0000 | [diff] [blame] | 1178 | if (!ndev) |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1179 | return -ENODEV; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1180 | |
| 1181 | cfhsi = netdev_priv(ndev); |
| 1182 | cfhsi->ndev = ndev; |
| 1183 | cfhsi->pdev = pdev; |
| 1184 | |
| 1185 | /* Initialize state vaiables. */ |
| 1186 | cfhsi->tx_state = CFHSI_TX_STATE_IDLE; |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 1187 | cfhsi->rx_state.state = CFHSI_RX_STATE_DESC; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1188 | |
| 1189 | /* Set flow info */ |
| 1190 | cfhsi->flow_off_sent = 0; |
| 1191 | cfhsi->q_low_mark = LOW_WATER_MARK; |
| 1192 | cfhsi->q_high_mark = HIGH_WATER_MARK; |
| 1193 | |
| 1194 | /* Assign the HSI device. */ |
| 1195 | dev = (struct cfhsi_dev *)pdev->dev.platform_data; |
| 1196 | cfhsi->dev = dev; |
| 1197 | |
| 1198 | /* Assign the driver to this HSI device. */ |
| 1199 | dev->drv = &cfhsi->drv; |
| 1200 | |
| 1201 | /* |
| 1202 | * Allocate a TX buffer with the size of a HSI packet descriptors |
| 1203 | * and the necessary room for CAIF payload frames. |
| 1204 | */ |
| 1205 | cfhsi->tx_buf = kzalloc(CFHSI_BUF_SZ_TX, GFP_KERNEL); |
| 1206 | if (!cfhsi->tx_buf) { |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1207 | res = -ENODEV; |
| 1208 | goto err_alloc_tx; |
| 1209 | } |
| 1210 | |
| 1211 | /* |
| 1212 | * Allocate a RX buffer with the size of two HSI packet descriptors and |
| 1213 | * the necessary room for CAIF payload frames. |
| 1214 | */ |
| 1215 | cfhsi->rx_buf = kzalloc(CFHSI_BUF_SZ_RX, GFP_KERNEL); |
| 1216 | if (!cfhsi->rx_buf) { |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1217 | res = -ENODEV; |
| 1218 | goto err_alloc_rx; |
| 1219 | } |
| 1220 | |
sjur.brandeland@stericsson.com | 332ad43 | 2012-02-03 04:36:21 +0000 | [diff] [blame] | 1221 | cfhsi->rx_flip_buf = kzalloc(CFHSI_BUF_SZ_RX, GFP_KERNEL); |
| 1222 | if (!cfhsi->rx_flip_buf) { |
| 1223 | res = -ENODEV; |
| 1224 | goto err_alloc_rx_flip; |
| 1225 | } |
| 1226 | |
Dmitry Tarnyagin | 28bd204 | 2011-10-13 11:29:27 +0000 | [diff] [blame] | 1227 | /* Pre-calculate inactivity timeout. */ |
| 1228 | if (inactivity_timeout != -1) { |
| 1229 | cfhsi->inactivity_timeout = |
| 1230 | inactivity_timeout * HZ / 1000; |
| 1231 | if (!cfhsi->inactivity_timeout) |
| 1232 | cfhsi->inactivity_timeout = 1; |
| 1233 | else if (cfhsi->inactivity_timeout > NEXT_TIMER_MAX_DELTA) |
| 1234 | cfhsi->inactivity_timeout = NEXT_TIMER_MAX_DELTA; |
| 1235 | } else { |
| 1236 | cfhsi->inactivity_timeout = NEXT_TIMER_MAX_DELTA; |
| 1237 | } |
| 1238 | |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 1239 | /* Initialize aggregation timeout */ |
| 1240 | cfhsi->aggregation_timeout = aggregation_timeout; |
| 1241 | |
Dmitry Tarnyagin | 28bd204 | 2011-10-13 11:29:27 +0000 | [diff] [blame] | 1242 | /* Initialize recieve vaiables. */ |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1243 | cfhsi->rx_ptr = cfhsi->rx_buf; |
| 1244 | cfhsi->rx_len = CFHSI_DESC_SZ; |
| 1245 | |
| 1246 | /* Initialize spin locks. */ |
| 1247 | spin_lock_init(&cfhsi->lock); |
| 1248 | |
| 1249 | /* Set up the driver. */ |
| 1250 | cfhsi->drv.tx_done_cb = cfhsi_tx_done_cb; |
| 1251 | cfhsi->drv.rx_done_cb = cfhsi_rx_done_cb; |
sjur.brandeland@stericsson.com | 94230fe | 2011-10-13 11:29:22 +0000 | [diff] [blame] | 1252 | cfhsi->drv.wake_up_cb = cfhsi_wake_up_cb; |
| 1253 | cfhsi->drv.wake_down_cb = cfhsi_wake_down_cb; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1254 | |
| 1255 | /* Initialize the work queues. */ |
| 1256 | INIT_WORK(&cfhsi->wake_up_work, cfhsi_wake_up); |
| 1257 | INIT_WORK(&cfhsi->wake_down_work, cfhsi_wake_down); |
Daniel Martensson | 5bbed92 | 2011-10-13 11:29:28 +0000 | [diff] [blame] | 1258 | INIT_WORK(&cfhsi->out_of_sync_work, cfhsi_out_of_sync); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1259 | |
| 1260 | /* Clear all bit fields. */ |
| 1261 | clear_bit(CFHSI_WAKE_UP_ACK, &cfhsi->bits); |
| 1262 | clear_bit(CFHSI_WAKE_DOWN_ACK, &cfhsi->bits); |
| 1263 | clear_bit(CFHSI_WAKE_UP, &cfhsi->bits); |
| 1264 | clear_bit(CFHSI_AWAKE, &cfhsi->bits); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1265 | |
| 1266 | /* Create work thread. */ |
| 1267 | cfhsi->wq = create_singlethread_workqueue(pdev->name); |
| 1268 | if (!cfhsi->wq) { |
| 1269 | dev_err(&ndev->dev, "%s: Failed to create work queue.\n", |
| 1270 | __func__); |
| 1271 | res = -ENODEV; |
| 1272 | goto err_create_wq; |
| 1273 | } |
| 1274 | |
| 1275 | /* Initialize wait queues. */ |
| 1276 | init_waitqueue_head(&cfhsi->wake_up_wait); |
| 1277 | init_waitqueue_head(&cfhsi->wake_down_wait); |
| 1278 | init_waitqueue_head(&cfhsi->flush_fifo_wait); |
| 1279 | |
| 1280 | /* Setup the inactivity timer. */ |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 1281 | init_timer(&cfhsi->inactivity_timer); |
| 1282 | cfhsi->inactivity_timer.data = (unsigned long)cfhsi; |
| 1283 | cfhsi->inactivity_timer.function = cfhsi_inactivity_tout; |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 1284 | /* Setup the slowpath RX timer. */ |
| 1285 | init_timer(&cfhsi->rx_slowpath_timer); |
| 1286 | cfhsi->rx_slowpath_timer.data = (unsigned long)cfhsi; |
| 1287 | cfhsi->rx_slowpath_timer.function = cfhsi_rx_slowpath; |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 1288 | /* Setup the aggregation timer. */ |
| 1289 | init_timer(&cfhsi->aggregation_timer); |
| 1290 | cfhsi->aggregation_timer.data = (unsigned long)cfhsi; |
| 1291 | cfhsi->aggregation_timer.function = cfhsi_aggregation_tout; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1292 | |
| 1293 | /* Add CAIF HSI device to list. */ |
| 1294 | spin_lock(&cfhsi_list_lock); |
| 1295 | list_add_tail(&cfhsi->list, &cfhsi_list); |
| 1296 | spin_unlock(&cfhsi_list_lock); |
| 1297 | |
| 1298 | /* Activate HSI interface. */ |
| 1299 | res = cfhsi->dev->cfhsi_up(cfhsi->dev); |
| 1300 | if (res) { |
| 1301 | dev_err(&cfhsi->ndev->dev, |
| 1302 | "%s: can't activate HSI interface: %d.\n", |
| 1303 | __func__, res); |
| 1304 | goto err_activate; |
| 1305 | } |
| 1306 | |
| 1307 | /* Flush FIFO */ |
| 1308 | res = cfhsi_flush_fifo(cfhsi); |
| 1309 | if (res) { |
| 1310 | dev_err(&ndev->dev, "%s: Can't flush FIFO: %d.\n", |
| 1311 | __func__, res); |
| 1312 | goto err_net_reg; |
| 1313 | } |
| 1314 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1315 | /* Register network device. */ |
| 1316 | res = register_netdev(ndev); |
| 1317 | if (res) { |
| 1318 | dev_err(&ndev->dev, "%s: Registration error: %d.\n", |
| 1319 | __func__, res); |
| 1320 | goto err_net_reg; |
| 1321 | } |
| 1322 | |
| 1323 | netif_stop_queue(ndev); |
| 1324 | |
| 1325 | return res; |
| 1326 | |
| 1327 | err_net_reg: |
| 1328 | cfhsi->dev->cfhsi_down(cfhsi->dev); |
| 1329 | err_activate: |
| 1330 | destroy_workqueue(cfhsi->wq); |
| 1331 | err_create_wq: |
sjur.brandeland@stericsson.com | 332ad43 | 2012-02-03 04:36:21 +0000 | [diff] [blame] | 1332 | kfree(cfhsi->rx_flip_buf); |
| 1333 | err_alloc_rx_flip: |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1334 | kfree(cfhsi->rx_buf); |
| 1335 | err_alloc_rx: |
| 1336 | kfree(cfhsi->tx_buf); |
| 1337 | err_alloc_tx: |
| 1338 | free_netdev(ndev); |
| 1339 | |
| 1340 | return res; |
| 1341 | } |
| 1342 | |
Daniel Martensson | ca63f8c | 2011-10-13 11:29:26 +0000 | [diff] [blame] | 1343 | static void cfhsi_shutdown(struct cfhsi *cfhsi) |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1344 | { |
sjur.brandeland@stericsson.com | 5f614e6 | 2012-04-12 08:18:08 +0000 | [diff] [blame] | 1345 | u8 *tx_buf, *rx_buf, *flip_buf; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1346 | |
| 1347 | /* Stop TXing */ |
| 1348 | netif_tx_stop_all_queues(cfhsi->ndev); |
| 1349 | |
| 1350 | /* going to shutdown driver */ |
| 1351 | set_bit(CFHSI_SHUTDOWN, &cfhsi->bits); |
| 1352 | |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1353 | /* Flush workqueue */ |
| 1354 | flush_workqueue(cfhsi->wq); |
| 1355 | |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 1356 | /* Delete timers if pending */ |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 1357 | del_timer_sync(&cfhsi->inactivity_timer); |
Daniel Martensson | 687b13e | 2011-10-13 11:29:25 +0000 | [diff] [blame] | 1358 | del_timer_sync(&cfhsi->rx_slowpath_timer); |
Dmitry Tarnyagin | ece367d | 2012-04-12 08:27:25 +0000 | [diff] [blame^] | 1359 | del_timer_sync(&cfhsi->aggregation_timer); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1360 | |
| 1361 | /* Cancel pending RX request (if any) */ |
| 1362 | cfhsi->dev->cfhsi_rx_cancel(cfhsi->dev); |
| 1363 | |
Daniel Martensson | ca63f8c | 2011-10-13 11:29:26 +0000 | [diff] [blame] | 1364 | /* Destroy workqueue */ |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1365 | destroy_workqueue(cfhsi->wq); |
| 1366 | |
| 1367 | /* Store bufferes: will be freed later. */ |
| 1368 | tx_buf = cfhsi->tx_buf; |
| 1369 | rx_buf = cfhsi->rx_buf; |
sjur.brandeland@stericsson.com | 5f614e6 | 2012-04-12 08:18:08 +0000 | [diff] [blame] | 1370 | flip_buf = cfhsi->rx_flip_buf; |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1371 | /* Flush transmit queues. */ |
| 1372 | cfhsi_abort_tx(cfhsi); |
| 1373 | |
| 1374 | /* Deactivate interface */ |
| 1375 | cfhsi->dev->cfhsi_down(cfhsi->dev); |
| 1376 | |
| 1377 | /* Finally unregister the network device. */ |
| 1378 | unregister_netdev(cfhsi->ndev); |
| 1379 | |
| 1380 | /* Free buffers. */ |
| 1381 | kfree(tx_buf); |
| 1382 | kfree(rx_buf); |
sjur.brandeland@stericsson.com | 5f614e6 | 2012-04-12 08:18:08 +0000 | [diff] [blame] | 1383 | kfree(flip_buf); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1384 | } |
| 1385 | |
| 1386 | int cfhsi_remove(struct platform_device *pdev) |
| 1387 | { |
| 1388 | struct list_head *list_node; |
| 1389 | struct list_head *n; |
| 1390 | struct cfhsi *cfhsi = NULL; |
| 1391 | struct cfhsi_dev *dev; |
| 1392 | |
| 1393 | dev = (struct cfhsi_dev *)pdev->dev.platform_data; |
| 1394 | spin_lock(&cfhsi_list_lock); |
| 1395 | list_for_each_safe(list_node, n, &cfhsi_list) { |
| 1396 | cfhsi = list_entry(list_node, struct cfhsi, list); |
| 1397 | /* Find the corresponding device. */ |
| 1398 | if (cfhsi->dev == dev) { |
| 1399 | /* Remove from list. */ |
| 1400 | list_del(list_node); |
| 1401 | spin_unlock(&cfhsi_list_lock); |
| 1402 | |
| 1403 | /* Shutdown driver. */ |
Daniel Martensson | ca63f8c | 2011-10-13 11:29:26 +0000 | [diff] [blame] | 1404 | cfhsi_shutdown(cfhsi); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1405 | |
| 1406 | return 0; |
| 1407 | } |
| 1408 | } |
| 1409 | spin_unlock(&cfhsi_list_lock); |
| 1410 | return -ENODEV; |
| 1411 | } |
| 1412 | |
| 1413 | struct platform_driver cfhsi_plat_drv = { |
| 1414 | .probe = cfhsi_probe, |
| 1415 | .remove = cfhsi_remove, |
| 1416 | .driver = { |
| 1417 | .name = "cfhsi", |
| 1418 | .owner = THIS_MODULE, |
| 1419 | }, |
| 1420 | }; |
| 1421 | |
| 1422 | static void __exit cfhsi_exit_module(void) |
| 1423 | { |
| 1424 | struct list_head *list_node; |
| 1425 | struct list_head *n; |
| 1426 | struct cfhsi *cfhsi = NULL; |
| 1427 | |
| 1428 | spin_lock(&cfhsi_list_lock); |
| 1429 | list_for_each_safe(list_node, n, &cfhsi_list) { |
| 1430 | cfhsi = list_entry(list_node, struct cfhsi, list); |
| 1431 | |
| 1432 | /* Remove from list. */ |
| 1433 | list_del(list_node); |
| 1434 | spin_unlock(&cfhsi_list_lock); |
| 1435 | |
| 1436 | /* Shutdown driver. */ |
Daniel Martensson | ca63f8c | 2011-10-13 11:29:26 +0000 | [diff] [blame] | 1437 | cfhsi_shutdown(cfhsi); |
Dmitry.Tarnyagin | 40d6904 | 2011-06-01 03:29:18 +0000 | [diff] [blame] | 1438 | |
| 1439 | spin_lock(&cfhsi_list_lock); |
| 1440 | } |
| 1441 | spin_unlock(&cfhsi_list_lock); |
| 1442 | |
| 1443 | /* Unregister platform driver. */ |
| 1444 | platform_driver_unregister(&cfhsi_plat_drv); |
| 1445 | } |
| 1446 | |
| 1447 | static int __init cfhsi_init_module(void) |
| 1448 | { |
| 1449 | int result; |
| 1450 | |
| 1451 | /* Initialize spin lock. */ |
| 1452 | spin_lock_init(&cfhsi_list_lock); |
| 1453 | |
| 1454 | /* Register platform driver. */ |
| 1455 | result = platform_driver_register(&cfhsi_plat_drv); |
| 1456 | if (result) { |
| 1457 | printk(KERN_ERR "Could not register platform HSI driver: %d.\n", |
| 1458 | result); |
| 1459 | goto err_dev_register; |
| 1460 | } |
| 1461 | |
| 1462 | return result; |
| 1463 | |
| 1464 | err_dev_register: |
| 1465 | return result; |
| 1466 | } |
| 1467 | |
| 1468 | module_init(cfhsi_init_module); |
| 1469 | module_exit(cfhsi_exit_module); |