| Rob Herring | 21278ae | 2014-06-10 09:06:10 -0500 | [diff] [blame] | 1 | menuconfig ARCH_SIRF |
| Arnd Bergmann | cf82e0e | 2013-03-19 17:45:37 +0100 | [diff] [blame] | 2 | bool "CSR SiRF" if ARCH_MULTI_V7 |
| Barry Song | e7eda91 | 2014-01-10 03:15:42 +0000 | [diff] [blame] | 3 | select ARCH_HAS_RESET_CONTROLLER |
| Arnd Bergmann | cf82e0e | 2013-03-19 17:45:37 +0100 | [diff] [blame] | 4 | select ARCH_REQUIRE_GPIOLIB |
| Arnd Bergmann | cf82e0e | 2013-03-19 17:45:37 +0100 | [diff] [blame] | 5 | select GENERIC_IRQ_CHIP |
| Uwe Kleine-König | ce816fa | 2014-04-07 15:39:19 -0700 | [diff] [blame] | 6 | select NO_IOPORT_MAP |
| Guo Zeng | b199947 | 2015-04-14 11:55:55 +0000 | [diff] [blame] | 7 | select REGMAP |
| Arnd Bergmann | cf82e0e | 2013-03-19 17:45:37 +0100 | [diff] [blame] | 8 | select PINCTRL |
| 9 | select PINCTRL_SIRF |
| 10 | help |
| 11 | Support for CSR SiRFprimaII/Marco/Polo platforms |
| 12 | |
| Barry Song | 156a099 | 2012-08-23 13:41:58 +0800 | [diff] [blame] | 13 | if ARCH_SIRF |
| 14 | |
| Zhiwu Song | 4cba058 | 2015-01-04 17:53:37 +0800 | [diff] [blame] | 15 | comment "CSR SiRF atlas6/primaII/Atlas7 Specific Features" |
| Barry Song | d4fe49e | 2013-03-18 15:04:38 +0800 | [diff] [blame] | 16 | |
| 17 | config ARCH_ATLAS6 |
| 18 | bool "CSR SiRFSoC ATLAS6 ARM Cortex A9 Platform" |
| 19 | default y |
| Barry Song | d4fe49e | 2013-03-18 15:04:38 +0800 | [diff] [blame] | 20 | select SIRF_IRQ |
| 21 | help |
| 22 | Support for CSR SiRFSoC ARM Cortex A9 Platform |
| Barry Song | 156a099 | 2012-08-23 13:41:58 +0800 | [diff] [blame] | 23 | |
| Zhiwu Song | 4cba058 | 2015-01-04 17:53:37 +0800 | [diff] [blame] | 24 | config ARCH_ATLAS7 |
| 25 | bool "CSR SiRFSoC ATLAS7 ARM Cortex A7 Platform" |
| 26 | default y |
| 27 | select ARM_GIC |
| 28 | select CPU_V7 |
| 29 | select HAVE_ARM_SCU if SMP |
| 30 | select HAVE_SMP |
| Zhiwu Song | 4cba058 | 2015-01-04 17:53:37 +0800 | [diff] [blame] | 31 | help |
| 32 | Support for CSR SiRFSoC ARM Cortex A7 Platform |
| 33 | |
| Barry Song | 156a099 | 2012-08-23 13:41:58 +0800 | [diff] [blame] | 34 | config ARCH_PRIMA2 |
| 35 | bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform" |
| 36 | default y |
| Barry Song | c1e3c11 | 2012-08-23 13:41:59 +0800 | [diff] [blame] | 37 | select SIRF_IRQ |
| Russell King | b1b3f49 | 2012-10-06 17:12:25 +0100 | [diff] [blame] | 38 | select ZONE_DMA |
| Barry Song | 156a099 | 2012-08-23 13:41:58 +0800 | [diff] [blame] | 39 | help |
| 40 | Support for CSR SiRFSoC ARM Cortex A9 Platform |
| 41 | |
| Barry Song | c1e3c11 | 2012-08-23 13:41:59 +0800 | [diff] [blame] | 42 | config SIRF_IRQ |
| 43 | bool |
| 44 | |
| Barry Song | 156a099 | 2012-08-23 13:41:58 +0800 | [diff] [blame] | 45 | endif |