Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1 | # |
| 2 | # DMA engine configuration |
| 3 | # |
| 4 | |
Shannon Nelson | 2ed6dc3 | 2007-10-16 01:27:42 -0700 | [diff] [blame] | 5 | menuconfig DMADEVICES |
Haavard Skinnemoen | 6d4f587 | 2007-11-28 16:21:43 -0800 | [diff] [blame] | 6 | bool "DMA Engine support" |
Dan Williams | 04ce9ab | 2009-06-03 14:22:28 -0700 | [diff] [blame] | 7 | depends on HAS_DMA |
Shannon Nelson | 2ed6dc3 | 2007-10-16 01:27:42 -0700 | [diff] [blame] | 8 | help |
Haavard Skinnemoen | 6d4f587 | 2007-11-28 16:21:43 -0800 | [diff] [blame] | 9 | DMA engines can do asynchronous data transfers without |
| 10 | involving the host CPU. Currently, this framework can be |
| 11 | used to offload memory copies in the network stack and |
Dan Williams | 9c402f4 | 2008-06-27 01:21:11 -0700 | [diff] [blame] | 12 | RAID operations in the MD driver. This menu only presents |
| 13 | DMA Device drivers supported by the configured arch, it may |
| 14 | be empty in some cases. |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 15 | |
Linus Walleij | 6c664a8 | 2010-02-09 22:34:54 +0100 | [diff] [blame] | 16 | config DMADEVICES_DEBUG |
| 17 | bool "DMA Engine debugging" |
| 18 | depends on DMADEVICES != n |
| 19 | help |
| 20 | This is an option for use by developers; most people should |
| 21 | say N here. This enables DMA engine core and driver debugging. |
| 22 | |
| 23 | config DMADEVICES_VDEBUG |
| 24 | bool "DMA Engine verbose debugging" |
| 25 | depends on DMADEVICES_DEBUG != n |
| 26 | help |
| 27 | This is an option for use by developers; most people should |
| 28 | say N here. This enables deeper (more verbose) debugging of |
| 29 | the DMA engine core and drivers. |
| 30 | |
| 31 | |
Shannon Nelson | 2ed6dc3 | 2007-10-16 01:27:42 -0700 | [diff] [blame] | 32 | if DMADEVICES |
Chris Leech | db21733 | 2006-06-17 21:24:58 -0700 | [diff] [blame] | 33 | |
Chris Leech | 0bbd5f4 | 2006-05-23 17:35:34 -0700 | [diff] [blame] | 34 | comment "DMA Devices" |
| 35 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 36 | #core |
Dan Williams | 5fc6d89 | 2010-10-07 16:44:50 -0700 | [diff] [blame] | 37 | config ASYNC_TX_ENABLE_CHANNEL_SWITCH |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 38 | bool |
| 39 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 40 | config ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
| 41 | bool |
| 42 | |
| 43 | config DMA_ENGINE |
| 44 | bool |
| 45 | |
| 46 | config DMA_VIRTUAL_CHANNELS |
| 47 | tristate |
| 48 | |
| 49 | config DMA_ACPI |
| 50 | def_bool y |
| 51 | depends on ACPI |
| 52 | |
| 53 | config DMA_OF |
| 54 | def_bool y |
| 55 | depends on OF |
| 56 | select DMA_ENGINE |
| 57 | |
| 58 | #devices |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 59 | config AMBA_PL08X |
| 60 | bool "ARM PrimeCell PL080 or PL081 support" |
Kees Cook | c6a0aec | 2012-10-23 13:01:54 -0700 | [diff] [blame] | 61 | depends on ARM_AMBA |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 62 | select DMA_ENGINE |
Russell King | 083be28 | 2012-05-26 14:09:53 +0100 | [diff] [blame] | 63 | select DMA_VIRTUAL_CHANNELS |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 64 | help |
| 65 | Platform has a PL08x DMAC device |
| 66 | which can provide DMA engine support |
| 67 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 68 | config AMCC_PPC440SPE_ADMA |
| 69 | tristate "AMCC PPC440SPe ADMA support" |
| 70 | depends on 440SPe || 440SP |
| 71 | select DMA_ENGINE |
| 72 | select DMA_ENGINE_RAID |
| 73 | select ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
| 74 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
Joachim Eastwood | e5f4ae8 | 2015-07-11 14:12:06 +0200 | [diff] [blame] | 75 | help |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 76 | Enable support for the AMCC PPC440SPe RAID engines. |
| 77 | |
| 78 | config AT_HDMAC |
| 79 | tristate "Atmel AHB DMA support" |
| 80 | depends on ARCH_AT91 |
| 81 | select DMA_ENGINE |
| 82 | help |
| 83 | Support the Atmel AHB DMA controller. |
| 84 | |
| 85 | config AT_XDMAC |
| 86 | tristate "Atmel XDMA support" |
| 87 | depends on ARCH_AT91 |
| 88 | select DMA_ENGINE |
| 89 | help |
| 90 | Support the Atmel XDMA controller. |
| 91 | |
| 92 | config AXI_DMAC |
| 93 | tristate "Analog Devices AXI-DMAC DMA support" |
| 94 | depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_SOCFPGA || COMPILE_TEST |
| 95 | select DMA_ENGINE |
| 96 | select DMA_VIRTUAL_CHANNELS |
| 97 | help |
| 98 | Enable support for the Analog Devices AXI-DMAC peripheral. This DMA |
| 99 | controller is often used in Analog Device's reference designs for FPGA |
| 100 | platforms. |
| 101 | |
| 102 | config COH901318 |
| 103 | bool "ST-Ericsson COH901318 DMA support" |
| 104 | select DMA_ENGINE |
| 105 | depends on ARCH_U300 |
| 106 | help |
| 107 | Enable support for ST-Ericsson COH 901 318 DMA. |
| 108 | |
| 109 | config DMA_BCM2835 |
| 110 | tristate "BCM2835 DMA engine support" |
| 111 | depends on ARCH_BCM2835 |
| 112 | select DMA_ENGINE |
| 113 | select DMA_VIRTUAL_CHANNELS |
| 114 | |
| 115 | config DMA_JZ4740 |
| 116 | tristate "JZ4740 DMA support" |
| 117 | depends on MACH_JZ4740 |
| 118 | select DMA_ENGINE |
| 119 | select DMA_VIRTUAL_CHANNELS |
| 120 | |
| 121 | config DMA_JZ4780 |
| 122 | tristate "JZ4780 DMA support" |
| 123 | depends on MACH_JZ4780 |
| 124 | select DMA_ENGINE |
| 125 | select DMA_VIRTUAL_CHANNELS |
| 126 | help |
| 127 | This selects support for the DMA controller in Ingenic JZ4780 SoCs. |
| 128 | If you have a board based on such a SoC and wish to use DMA for |
| 129 | devices which can use the DMA controller, say Y or M here. |
| 130 | |
| 131 | config DMA_OMAP |
| 132 | tristate "OMAP DMA support" |
| 133 | depends on ARCH_OMAP |
| 134 | select DMA_ENGINE |
| 135 | select DMA_VIRTUAL_CHANNELS |
| 136 | select TI_DMA_CROSSBAR if SOC_DRA7XX |
| 137 | |
| 138 | config DMA_SA11X0 |
| 139 | tristate "SA-11x0 DMA support" |
| 140 | depends on ARCH_SA1100 |
| 141 | select DMA_ENGINE |
| 142 | select DMA_VIRTUAL_CHANNELS |
| 143 | help |
| 144 | Support the DMA engine found on Intel StrongARM SA-1100 and |
| 145 | SA-1110 SoCs. This DMA engine can only be used with on-chip |
| 146 | devices. |
| 147 | |
| 148 | config DMA_SUN4I |
| 149 | tristate "Allwinner A10 DMA SoCs support" |
Linus Torvalds | 3527122 | 2015-09-04 11:10:18 -0700 | [diff] [blame] | 150 | depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 151 | default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I) |
| 152 | select DMA_ENGINE |
| 153 | select DMA_OF |
| 154 | select DMA_VIRTUAL_CHANNELS |
| 155 | help |
| 156 | Enable support for the DMA controller present in the sun4i, |
| 157 | sun5i and sun7i Allwinner ARM SoCs. |
| 158 | |
| 159 | config DMA_SUN6I |
| 160 | tristate "Allwinner A31 SoCs DMA support" |
| 161 | depends on MACH_SUN6I || MACH_SUN8I || COMPILE_TEST |
| 162 | depends on RESET_CONTROLLER |
| 163 | select DMA_ENGINE |
| 164 | select DMA_VIRTUAL_CHANNELS |
| 165 | help |
| 166 | Support for the DMA engine first found in Allwinner A31 SoCs. |
| 167 | |
| 168 | config EP93XX_DMA |
| 169 | bool "Cirrus Logic EP93xx DMA support" |
| 170 | depends on ARCH_EP93XX |
| 171 | select DMA_ENGINE |
| 172 | help |
| 173 | Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. |
| 174 | |
| 175 | config FSL_DMA |
| 176 | tristate "Freescale Elo series DMA support" |
| 177 | depends on FSL_SOC |
| 178 | select DMA_ENGINE |
| 179 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
| 180 | ---help--- |
| 181 | Enable support for the Freescale Elo series DMA controllers. |
| 182 | The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the |
| 183 | EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on |
| 184 | some Txxx and Bxxx parts. |
| 185 | |
| 186 | config FSL_EDMA |
| 187 | tristate "Freescale eDMA engine support" |
| 188 | depends on OF |
| 189 | select DMA_ENGINE |
| 190 | select DMA_VIRTUAL_CHANNELS |
| 191 | help |
| 192 | Support the Freescale eDMA engine with programmable channel |
| 193 | multiplexing capability for DMA request sources(slot). |
| 194 | This module can be found on Freescale Vybrid and LS-1 SoCs. |
| 195 | |
| 196 | config FSL_RAID |
| 197 | tristate "Freescale RAID engine Support" |
| 198 | depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH |
| 199 | select DMA_ENGINE |
| 200 | select DMA_ENGINE_RAID |
| 201 | ---help--- |
| 202 | Enable support for Freescale RAID Engine. RAID Engine is |
| 203 | available on some QorIQ SoCs (like P5020/P5040). It has |
| 204 | the capability to offload memcpy, xor and pq computation |
| 205 | for raid5/6. |
| 206 | |
| 207 | config IMG_MDC_DMA |
| 208 | tristate "IMG MDC support" |
| 209 | depends on MIPS || COMPILE_TEST |
| 210 | depends on MFD_SYSCON |
| 211 | select DMA_ENGINE |
| 212 | select DMA_VIRTUAL_CHANNELS |
| 213 | help |
| 214 | Enable support for the IMG multi-threaded DMA controller (MDC). |
| 215 | |
| 216 | config IMX_DMA |
| 217 | tristate "i.MX DMA support" |
| 218 | depends on ARCH_MXC |
| 219 | select DMA_ENGINE |
| 220 | help |
| 221 | Support the i.MX DMA engine. This engine is integrated into |
| 222 | Freescale i.MX1/21/27 chips. |
| 223 | |
| 224 | config IMX_SDMA |
| 225 | tristate "i.MX SDMA support" |
| 226 | depends on ARCH_MXC |
| 227 | select DMA_ENGINE |
| 228 | help |
| 229 | Support the i.MX SDMA engine. This engine is integrated into |
| 230 | Freescale i.MX25/31/35/51/53/6 chips. |
Joachim Eastwood | e5f4ae8 | 2015-07-11 14:12:06 +0200 | [diff] [blame] | 231 | |
Vinod Koul | 9ab8b4e | 2015-09-21 22:18:45 +0530 | [diff] [blame] | 232 | config INTEL_IDMA64 |
Linus Torvalds | 3527122 | 2015-09-04 11:10:18 -0700 | [diff] [blame] | 233 | tristate "Intel integrated DMA 64-bit support" |
| 234 | select DMA_ENGINE |
| 235 | select DMA_VIRTUAL_CHANNELS |
| 236 | help |
| 237 | Enable DMA support for Intel Low Power Subsystem such as found on |
| 238 | Intel Skylake PCH. |
| 239 | |
Chris Leech | 0bbd5f4 | 2006-05-23 17:35:34 -0700 | [diff] [blame] | 240 | config INTEL_IOATDMA |
| 241 | tristate "Intel I/OAT DMA support" |
Dave Jiang | aaecdeb | 2015-08-20 08:44:09 -0700 | [diff] [blame] | 242 | depends on PCI && X86_64 |
Shannon Nelson | 2ed6dc3 | 2007-10-16 01:27:42 -0700 | [diff] [blame] | 243 | select DMA_ENGINE |
Dan Williams | 3cc377b | 2013-12-09 10:33:16 -0800 | [diff] [blame] | 244 | select DMA_ENGINE_RAID |
Shannon Nelson | 2ed6dc3 | 2007-10-16 01:27:42 -0700 | [diff] [blame] | 245 | select DCA |
| 246 | help |
| 247 | Enable support for the Intel(R) I/OAT DMA engine present |
| 248 | in recent Intel Xeon chipsets. |
| 249 | |
| 250 | Say Y here if you have such a chipset. |
| 251 | |
| 252 | If unsure, say N. |
Dan Williams | c211092 | 2007-01-02 13:52:26 -0700 | [diff] [blame] | 253 | |
| 254 | config INTEL_IOP_ADMA |
Shannon Nelson | 2ed6dc3 | 2007-10-16 01:27:42 -0700 | [diff] [blame] | 255 | tristate "Intel IOP ADMA support" |
| 256 | depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX |
Shannon Nelson | 2ed6dc3 | 2007-10-16 01:27:42 -0700 | [diff] [blame] | 257 | select DMA_ENGINE |
Dan Williams | 5fc6d89 | 2010-10-07 16:44:50 -0700 | [diff] [blame] | 258 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
Shannon Nelson | 2ed6dc3 | 2007-10-16 01:27:42 -0700 | [diff] [blame] | 259 | help |
| 260 | Enable support for the Intel(R) IOP Series RAID engines. |
Dan Williams | c211092 | 2007-01-02 13:52:26 -0700 | [diff] [blame] | 261 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 262 | config INTEL_MIC_X100_DMA |
| 263 | tristate "Intel MIC X100 DMA Driver" |
| 264 | depends on 64BIT && X86 && INTEL_MIC_BUS |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 265 | select DMA_ENGINE |
| 266 | help |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 267 | This enables DMA support for the Intel Many Integrated Core |
| 268 | (MIC) family of PCIe form factor coprocessor X100 devices that |
| 269 | run a 64 bit Linux OS. This driver will be used by both MIC |
| 270 | host and card drivers. |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 271 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 272 | If you are building host kernel with a MIC device or a card |
| 273 | kernel for a MIC device, then say M (recommended) or Y, else |
| 274 | say N. If unsure say N. |
| 275 | |
| 276 | More information about the Intel MIC family as well as the Linux |
| 277 | OS and tools for MIC to use with this driver are available from |
| 278 | <http://software.intel.com/en-us/mic-developer>. |
| 279 | |
| 280 | config K3_DMA |
| 281 | tristate "Hisilicon K3 DMA support" |
| 282 | depends on ARCH_HI3xxx |
Andy Shevchenko | 667dfed | 2015-07-27 18:04:02 +0300 | [diff] [blame] | 283 | select DMA_ENGINE |
| 284 | select DMA_VIRTUAL_CHANNELS |
| 285 | help |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 286 | Support the DMA engine for Hisilicon K3 platform |
| 287 | devices. |
Andy Shevchenko | 667dfed | 2015-07-27 18:04:02 +0300 | [diff] [blame] | 288 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 289 | config LPC18XX_DMAMUX |
| 290 | bool "NXP LPC18xx/43xx DMA MUX for PL080" |
| 291 | depends on ARCH_LPC18XX || COMPILE_TEST |
| 292 | depends on OF && AMBA_PL08X |
| 293 | select MFD_SYSCON |
| 294 | help |
| 295 | Enable support for DMA on NXP LPC18xx/43xx platforms |
| 296 | with PL080 and multiplexed DMA request lines. |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 297 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 298 | config MMP_PDMA |
| 299 | bool "MMP PDMA support" |
| 300 | depends on (ARCH_MMP || ARCH_PXA) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 301 | select DMA_ENGINE |
| 302 | help |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 303 | Support the MMP PDMA engine for PXA and MMP platform. |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 304 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 305 | config MMP_TDMA |
| 306 | bool "MMP Two-Channel DMA support" |
| 307 | depends on ARCH_MMP |
Ludovic Desroches | e1f7c9e | 2014-10-22 17:22:18 +0200 | [diff] [blame] | 308 | select DMA_ENGINE |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 309 | select MMP_SRAM |
Ludovic Desroches | e1f7c9e | 2014-10-22 17:22:18 +0200 | [diff] [blame] | 310 | help |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 311 | Support the MMP Two-Channel DMA engine. |
| 312 | This engine used for MMP Audio DMA and pxa910 SQU. |
| 313 | It needs sram driver under mach-mmp. |
Ludovic Desroches | e1f7c9e | 2014-10-22 17:22:18 +0200 | [diff] [blame] | 314 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 315 | config MOXART_DMA |
| 316 | tristate "MOXART DMA support" |
| 317 | depends on ARCH_MOXART |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 318 | select DMA_ENGINE |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 319 | select DMA_OF |
| 320 | select DMA_VIRTUAL_CHANNELS |
| 321 | help |
| 322 | Enable support for the MOXA ART SoC DMA controller. |
| 323 | |
| 324 | Say Y here if you enabled MMP ADMA, otherwise say N. |
Andy Shevchenko | 2b49e0c | 2015-02-23 16:24:42 +0200 | [diff] [blame] | 325 | |
Piotr Ziecik | 0fb6f73 | 2010-02-05 03:42:52 +0000 | [diff] [blame] | 326 | config MPC512X_DMA |
| 327 | tristate "Freescale MPC512x built-in DMA engine support" |
Ilya Yanok | ba2eea2 | 2010-10-27 01:52:57 +0200 | [diff] [blame] | 328 | depends on PPC_MPC512x || PPC_MPC831x |
Piotr Ziecik | 0fb6f73 | 2010-02-05 03:42:52 +0000 | [diff] [blame] | 329 | select DMA_ENGINE |
| 330 | ---help--- |
| 331 | Enable support for the Freescale MPC512x built-in DMA engine. |
| 332 | |
Saeed Bishara | ff7b047 | 2008-07-08 11:58:36 -0700 | [diff] [blame] | 333 | config MV_XOR |
| 334 | bool "Marvell XOR engine support" |
| 335 | depends on PLAT_ORION |
Saeed Bishara | ff7b047 | 2008-07-08 11:58:36 -0700 | [diff] [blame] | 336 | select DMA_ENGINE |
Dan Williams | 3cc377b | 2013-12-09 10:33:16 -0800 | [diff] [blame] | 337 | select DMA_ENGINE_RAID |
Dan Williams | 5fc6d89 | 2010-10-07 16:44:50 -0700 | [diff] [blame] | 338 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
Saeed Bishara | ff7b047 | 2008-07-08 11:58:36 -0700 | [diff] [blame] | 339 | ---help--- |
| 340 | Enable support for the Marvell XOR engine. |
| 341 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 342 | config MXS_DMA |
| 343 | bool "MXS DMA support" |
| 344 | depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q |
| 345 | select STMP_DEVICE |
| 346 | select DMA_ENGINE |
| 347 | help |
| 348 | Support the MXS DMA engine. This engine including APBH-DMA |
| 349 | and APBX-DMA is integrated into Freescale i.MX23/28/MX6Q/MX6DL chips. |
| 350 | |
Guennadi Liakhovetski | 5296b56 | 2009-01-19 15:36:21 -0700 | [diff] [blame] | 351 | config MX3_IPU |
| 352 | bool "MX3x Image Processing Unit support" |
Sascha Hauer | 8e2d41f | 2011-08-24 08:41:09 +0200 | [diff] [blame] | 353 | depends on ARCH_MXC |
Guennadi Liakhovetski | 5296b56 | 2009-01-19 15:36:21 -0700 | [diff] [blame] | 354 | select DMA_ENGINE |
| 355 | default y |
| 356 | help |
| 357 | If you plan to use the Image Processing unit in the i.MX3x, say |
| 358 | Y here. If unsure, select Y. |
| 359 | |
| 360 | config MX3_IPU_IRQS |
| 361 | int "Number of dynamically mapped interrupts for IPU" |
| 362 | depends on MX3_IPU |
| 363 | range 2 137 |
| 364 | default 4 |
| 365 | help |
| 366 | Out of 137 interrupt sources on i.MX31 IPU only very few are used. |
| 367 | To avoid bloating the irq_desc[] array we allocate a sufficient |
| 368 | number of IRQ slots and map them dynamically to specific sources. |
| 369 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 370 | config NBPFAXI_DMA |
| 371 | tristate "Renesas Type-AXI NBPF DMA support" |
| 372 | select DMA_ENGINE |
| 373 | depends on ARM || COMPILE_TEST |
| 374 | help |
| 375 | Support for "Type-AXI" NBPF DMA IPs from Renesas |
| 376 | |
| 377 | config PCH_DMA |
| 378 | tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" |
| 379 | depends on PCI && (X86_32 || COMPILE_TEST) |
| 380 | select DMA_ENGINE |
| 381 | help |
| 382 | Enable support for Intel EG20T PCH DMA engine. |
| 383 | |
| 384 | This driver also can be used for LAPIS Semiconductor IOH(Input/ |
| 385 | Output Hub), ML7213, ML7223 and ML7831. |
| 386 | ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is |
| 387 | for MP(Media Phone) use and ML7831 IOH is for general purpose use. |
| 388 | ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. |
| 389 | ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. |
| 390 | |
| 391 | config PL330_DMA |
| 392 | tristate "DMA API Driver for PL330" |
| 393 | select DMA_ENGINE |
| 394 | depends on ARM_AMBA |
| 395 | help |
| 396 | Select if your platform has one or more PL330 DMACs. |
| 397 | You need to provide platform specific settings via |
| 398 | platform_data for a dma-pl330 device. |
| 399 | |
Robert Jarzmik | a57e16c | 2015-05-25 23:29:20 +0200 | [diff] [blame] | 400 | config PXA_DMA |
| 401 | bool "PXA DMA support" |
| 402 | depends on (ARCH_MMP || ARCH_PXA) |
| 403 | select DMA_ENGINE |
| 404 | select DMA_VIRTUAL_CHANNELS |
| 405 | help |
| 406 | Support the DMA engine for PXA. It is also compatible with MMP PDMA |
| 407 | platform. The internal DMA IP of all PXA variants is supported, with |
| 408 | 16 to 32 channels for peripheral to memory or memory to memory |
| 409 | transfers. |
| 410 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 411 | config QCOM_BAM_DMA |
| 412 | tristate "QCOM BAM DMA support" |
| 413 | depends on ARCH_QCOM || (COMPILE_TEST && OF && ARM) |
| 414 | select DMA_ENGINE |
| 415 | select DMA_VIRTUAL_CHANNELS |
| 416 | ---help--- |
| 417 | Enable support for the QCOM BAM DMA controller. This controller |
| 418 | provides DMA capabilities for a variety of on-chip devices. |
| 419 | |
| 420 | config SIRF_DMA |
| 421 | tristate "CSR SiRFprimaII/SiRFmarco DMA support" |
| 422 | depends on ARCH_SIRF |
| 423 | select DMA_ENGINE |
| 424 | help |
| 425 | Enable support for the CSR SiRFprimaII DMA engine. |
| 426 | |
| 427 | config STE_DMA40 |
| 428 | bool "ST-Ericsson DMA40 support" |
| 429 | depends on ARCH_U8500 |
| 430 | select DMA_ENGINE |
| 431 | help |
| 432 | Support for ST-Ericsson DMA40 controller |
| 433 | |
| 434 | config S3C24XX_DMAC |
| 435 | tristate "Samsung S3C24XX DMA support" |
| 436 | depends on ARCH_S3C24XX |
| 437 | select DMA_ENGINE |
| 438 | select DMA_VIRTUAL_CHANNELS |
| 439 | help |
| 440 | Support for the Samsung S3C24XX DMA controller driver. The |
| 441 | DMA controller is having multiple DMA channels which can be |
| 442 | configured for different peripherals like audio, UART, SPI. |
| 443 | The DMA controller can transfer data from memory to peripheral, |
| 444 | periphal to memory, periphal to periphal and memory to memory. |
| 445 | |
Atsushi Nemoto | ea76f0b | 2009-04-23 00:40:30 +0900 | [diff] [blame] | 446 | config TXX9_DMAC |
| 447 | tristate "Toshiba TXx9 SoC DMA support" |
| 448 | depends on MACH_TX49XX || MACH_TX39XX |
| 449 | select DMA_ENGINE |
| 450 | help |
| 451 | Support the TXx9 SoC internal DMA controller. This can be |
| 452 | integrated in chips such as the Toshiba TX4927/38/39. |
| 453 | |
Laxman Dewangan | ec8a158 | 2012-06-06 10:55:27 +0530 | [diff] [blame] | 454 | config TEGRA20_APB_DMA |
| 455 | bool "NVIDIA Tegra20 APB DMA support" |
| 456 | depends on ARCH_TEGRA |
| 457 | select DMA_ENGINE |
| 458 | help |
| 459 | Support for the NVIDIA Tegra20 APB DMA controller driver. The |
| 460 | DMA controller is having multiple DMA channel which can be |
| 461 | configured for different peripherals like audio, UART, SPI, |
| 462 | I2C etc which is in APB bus. |
| 463 | This DMA controller transfers data from memory to peripheral fifo |
| 464 | or vice versa. It does not support memory to memory data transfer. |
| 465 | |
Richard Röjfors | de5d445 | 2010-03-25 19:44:21 +0100 | [diff] [blame] | 466 | config TIMB_DMA |
| 467 | tristate "Timberdale FPGA DMA support" |
Jean Delvare | 2dda47d | 2014-04-03 11:32:06 +0200 | [diff] [blame] | 468 | depends on MFD_TIMBERDALE |
Richard Röjfors | de5d445 | 2010-03-25 19:44:21 +0100 | [diff] [blame] | 469 | select DMA_ENGINE |
| 470 | help |
| 471 | Enable support for the Timberdale FPGA DMA engine. |
| 472 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 473 | config TI_CPPI41 |
| 474 | tristate "AM33xx CPPI41 DMA support" |
| 475 | depends on ARCH_OMAP |
Rongjun Ying | ca21a14 | 2011-10-27 19:22:39 -0700 | [diff] [blame] | 476 | select DMA_ENGINE |
| 477 | help |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 478 | The Communications Port Programming Interface (CPPI) 4.1 DMA engine |
| 479 | is currently used by the USB driver on AM335x platforms. |
| 480 | |
| 481 | config TI_DMA_CROSSBAR |
| 482 | bool |
Rongjun Ying | ca21a14 | 2011-10-27 19:22:39 -0700 | [diff] [blame] | 483 | |
Matt Porter | c2dde5f | 2012-08-22 21:09:34 -0400 | [diff] [blame] | 484 | config TI_EDMA |
Guenter Roeck | 7644804 | 2013-08-22 14:03:24 -0700 | [diff] [blame] | 485 | bool "TI EDMA support" |
Santosh Shilimkar | e7ed8b4 | 2013-09-30 11:04:42 -0400 | [diff] [blame] | 486 | depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE |
Matt Porter | c2dde5f | 2012-08-22 21:09:34 -0400 | [diff] [blame] | 487 | select DMA_ENGINE |
| 488 | select DMA_VIRTUAL_CHANNELS |
Peter Ujfalusi | f7c7cae | 2015-10-16 10:18:09 +0300 | [diff] [blame] | 489 | select TI_DMA_CROSSBAR if ARCH_OMAP |
Matt Porter | c2dde5f | 2012-08-22 21:09:34 -0400 | [diff] [blame] | 490 | default n |
| 491 | help |
| 492 | Enable support for the TI EDMA controller. This DMA |
| 493 | engine is found on TI DaVinci and AM33xx parts. |
| 494 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 495 | config XGENE_DMA |
| 496 | tristate "APM X-Gene DMA support" |
| 497 | depends on ARCH_XGENE || COMPILE_TEST |
Jassi Brar | b3040e4 | 2010-05-23 20:28:19 -0700 | [diff] [blame] | 498 | select DMA_ENGINE |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 499 | select DMA_ENGINE_RAID |
| 500 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
Jassi Brar | b3040e4 | 2010-05-23 20:28:19 -0700 | [diff] [blame] | 501 | help |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 502 | Enable support for the APM X-Gene SoC DMA engine. |
Jonas Jensen | 5f9e685 | 2014-01-17 09:46:05 +0100 | [diff] [blame] | 503 | |
Srikanth Thokala | 9cd4360 | 2014-04-23 20:23:26 +0530 | [diff] [blame] | 504 | config XILINX_VDMA |
| 505 | tristate "Xilinx AXI VDMA Engine" |
| 506 | depends on (ARCH_ZYNQ || MICROBLAZE) |
| 507 | select DMA_ENGINE |
| 508 | help |
| 509 | Enable support for Xilinx AXI VDMA Soft IP. |
| 510 | |
| 511 | This engine provides high-bandwidth direct memory access |
| 512 | between memory and AXI4-Stream video type target |
| 513 | peripherals including peripherals which support AXI4- |
| 514 | Stream Video Protocol. It has two stream interfaces/ |
| 515 | channels, Memory Mapped to Stream (MM2S) and Stream to |
| 516 | Memory Mapped (S2MM) for the data transfers. |
| 517 | |
Jun Nie | e3fa984 | 2015-05-05 22:06:08 +0800 | [diff] [blame] | 518 | config ZX_DMA |
| 519 | tristate "ZTE ZX296702 DMA support" |
| 520 | depends on ARCH_ZX |
Maxime Ripard | 5558593 | 2014-07-17 21:46:16 +0200 | [diff] [blame] | 521 | select DMA_ENGINE |
| 522 | select DMA_VIRTUAL_CHANNELS |
| 523 | help |
Jun Nie | e3fa984 | 2015-05-05 22:06:08 +0800 | [diff] [blame] | 524 | Support the DMA engine for ZTE ZX296702 platform devices. |
Maxime Ripard | 5558593 | 2014-07-17 21:46:16 +0200 | [diff] [blame] | 525 | |
Guennadi Liakhovetski | b45b262 | 2014-07-19 12:48:51 +0200 | [diff] [blame] | 526 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 527 | # driver files |
| 528 | source "drivers/dma/bestcomm/Kconfig" |
Andrew Bresticker | 5689ba7 | 2014-12-11 14:59:17 -0800 | [diff] [blame] | 529 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 530 | source "drivers/dma/dw/Kconfig" |
Rameshwar Prasad Sahu | 9f2fd0d | 2015-03-18 19:17:34 +0530 | [diff] [blame] | 531 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 532 | source "drivers/dma/hsu/Kconfig" |
Shannon Nelson | 2ed6dc3 | 2007-10-16 01:27:42 -0700 | [diff] [blame] | 533 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 534 | source "drivers/dma/sh/Kconfig" |
Russell King | 50437bf | 2012-04-13 12:07:23 +0100 | [diff] [blame] | 535 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 536 | # clients |
Shannon Nelson | 2ed6dc3 | 2007-10-16 01:27:42 -0700 | [diff] [blame] | 537 | comment "DMA Clients" |
| 538 | depends on DMA_ENGINE |
| 539 | |
Dan Williams | 729b5d1 | 2009-03-25 09:13:25 -0700 | [diff] [blame] | 540 | config ASYNC_TX_DMA |
| 541 | bool "Async_tx: Offload support for the async_tx api" |
Dan Williams | 9a8de63 | 2009-09-08 15:06:10 -0700 | [diff] [blame] | 542 | depends on DMA_ENGINE |
Dan Williams | 729b5d1 | 2009-03-25 09:13:25 -0700 | [diff] [blame] | 543 | help |
| 544 | This allows the async_tx api to take advantage of offload engines for |
| 545 | memcpy, memset, xor, and raid6 p+q operations. If your platform has |
| 546 | a dma engine that can perform raid operations and you have enabled |
| 547 | MD_RAID456 say Y. |
| 548 | |
| 549 | If unsure, say N. |
| 550 | |
Haavard Skinnemoen | 4a776f0 | 2008-07-08 11:58:45 -0700 | [diff] [blame] | 551 | config DMATEST |
| 552 | tristate "DMA Test client" |
| 553 | depends on DMA_ENGINE |
| 554 | help |
| 555 | Simple DMA test client. Say N unless you're debugging a |
| 556 | DMA Device driver. |
| 557 | |
Dan Williams | 3cc377b | 2013-12-09 10:33:16 -0800 | [diff] [blame] | 558 | config DMA_ENGINE_RAID |
| 559 | bool |
| 560 | |
Shannon Nelson | 2ed6dc3 | 2007-10-16 01:27:42 -0700 | [diff] [blame] | 561 | endif |