blob: d1ec0cab2dee0daa986a8ddd75f10222cbcd25bb [file] [log] [blame]
Dinh Nguyenc2ad2842013-02-11 17:30:30 -06001/*
2 * Copyright (C) 2013 Altera Corporation <www.altera.com>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18/dts-v1/;
19/include/ "socfpga.dtsi"
20
21/ {
22 model = "Altera SOCFPGA VT";
23 compatible = "altr,socfpga-vt", "altr,socfpga";
24
25 chosen {
26 bootargs = "console=ttyS0,57600";
27 };
28
29 memory {
30 name = "memory";
31 device_type = "memory";
32 reg = <0x0 0x40000000>; /* 1 GB */
33 };
34
35 soc {
Dinh Nguyen042000b2013-04-11 10:55:25 -050036 clkmgr@ffd04000 {
37 clocks {
38 osc1 {
39 clock-frequency = <10000000>;
40 };
41 };
42 };
43
Dinh Nguyen3d954cf2013-06-05 10:02:53 -050044 ethernet@ff700000 {
45 phy-mode = "gmii";
46 status = "okay";
47 };
48
Dinh Nguyenc2ad2842013-02-11 17:30:30 -060049 timer0@ffc08000 {
50 clock-frequency = <7000000>;
51 };
52
53 timer1@ffc09000 {
54 clock-frequency = <7000000>;
55 };
56
57 timer2@ffd00000 {
58 clock-frequency = <7000000>;
59 };
60
61 timer3@ffd01000 {
62 clock-frequency = <7000000>;
63 };
64
65 serial0@ffc02000 {
66 clock-frequency = <7372800>;
67 };
68
69 serial1@ffc03000 {
70 clock-frequency = <7372800>;
71 };
Dinh Nguyend6dd7352013-02-11 17:30:33 -060072
73 sysmgr@ffd08000 {
74 cpu1-start-addr = <0xffd08010>;
75 };
Dinh Nguyenc2ad2842013-02-11 17:30:30 -060076 };
77};