Saeed Bishara | edabd38 | 2009-08-06 15:12:43 +0300 | [diff] [blame^] | 1 | /* |
| 2 | * arch/arm/mach-dove/include/mach/gpio.h |
| 3 | * |
| 4 | * This file is licensed under the terms of the GNU General Public |
| 5 | * License version 2. This program is licensed "as is" without any |
| 6 | * warranty of any kind, whether express or implied. |
| 7 | */ |
| 8 | |
| 9 | #ifndef __ASM_ARCH_GPIO_H |
| 10 | #define __ASM_ARCH_GPIO_H |
| 11 | |
| 12 | #include <asm/errno.h> |
| 13 | #include <mach/irqs.h> |
| 14 | #include <plat/gpio.h> |
| 15 | #include <asm-generic/gpio.h> /* cansleep wrappers */ |
| 16 | |
| 17 | #define GPIO_MAX 64 |
| 18 | |
| 19 | #define GPIO_BASE_LO (DOVE_GPIO_VIRT_BASE + 0x00) |
| 20 | #define GPIO_BASE_HI (DOVE_GPIO_VIRT_BASE + 0x20) |
| 21 | |
| 22 | #define GPIO_BASE(pin) ((pin < 32) ? GPIO_BASE_LO : GPIO_BASE_HI) |
| 23 | |
| 24 | #define GPIO_OUT(pin) (GPIO_BASE(pin) + 0x00) |
| 25 | #define GPIO_IO_CONF(pin) (GPIO_BASE(pin) + 0x04) |
| 26 | #define GPIO_BLINK_EN(pin) (GPIO_BASE(pin) + 0x08) |
| 27 | #define GPIO_IN_POL(pin) (GPIO_BASE(pin) + 0x0c) |
| 28 | #define GPIO_DATA_IN(pin) (GPIO_BASE(pin) + 0x10) |
| 29 | #define GPIO_EDGE_CAUSE(pin) (GPIO_BASE(pin) + 0x14) |
| 30 | #define GPIO_EDGE_MASK(pin) (GPIO_BASE(pin) + 0x18) |
| 31 | #define GPIO_LEVEL_MASK(pin) (GPIO_BASE(pin) + 0x1c) |
| 32 | |
| 33 | static inline int gpio_to_irq(int pin) |
| 34 | { |
| 35 | if (pin < NR_GPIO_IRQS) |
| 36 | return pin + IRQ_DOVE_GPIO_START; |
| 37 | |
| 38 | return -EINVAL; |
| 39 | } |
| 40 | |
| 41 | static inline int irq_to_gpio(int irq) |
| 42 | { |
| 43 | if (IRQ_DOVE_GPIO_START < irq && irq < NR_IRQS) |
| 44 | return irq - IRQ_DOVE_GPIO_START; |
| 45 | |
| 46 | return -EINVAL; |
| 47 | } |
| 48 | |
| 49 | #endif |