Ben Dooks | a21765a | 2007-02-11 18:31:01 +0100 | [diff] [blame] | 1 | /* linux/arch/arm/plat-s3c24xx/cpu.c |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * |
| 3 | * Copyright (c) 2004-2005 Simtec Electronics |
| 4 | * http://www.simtec.co.uk/products/SWLINUX/ |
| 5 | * Ben Dooks <ben@simtec.co.uk> |
| 6 | * |
Heiko Stuebner | 4a9f52f | 2012-05-12 16:22:17 +0900 | [diff] [blame] | 7 | * Common code for S3C24XX machines |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; either version 2 of the License, or |
| 12 | * (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | |
| 25 | #include <linux/init.h> |
| 26 | #include <linux/module.h> |
| 27 | #include <linux/interrupt.h> |
| 28 | #include <linux/ioport.h> |
Ben Dooks | b6d1f54 | 2006-12-17 23:22:26 +0100 | [diff] [blame] | 29 | #include <linux/serial_core.h> |
Russell King | d052d1b | 2005-10-29 19:07:23 +0100 | [diff] [blame] | 30 | #include <linux/platform_device.h> |
Ben Dooks | 3c7d9c8 | 2008-04-16 00:15:20 +0100 | [diff] [blame] | 31 | #include <linux/delay.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame] | 32 | #include <linux/io.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 34 | #include <mach/hardware.h> |
Nicolas Pitre | 9231127 | 2011-08-03 11:34:59 -0400 | [diff] [blame] | 35 | #include <mach/regs-clock.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | #include <asm/irq.h> |
Ben Dooks | 3c7d9c8 | 2008-04-16 00:15:20 +0100 | [diff] [blame] | 37 | #include <asm/cacheflush.h> |
David Howells | 9f97da7 | 2012-03-28 18:30:01 +0100 | [diff] [blame] | 38 | #include <asm/system_info.h> |
Olof Johansson | 86dfe44 | 2012-03-29 23:22:44 -0700 | [diff] [blame] | 39 | #include <asm/system_misc.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 40 | |
| 41 | #include <asm/mach/arch.h> |
| 42 | #include <asm/mach/map.h> |
| 43 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 44 | #include <mach/regs-gpio.h> |
Ben Dooks | a2b7ba9 | 2008-10-07 22:26:09 +0100 | [diff] [blame] | 45 | #include <plat/regs-serial.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 46 | |
Ben Dooks | a2b7ba9 | 2008-10-07 22:26:09 +0100 | [diff] [blame] | 47 | #include <plat/cpu.h> |
| 48 | #include <plat/devs.h> |
Ben Dooks | d5120ae | 2008-10-07 23:09:51 +0100 | [diff] [blame] | 49 | #include <plat/clock.h> |
Ben Dooks | a2b7ba9 | 2008-10-07 22:26:09 +0100 | [diff] [blame] | 50 | #include <plat/s3c2410.h> |
Ben Dooks | d5120ae | 2008-10-07 23:09:51 +0100 | [diff] [blame] | 51 | #include <plat/s3c2412.h> |
Yauhen Kharuzhy | f1290a4 | 2010-04-28 18:09:01 +0900 | [diff] [blame] | 52 | #include <plat/s3c2416.h> |
Ben Dooks | 58bac7b | 2010-01-26 16:47:41 +0900 | [diff] [blame] | 53 | #include <plat/s3c244x.h> |
Ben Dooks | a2b7ba9 | 2008-10-07 22:26:09 +0100 | [diff] [blame] | 54 | #include <plat/s3c2443.h> |
Heiko Stuebner | 2473f71 | 2012-05-12 16:22:18 +0900 | [diff] [blame] | 55 | #include <plat/cpu-freq.h> |
| 56 | #include <plat/pll.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 57 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 58 | /* table of supported CPUs */ |
| 59 | |
| 60 | static const char name_s3c2410[] = "S3C2410"; |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 61 | static const char name_s3c2412[] = "S3C2412"; |
Ben Dooks | 63b1f51 | 2010-04-30 16:32:26 +0900 | [diff] [blame] | 62 | static const char name_s3c2416[] = "S3C2416/S3C2450"; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 63 | static const char name_s3c2440[] = "S3C2440"; |
Ben Dooks | 96ce238 | 2006-06-18 23:06:41 +0100 | [diff] [blame] | 64 | static const char name_s3c2442[] = "S3C2442"; |
Harald Welte | f5fb9b1 | 2009-09-22 21:40:39 +0100 | [diff] [blame] | 65 | static const char name_s3c2442b[] = "S3C2442B"; |
Ben Dooks | e4d06e3 | 2007-02-16 12:12:31 +0100 | [diff] [blame] | 66 | static const char name_s3c2443[] = "S3C2443"; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 67 | static const char name_s3c2410a[] = "S3C2410A"; |
| 68 | static const char name_s3c2440a[] = "S3C2440A"; |
| 69 | |
| 70 | static struct cpu_table cpu_ids[] __initdata = { |
| 71 | { |
| 72 | .idcode = 0x32410000, |
| 73 | .idmask = 0xffffffff, |
| 74 | .map_io = s3c2410_map_io, |
| 75 | .init_clocks = s3c2410_init_clocks, |
| 76 | .init_uarts = s3c2410_init_uarts, |
| 77 | .init = s3c2410_init, |
| 78 | .name = name_s3c2410 |
| 79 | }, |
| 80 | { |
| 81 | .idcode = 0x32410002, |
| 82 | .idmask = 0xffffffff, |
| 83 | .map_io = s3c2410_map_io, |
| 84 | .init_clocks = s3c2410_init_clocks, |
| 85 | .init_uarts = s3c2410_init_uarts, |
Ben Dooks | f017679 | 2009-07-30 23:23:38 +0100 | [diff] [blame] | 86 | .init = s3c2410a_init, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 87 | .name = name_s3c2410a |
| 88 | }, |
| 89 | { |
| 90 | .idcode = 0x32440000, |
| 91 | .idmask = 0xffffffff, |
Vasily Khoruzhick | 812c4e4 | 2010-12-01 08:29:23 +0200 | [diff] [blame] | 92 | .map_io = s3c2440_map_io, |
Ben Dooks | 96ce238 | 2006-06-18 23:06:41 +0100 | [diff] [blame] | 93 | .init_clocks = s3c244x_init_clocks, |
| 94 | .init_uarts = s3c244x_init_uarts, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 95 | .init = s3c2440_init, |
| 96 | .name = name_s3c2440 |
| 97 | }, |
| 98 | { |
| 99 | .idcode = 0x32440001, |
| 100 | .idmask = 0xffffffff, |
Vasily Khoruzhick | 812c4e4 | 2010-12-01 08:29:23 +0200 | [diff] [blame] | 101 | .map_io = s3c2440_map_io, |
Ben Dooks | 96ce238 | 2006-06-18 23:06:41 +0100 | [diff] [blame] | 102 | .init_clocks = s3c244x_init_clocks, |
| 103 | .init_uarts = s3c244x_init_uarts, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 104 | .init = s3c2440_init, |
| 105 | .name = name_s3c2440a |
Lucas Correia Villa Real | 83f755f | 2006-02-01 21:24:24 +0000 | [diff] [blame] | 106 | }, |
| 107 | { |
Ben Dooks | 96ce238 | 2006-06-18 23:06:41 +0100 | [diff] [blame] | 108 | .idcode = 0x32440aaa, |
| 109 | .idmask = 0xffffffff, |
Vasily Khoruzhick | 812c4e4 | 2010-12-01 08:29:23 +0200 | [diff] [blame] | 110 | .map_io = s3c2442_map_io, |
Ben Dooks | 96ce238 | 2006-06-18 23:06:41 +0100 | [diff] [blame] | 111 | .init_clocks = s3c244x_init_clocks, |
| 112 | .init_uarts = s3c244x_init_uarts, |
| 113 | .init = s3c2442_init, |
| 114 | .name = name_s3c2442 |
| 115 | }, |
| 116 | { |
Harald Welte | f5fb9b1 | 2009-09-22 21:40:39 +0100 | [diff] [blame] | 117 | .idcode = 0x32440aab, |
| 118 | .idmask = 0xffffffff, |
Vasily Khoruzhick | 812c4e4 | 2010-12-01 08:29:23 +0200 | [diff] [blame] | 119 | .map_io = s3c2442_map_io, |
Harald Welte | f5fb9b1 | 2009-09-22 21:40:39 +0100 | [diff] [blame] | 120 | .init_clocks = s3c244x_init_clocks, |
| 121 | .init_uarts = s3c244x_init_uarts, |
| 122 | .init = s3c2442_init, |
| 123 | .name = name_s3c2442b |
| 124 | }, |
| 125 | { |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 126 | .idcode = 0x32412001, |
| 127 | .idmask = 0xffffffff, |
| 128 | .map_io = s3c2412_map_io, |
| 129 | .init_clocks = s3c2412_init_clocks, |
| 130 | .init_uarts = s3c2412_init_uarts, |
| 131 | .init = s3c2412_init, |
| 132 | .name = name_s3c2412, |
| 133 | }, |
Ben Dooks | d9bc55f | 2006-09-20 20:39:15 +0100 | [diff] [blame] | 134 | { /* a newer version of the s3c2412 */ |
| 135 | .idcode = 0x32412003, |
| 136 | .idmask = 0xffffffff, |
| 137 | .map_io = s3c2412_map_io, |
| 138 | .init_clocks = s3c2412_init_clocks, |
| 139 | .init_uarts = s3c2412_init_uarts, |
| 140 | .init = s3c2412_init, |
| 141 | .name = name_s3c2412, |
| 142 | }, |
Yauhen Kharuzhy | f1290a4 | 2010-04-28 18:09:01 +0900 | [diff] [blame] | 143 | { /* a strange version of the s3c2416 */ |
| 144 | .idcode = 0x32450003, |
| 145 | .idmask = 0xffffffff, |
| 146 | .map_io = s3c2416_map_io, |
| 147 | .init_clocks = s3c2416_init_clocks, |
| 148 | .init_uarts = s3c2416_init_uarts, |
| 149 | .init = s3c2416_init, |
| 150 | .name = name_s3c2416, |
| 151 | }, |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 152 | { |
Ben Dooks | e4d06e3 | 2007-02-16 12:12:31 +0100 | [diff] [blame] | 153 | .idcode = 0x32443001, |
| 154 | .idmask = 0xffffffff, |
| 155 | .map_io = s3c2443_map_io, |
| 156 | .init_clocks = s3c2443_init_clocks, |
| 157 | .init_uarts = s3c2443_init_uarts, |
| 158 | .init = s3c2443_init, |
| 159 | .name = name_s3c2443, |
| 160 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 161 | }; |
| 162 | |
| 163 | /* minimal IO mapping */ |
| 164 | |
| 165 | static struct map_desc s3c_iodesc[] __initdata = { |
| 166 | IODESC_ENT(GPIO), |
| 167 | IODESC_ENT(IRQ), |
| 168 | IODESC_ENT(MEMCTRL), |
| 169 | IODESC_ENT(UART) |
| 170 | }; |
| 171 | |
Ben Dooks | 74b265d | 2008-10-21 14:06:31 +0100 | [diff] [blame] | 172 | /* read cpu identificaiton code */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 173 | |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 174 | static unsigned long s3c24xx_read_idcode_v5(void) |
| 175 | { |
Ben Dooks | d11a7d7 | 2010-04-28 18:00:07 +0900 | [diff] [blame] | 176 | #if defined(CONFIG_CPU_S3C2416) |
| 177 | /* s3c2416 is v5, with S3C24XX_GSTATUS1 instead of S3C2412_GSTATUS1 */ |
| 178 | |
| 179 | u32 gs = __raw_readl(S3C24XX_GSTATUS1); |
| 180 | |
| 181 | /* test for s3c2416 or similar device */ |
| 182 | if ((gs >> 16) == 0x3245) |
| 183 | return gs; |
| 184 | #endif |
| 185 | |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 186 | #if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413) |
| 187 | return __raw_readl(S3C2412_GSTATUS1); |
| 188 | #else |
| 189 | return 1UL; /* don't look like an 2400 */ |
| 190 | #endif |
| 191 | } |
| 192 | |
| 193 | static unsigned long s3c24xx_read_idcode_v4(void) |
| 194 | { |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 195 | return __raw_readl(S3C2410_GSTATUS1); |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 196 | } |
| 197 | |
Nicolas Pitre | 9231127 | 2011-08-03 11:34:59 -0400 | [diff] [blame] | 198 | static void s3c24xx_default_idle(void) |
| 199 | { |
Cong Ding | 813f13e | 2013-01-18 08:58:23 -0800 | [diff] [blame] | 200 | unsigned long tmp = 0; |
Nicolas Pitre | 9231127 | 2011-08-03 11:34:59 -0400 | [diff] [blame] | 201 | int i; |
| 202 | |
| 203 | /* idle the system by using the idle mode which will wait for an |
| 204 | * interrupt to happen before restarting the system. |
| 205 | */ |
| 206 | |
| 207 | /* Warning: going into idle state upsets jtag scanning */ |
| 208 | |
| 209 | __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE, |
| 210 | S3C2410_CLKCON); |
| 211 | |
| 212 | /* the samsung port seems to do a loop and then unset idle.. */ |
| 213 | for (i = 0; i < 50; i++) |
| 214 | tmp += __raw_readl(S3C2410_CLKCON); /* ensure loop not optimised out */ |
| 215 | |
| 216 | /* this bit is not cleared on re-start... */ |
| 217 | |
| 218 | __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE, |
| 219 | S3C2410_CLKCON); |
| 220 | } |
| 221 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 222 | void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) |
| 223 | { |
Nicolas Pitre | 9231127 | 2011-08-03 11:34:59 -0400 | [diff] [blame] | 224 | arm_pm_idle = s3c24xx_default_idle; |
| 225 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 226 | /* initialise the io descriptors we need for initialisation */ |
Ben Dooks | 74b265d | 2008-10-21 14:06:31 +0100 | [diff] [blame] | 227 | iotable_init(mach_desc, size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 228 | iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); |
| 229 | |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 230 | if (cpu_architecture() >= CPU_ARCH_ARMv5) { |
Kukjin Kim | c06af3c | 2011-08-20 02:18:18 +0900 | [diff] [blame] | 231 | samsung_cpu_id = s3c24xx_read_idcode_v5(); |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 232 | } else { |
Kukjin Kim | c06af3c | 2011-08-20 02:18:18 +0900 | [diff] [blame] | 233 | samsung_cpu_id = s3c24xx_read_idcode_v4(); |
Ben Dooks | 68d9ab3 | 2006-06-24 21:21:27 +0100 | [diff] [blame] | 234 | } |
Kukjin Kim | e6d1cb9 | 2011-08-20 12:18:07 +0900 | [diff] [blame] | 235 | s3c24xx_init_cpu(); |
Lucas Correia Villa Real | 83f755f | 2006-02-01 21:24:24 +0000 | [diff] [blame] | 236 | |
Kukjin Kim | c06af3c | 2011-08-20 02:18:18 +0900 | [diff] [blame] | 237 | s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 238 | } |
Heiko Stuebner | 618ae08 | 2012-05-12 16:22:17 +0900 | [diff] [blame] | 239 | |
| 240 | /* Serial port registrations */ |
| 241 | |
| 242 | static struct resource s3c2410_uart0_resource[] = { |
Tushar Behera | 99dbdd9 | 2012-05-12 16:24:59 +0900 | [diff] [blame] | 243 | [0] = DEFINE_RES_MEM(S3C2410_PA_UART0, SZ_16K), |
| 244 | [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX0, \ |
| 245 | IRQ_S3CUART_ERR0 - IRQ_S3CUART_RX0 + 1, \ |
| 246 | NULL, IORESOURCE_IRQ) |
Heiko Stuebner | 618ae08 | 2012-05-12 16:22:17 +0900 | [diff] [blame] | 247 | }; |
| 248 | |
| 249 | static struct resource s3c2410_uart1_resource[] = { |
Tushar Behera | 99dbdd9 | 2012-05-12 16:24:59 +0900 | [diff] [blame] | 250 | [0] = DEFINE_RES_MEM(S3C2410_PA_UART1, SZ_16K), |
| 251 | [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX1, \ |
| 252 | IRQ_S3CUART_ERR1 - IRQ_S3CUART_RX1 + 1, \ |
| 253 | NULL, IORESOURCE_IRQ) |
Heiko Stuebner | 618ae08 | 2012-05-12 16:22:17 +0900 | [diff] [blame] | 254 | }; |
| 255 | |
| 256 | static struct resource s3c2410_uart2_resource[] = { |
Tushar Behera | 99dbdd9 | 2012-05-12 16:24:59 +0900 | [diff] [blame] | 257 | [0] = DEFINE_RES_MEM(S3C2410_PA_UART2, SZ_16K), |
| 258 | [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX2, \ |
| 259 | IRQ_S3CUART_ERR2 - IRQ_S3CUART_RX2 + 1, \ |
| 260 | NULL, IORESOURCE_IRQ) |
Heiko Stuebner | 618ae08 | 2012-05-12 16:22:17 +0900 | [diff] [blame] | 261 | }; |
| 262 | |
| 263 | static struct resource s3c2410_uart3_resource[] = { |
Tushar Behera | 99dbdd9 | 2012-05-12 16:24:59 +0900 | [diff] [blame] | 264 | [0] = DEFINE_RES_MEM(S3C2443_PA_UART3, SZ_16K), |
| 265 | [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX3, \ |
| 266 | IRQ_S3CUART_ERR3 - IRQ_S3CUART_RX3 + 1, \ |
| 267 | NULL, IORESOURCE_IRQ) |
Heiko Stuebner | 618ae08 | 2012-05-12 16:22:17 +0900 | [diff] [blame] | 268 | }; |
| 269 | |
| 270 | struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = { |
| 271 | [0] = { |
| 272 | .resources = s3c2410_uart0_resource, |
| 273 | .nr_resources = ARRAY_SIZE(s3c2410_uart0_resource), |
| 274 | }, |
| 275 | [1] = { |
| 276 | .resources = s3c2410_uart1_resource, |
| 277 | .nr_resources = ARRAY_SIZE(s3c2410_uart1_resource), |
| 278 | }, |
| 279 | [2] = { |
| 280 | .resources = s3c2410_uart2_resource, |
| 281 | .nr_resources = ARRAY_SIZE(s3c2410_uart2_resource), |
| 282 | }, |
| 283 | [3] = { |
| 284 | .resources = s3c2410_uart3_resource, |
| 285 | .nr_resources = ARRAY_SIZE(s3c2410_uart3_resource), |
| 286 | }, |
| 287 | }; |
Heiko Stuebner | 2473f71 | 2012-05-12 16:22:18 +0900 | [diff] [blame] | 288 | |
| 289 | /* initialise all the clocks */ |
| 290 | |
| 291 | void __init_or_cpufreq s3c24xx_setup_clocks(unsigned long fclk, |
| 292 | unsigned long hclk, |
| 293 | unsigned long pclk) |
| 294 | { |
| 295 | clk_upll.rate = s3c24xx_get_pll(__raw_readl(S3C2410_UPLLCON), |
| 296 | clk_xtal.rate); |
| 297 | |
| 298 | clk_mpll.rate = fclk; |
| 299 | clk_h.rate = hclk; |
| 300 | clk_p.rate = pclk; |
| 301 | clk_f.rate = fclk; |
| 302 | } |