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Carsten Otte043405e2007-10-10 17:16:19 +02001#/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
10
Avi Kivityedf88412007-12-16 11:02:48 +020011#ifndef ASM_KVM_HOST_H
12#define ASM_KVM_HOST_H
Carsten Otte043405e2007-10-10 17:16:19 +020013
Zhang Xiantao34c16ee2007-10-20 15:34:38 +080014#include <linux/types.h>
15#include <linux/mm.h>
16
17#include <linux/kvm.h>
18#include <linux/kvm_para.h>
Avi Kivityedf88412007-12-16 11:02:48 +020019#include <linux/kvm_types.h>
Zhang Xiantao34c16ee2007-10-20 15:34:38 +080020
Hollis Blancharde01a1b52007-12-03 15:30:25 -060021#include <asm/desc.h>
22
Zhang Xiantaocd6e8f82007-11-19 14:33:37 +080023#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
24#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
25#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS|0xFFFFFF0000000000ULL)
26
27#define KVM_GUEST_CR0_MASK \
28 (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \
29 | X86_CR0_NW | X86_CR0_CD)
30#define KVM_VM_CR0_ALWAYS_ON \
31 (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \
32 | X86_CR0_MP)
33#define KVM_GUEST_CR4_MASK \
34 (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE)
35#define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE)
36#define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE)
37
38#define INVALID_PAGE (~(hpa_t)0)
39#define UNMAPPED_GVA (~(gpa_t)0)
40
41#define DE_VECTOR 0
42#define UD_VECTOR 6
43#define NM_VECTOR 7
44#define DF_VECTOR 8
45#define TS_VECTOR 10
46#define NP_VECTOR 11
47#define SS_VECTOR 12
48#define GP_VECTOR 13
49#define PF_VECTOR 14
50
51#define SELECTOR_TI_MASK (1 << 2)
52#define SELECTOR_RPL_MASK 0x03
53
54#define IOPL_SHIFT 12
55
Zhang Xiantaod69fb812007-12-14 09:54:20 +080056#define KVM_ALIAS_SLOTS 4
57
Zhang Xiantaod657a982007-12-14 09:41:22 +080058#define KVM_PERMILLE_MMU_PAGES 20
59#define KVM_MIN_ALLOC_MMU_PAGES 64
60#define KVM_NUM_MMU_PAGES 1024
61#define KVM_MIN_FREE_MMU_PAGES 5
62#define KVM_REFILL_PAGES 25
63#define KVM_MAX_CPUID_ENTRIES 40
64
Zhang Xiantaoe9b11c12007-11-14 20:38:21 +080065extern spinlock_t kvm_lock;
66extern struct list_head vm_list;
67
Zhang Xiantaod657a982007-12-14 09:41:22 +080068struct kvm_vcpu;
69struct kvm;
70
Zhang Xiantao2b3ccfa2007-11-19 14:56:05 +080071enum {
72 VCPU_REGS_RAX = 0,
73 VCPU_REGS_RCX = 1,
74 VCPU_REGS_RDX = 2,
75 VCPU_REGS_RBX = 3,
76 VCPU_REGS_RSP = 4,
77 VCPU_REGS_RBP = 5,
78 VCPU_REGS_RSI = 6,
79 VCPU_REGS_RDI = 7,
80#ifdef CONFIG_X86_64
81 VCPU_REGS_R8 = 8,
82 VCPU_REGS_R9 = 9,
83 VCPU_REGS_R10 = 10,
84 VCPU_REGS_R11 = 11,
85 VCPU_REGS_R12 = 12,
86 VCPU_REGS_R13 = 13,
87 VCPU_REGS_R14 = 14,
88 VCPU_REGS_R15 = 15,
89#endif
90 NR_VCPU_REGS
91};
92
93enum {
94 VCPU_SREG_CS,
95 VCPU_SREG_DS,
96 VCPU_SREG_ES,
97 VCPU_SREG_FS,
98 VCPU_SREG_GS,
99 VCPU_SREG_SS,
100 VCPU_SREG_TR,
101 VCPU_SREG_LDTR,
102};
103
Avi Kivityedf88412007-12-16 11:02:48 +0200104#include <asm/kvm_x86_emulate.h>
Zhang Xiantao2b3ccfa2007-11-19 14:56:05 +0800105
Zhang Xiantaod657a982007-12-14 09:41:22 +0800106#define KVM_NR_MEM_OBJS 40
107
108/*
109 * We don't want allocation failures within the mmu code, so we preallocate
110 * enough memory for a single page fault in a cache.
111 */
112struct kvm_mmu_memory_cache {
113 int nobjs;
114 void *objects[KVM_NR_MEM_OBJS];
115};
116
117#define NR_PTE_CHAIN_ENTRIES 5
118
119struct kvm_pte_chain {
120 u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
121 struct hlist_node link;
122};
123
124/*
125 * kvm_mmu_page_role, below, is defined as:
126 *
127 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
128 * bits 4:7 - page table level for this shadow (1-4)
129 * bits 8:9 - page table quadrant for 2-level guests
130 * bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode)
131 * bits 17:19 - common access permissions for all ptes in this shadow page
132 */
133union kvm_mmu_page_role {
134 unsigned word;
135 struct {
136 unsigned glevels : 4;
137 unsigned level : 4;
138 unsigned quadrant : 2;
139 unsigned pad_for_nice_hex_output : 6;
140 unsigned metaphysical : 1;
141 unsigned access : 3;
142 };
143};
144
145struct kvm_mmu_page {
146 struct list_head link;
147 struct hlist_node hash_link;
148
149 /*
150 * The following two entries are used to key the shadow page in the
151 * hash table.
152 */
153 gfn_t gfn;
154 union kvm_mmu_page_role role;
155
156 u64 *spt;
157 /* hold the gfn of each spte inside spt */
158 gfn_t *gfns;
159 unsigned long slot_bitmap; /* One bit set per slot which has memory
160 * in this shadow page.
161 */
162 int multimapped; /* More than one parent_pte? */
163 int root_count; /* Currently serving as active root */
164 union {
165 u64 *parent_pte; /* !multimapped */
166 struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
167 };
168};
169
170/*
171 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
172 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
173 * mode.
174 */
175struct kvm_mmu {
176 void (*new_cr3)(struct kvm_vcpu *vcpu);
177 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
178 void (*free)(struct kvm_vcpu *vcpu);
179 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
180 void (*prefetch_page)(struct kvm_vcpu *vcpu,
181 struct kvm_mmu_page *page);
182 hpa_t root_hpa;
183 int root_level;
184 int shadow_root_level;
185
186 u64 *pae_root;
187};
188
Zhang Xiantaoad312c72007-12-13 23:50:52 +0800189struct kvm_vcpu_arch {
Zhang Xiantao34c16ee2007-10-20 15:34:38 +0800190 u64 host_tsc;
191 int interrupt_window_open;
192 unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
193 DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS);
194 unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */
195 unsigned long rip; /* needs vcpu_load_rsp_rip() */
196
197 unsigned long cr0;
198 unsigned long cr2;
199 unsigned long cr3;
200 unsigned long cr4;
201 unsigned long cr8;
202 u64 pdptrs[4]; /* pae */
203 u64 shadow_efer;
204 u64 apic_base;
205 struct kvm_lapic *apic; /* kernel irqchip context */
206#define VCPU_MP_STATE_RUNNABLE 0
207#define VCPU_MP_STATE_UNINITIALIZED 1
208#define VCPU_MP_STATE_INIT_RECEIVED 2
209#define VCPU_MP_STATE_SIPI_RECEIVED 3
210#define VCPU_MP_STATE_HALTED 4
211 int mp_state;
212 int sipi_vector;
213 u64 ia32_misc_enable_msr;
214
215 struct kvm_mmu mmu;
216
217 struct kvm_mmu_memory_cache mmu_pte_chain_cache;
218 struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
219 struct kvm_mmu_memory_cache mmu_page_cache;
220 struct kvm_mmu_memory_cache mmu_page_header_cache;
221
222 gfn_t last_pt_write_gfn;
223 int last_pt_write_count;
224 u64 *last_pte_updated;
225
Zhang Xiantao34c16ee2007-10-20 15:34:38 +0800226 struct i387_fxsave_struct host_fx_image;
227 struct i387_fxsave_struct guest_fx_image;
228
229 gva_t mmio_fault_cr2;
230 struct kvm_pio_request pio;
231 void *pio_data;
232
Avi Kivity298101d2007-11-25 13:41:11 +0200233 struct kvm_queued_exception {
234 bool pending;
235 bool has_error_code;
236 u8 nr;
237 u32 error_code;
238 } exception;
239
Zhang Xiantao34c16ee2007-10-20 15:34:38 +0800240 struct {
241 int active;
242 u8 save_iopl;
243 struct kvm_save_segment {
244 u16 selector;
245 unsigned long base;
246 u32 limit;
247 u32 ar;
248 } tr, es, ds, fs, gs;
249 } rmode;
250 int halt_request; /* real mode on Intel only */
251
252 int cpuid_nent;
Dan Kenigsberg07716712007-11-21 17:10:04 +0200253 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
Zhang Xiantao34c16ee2007-10-20 15:34:38 +0800254 /* emulate context */
255
256 struct x86_emulate_ctxt emulate_ctxt;
257};
258
Zhang Xiantaod69fb812007-12-14 09:54:20 +0800259struct kvm_mem_alias {
260 gfn_t base_gfn;
261 unsigned long npages;
262 gfn_t target_gfn;
263};
264
265struct kvm_arch{
266 int naliases;
267 struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS];
Zhang Xiantaof05e70a2007-12-14 10:01:48 +0800268
269 unsigned int n_free_mmu_pages;
270 unsigned int n_requested_mmu_pages;
271 unsigned int n_alloc_mmu_pages;
272 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
273 /*
274 * Hash table of struct kvm_mmu_page.
275 */
276 struct list_head active_mmu_pages;
Zhang Xiantaod7deeeb02007-12-14 10:17:34 +0800277 struct kvm_pic *vpic;
278 struct kvm_ioapic *vioapic;
Zhang Xiantaobfc6d222007-12-14 10:20:16 +0800279
280 int round_robin_prev_vcpu;
281 unsigned int tss_addr;
282 struct page *apic_access_page;
Zhang Xiantaod69fb812007-12-14 09:54:20 +0800283};
284
Zhang Xiantao07114562007-12-14 10:23:23 +0800285struct kvm_vm_stat {
286 u32 mmu_shadow_zapped;
287 u32 mmu_pte_write;
288 u32 mmu_pte_updated;
289 u32 mmu_pde_zapped;
290 u32 mmu_flooded;
291 u32 mmu_recycled;
292 u32 remote_tlb_flush;
293};
294
Zhang Xiantao77b4c252007-12-14 09:49:26 +0800295struct kvm_vcpu_stat {
296 u32 pf_fixed;
297 u32 pf_guest;
298 u32 tlb_flush;
299 u32 invlpg;
300
301 u32 exits;
302 u32 io_exits;
303 u32 mmio_exits;
304 u32 signal_exits;
305 u32 irq_window_exits;
306 u32 halt_exits;
307 u32 halt_wakeup;
308 u32 request_irq_exits;
309 u32 irq_exits;
310 u32 host_state_reload;
311 u32 efer_reload;
312 u32 fpu_reload;
313 u32 insn_emulation;
314 u32 insn_emulation_fail;
315};
Zhang Xiantaoad312c72007-12-13 23:50:52 +0800316
Hollis Blancharde01a1b52007-12-03 15:30:25 -0600317struct descriptor_table {
318 u16 limit;
319 unsigned long base;
320} __attribute__((packed));
321
Zhang Xiantaoea4a5ff2007-11-19 14:40:47 +0800322struct kvm_x86_ops {
323 int (*cpu_has_kvm_support)(void); /* __init */
324 int (*disabled_by_bios)(void); /* __init */
325 void (*hardware_enable)(void *dummy); /* __init */
326 void (*hardware_disable)(void *dummy);
327 void (*check_processor_compatibility)(void *rtn);
328 int (*hardware_setup)(void); /* __init */
329 void (*hardware_unsetup)(void); /* __exit */
330
331 /* Create, but do not attach this VCPU */
332 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
333 void (*vcpu_free)(struct kvm_vcpu *vcpu);
334 int (*vcpu_reset)(struct kvm_vcpu *vcpu);
335
336 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
337 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
338 void (*vcpu_put)(struct kvm_vcpu *vcpu);
339 void (*vcpu_decache)(struct kvm_vcpu *vcpu);
340
341 int (*set_guest_debug)(struct kvm_vcpu *vcpu,
342 struct kvm_debug_guest *dbg);
343 void (*guest_debug_pre)(struct kvm_vcpu *vcpu);
344 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
345 int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
346 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
347 void (*get_segment)(struct kvm_vcpu *vcpu,
348 struct kvm_segment *var, int seg);
349 void (*set_segment)(struct kvm_vcpu *vcpu,
350 struct kvm_segment *var, int seg);
351 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
352 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
353 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
354 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
355 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
356 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
357 void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
358 void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
359 void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
360 void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
361 unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
362 void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
363 int *exception);
364 void (*cache_regs)(struct kvm_vcpu *vcpu);
365 void (*decache_regs)(struct kvm_vcpu *vcpu);
366 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
367 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
368
369 void (*tlb_flush)(struct kvm_vcpu *vcpu);
Zhang Xiantaoea4a5ff2007-11-19 14:40:47 +0800370
Zhang Xiantaoea4a5ff2007-11-19 14:40:47 +0800371 void (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
372 int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu);
373 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
374 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
375 unsigned char *hypercall_addr);
376 int (*get_irq)(struct kvm_vcpu *vcpu);
377 void (*set_irq)(struct kvm_vcpu *vcpu, int vec);
Avi Kivity298101d2007-11-25 13:41:11 +0200378 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
379 bool has_error_code, u32 error_code);
380 bool (*exception_injected)(struct kvm_vcpu *vcpu);
Zhang Xiantaoea4a5ff2007-11-19 14:40:47 +0800381 void (*inject_pending_irq)(struct kvm_vcpu *vcpu);
382 void (*inject_pending_vectors)(struct kvm_vcpu *vcpu,
383 struct kvm_run *run);
384
385 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
386};
387
Zhang Xiantao97896d02007-11-14 20:09:30 +0800388extern struct kvm_x86_ops *kvm_x86_ops;
389
Zhang Xiantao54f15852007-11-19 15:24:28 +0800390int kvm_mmu_module_init(void);
391void kvm_mmu_module_exit(void);
392
393void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
394int kvm_mmu_create(struct kvm_vcpu *vcpu);
395int kvm_mmu_setup(struct kvm_vcpu *vcpu);
396void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);
397
398int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
399void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
400void kvm_mmu_zap_all(struct kvm *kvm);
Zhang Xiantao3ad82a72007-11-20 13:11:38 +0800401unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
Zhang Xiantao54f15852007-11-19 15:24:28 +0800402void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
403
404enum emulation_result {
405 EMULATE_DONE, /* no further processing */
406 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
407 EMULATE_FAIL, /* can't emulate this instruction */
408};
409
410int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
411 unsigned long cr2, u16 error_code, int no_decode);
412void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context);
413void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
414void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
415void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
416 unsigned long *rflags);
417
418unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
419void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
420 unsigned long *rflags);
421int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
422int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
423
424struct x86_emulate_ctxt;
425
426int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
427 int size, unsigned port);
428int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
429 int size, unsigned long count, int down,
430 gva_t address, int rep, unsigned port);
431void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
432int kvm_emulate_halt(struct kvm_vcpu *vcpu);
433int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
434int emulate_clts(struct kvm_vcpu *vcpu);
435int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
436 unsigned long *dest);
437int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
438 unsigned long value);
439
440void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
441void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr0);
442void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr0);
443void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr0);
444unsigned long get_cr8(struct kvm_vcpu *vcpu);
445void lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
446void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
447
448int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
449int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
450
Avi Kivity298101d2007-11-25 13:41:11 +0200451void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
452void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
Avi Kivityc3c91fe2007-11-25 14:04:58 +0200453void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
454 u32 error_code);
Avi Kivity298101d2007-11-25 13:41:11 +0200455
Zhang Xiantao54f15852007-11-19 15:24:28 +0800456void fx_init(struct kvm_vcpu *vcpu);
457
458int emulator_read_std(unsigned long addr,
459 void *val,
460 unsigned int bytes,
461 struct kvm_vcpu *vcpu);
462int emulator_write_emulated(unsigned long addr,
463 const void *val,
464 unsigned int bytes,
465 struct kvm_vcpu *vcpu);
466
467unsigned long segment_base(u16 selector);
468
Avi Kivityd835dfe2007-11-21 02:57:59 +0200469void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
Zhang Xiantao54f15852007-11-19 15:24:28 +0800470void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
471 const u8 *new, int bytes);
472int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
473void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
474int kvm_mmu_load(struct kvm_vcpu *vcpu);
475void kvm_mmu_unload(struct kvm_vcpu *vcpu);
476
477int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
478
479int kvm_fix_hypercall(struct kvm_vcpu *vcpu);
480
Avi Kivity30677142007-10-28 18:48:59 +0200481int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code);
Zhang Xiantao34c16ee2007-10-20 15:34:38 +0800482
Carsten Ottea03490e2007-10-29 16:09:35 +0100483int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
Carsten Ottede7d7892007-10-30 18:44:25 +0100484int complete_pio(struct kvm_vcpu *vcpu);
Zhang Xiantaoec6d2732007-11-19 15:08:31 +0800485
486static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
487{
488 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
489
490 return (struct kvm_mmu_page *)page_private(page);
491}
492
493static inline u16 read_fs(void)
494{
495 u16 seg;
496 asm("mov %%fs, %0" : "=g"(seg));
497 return seg;
498}
499
500static inline u16 read_gs(void)
501{
502 u16 seg;
503 asm("mov %%gs, %0" : "=g"(seg));
504 return seg;
505}
506
507static inline u16 read_ldt(void)
508{
509 u16 ldt;
510 asm("sldt %0" : "=g"(ldt));
511 return ldt;
512}
513
514static inline void load_fs(u16 sel)
515{
516 asm("mov %0, %%fs" : : "rm"(sel));
517}
518
519static inline void load_gs(u16 sel)
520{
521 asm("mov %0, %%gs" : : "rm"(sel));
522}
523
524#ifndef load_ldt
525static inline void load_ldt(u16 sel)
526{
527 asm("lldt %0" : : "rm"(sel));
528}
529#endif
530
531static inline void get_idt(struct descriptor_table *table)
532{
533 asm("sidt %0" : "=m"(*table));
534}
535
536static inline void get_gdt(struct descriptor_table *table)
537{
538 asm("sgdt %0" : "=m"(*table));
539}
540
541static inline unsigned long read_tr_base(void)
542{
543 u16 tr;
544 asm("str %0" : "=g"(tr));
545 return segment_base(tr);
546}
547
548#ifdef CONFIG_X86_64
549static inline unsigned long read_msr(unsigned long msr)
550{
551 u64 value;
552
553 rdmsrl(msr, value);
554 return value;
555}
556#endif
557
558static inline void fx_save(struct i387_fxsave_struct *image)
559{
560 asm("fxsave (%0)":: "r" (image));
561}
562
563static inline void fx_restore(struct i387_fxsave_struct *image)
564{
565 asm("fxrstor (%0)":: "r" (image));
566}
567
568static inline void fpu_init(void)
569{
570 asm("finit");
571}
572
573static inline u32 get_rdx_init_val(void)
574{
575 return 0x600; /* P6 family */
576}
577
Avi Kivityc1a5d4f2007-11-25 14:12:03 +0200578static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
579{
580 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
581}
582
Zhang Xiantaoec6d2732007-11-19 15:08:31 +0800583#define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30"
584#define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2"
585#define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3"
586#define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30"
587#define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0"
588#define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0"
589#define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4"
590#define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4"
591#define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30"
592
593#define MSR_IA32_TIME_STAMP_COUNTER 0x010
594
595#define TSS_IOPB_BASE_OFFSET 0x66
596#define TSS_BASE_SIZE 0x68
597#define TSS_IOPB_SIZE (65536 / 8)
598#define TSS_REDIRECTION_SIZE (256 / 8)
599#define RMODE_TSS_SIZE (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
Hollis Blanchard53e0aa72007-12-03 16:15:26 -0600600
Carsten Otte043405e2007-10-10 17:16:19 +0200601#endif