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Benjamin Krill5886188d2009-01-07 10:32:38 +01001/*
2 * Serial Port driver for a NWP uart device
3 *
4 * Copyright (C) 2008 IBM Corp., Benjamin Krill <ben@codiert.org>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 */
12#include <linux/init.h>
13#include <linux/console.h>
14#include <linux/serial.h>
15#include <linux/serial_reg.h>
16#include <linux/serial_core.h>
17#include <linux/tty.h>
Jiri Slabyee160a32011-09-01 16:20:57 +020018#include <linux/tty_flip.h>
Benjamin Krill5886188d2009-01-07 10:32:38 +010019#include <linux/irqreturn.h>
20#include <linux/mutex.h>
21#include <linux/of_platform.h>
22#include <linux/of_device.h>
23#include <linux/nwpserial.h>
24#include <asm/prom.h>
25#include <asm/dcr.h>
26
27#define NWPSERIAL_NR 2
28
29#define NWPSERIAL_STATUS_RXVALID 0x1
30#define NWPSERIAL_STATUS_TXFULL 0x2
31
32struct nwpserial_port {
33 struct uart_port port;
34 dcr_host_t dcr_host;
35 unsigned int ier;
36 unsigned int mcr;
37};
38
39static DEFINE_MUTEX(nwpserial_mutex);
40static struct nwpserial_port nwpserial_ports[NWPSERIAL_NR];
41
42static void wait_for_bits(struct nwpserial_port *up, int bits)
43{
44 unsigned int status, tmout = 10000;
45
46 /* Wait up to 10ms for the character(s) to be sent. */
47 do {
48 status = dcr_read(up->dcr_host, UART_LSR);
49
50 if (--tmout == 0)
51 break;
52 udelay(1);
53 } while ((status & bits) != bits);
54}
55
56#ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL_CONSOLE
57static void nwpserial_console_putchar(struct uart_port *port, int c)
58{
59 struct nwpserial_port *up;
60 up = container_of(port, struct nwpserial_port, port);
61 /* check if tx buffer is full */
62 wait_for_bits(up, UART_LSR_THRE);
63 dcr_write(up->dcr_host, UART_TX, c);
64 up->port.icount.tx++;
65}
66
67static void
68nwpserial_console_write(struct console *co, const char *s, unsigned int count)
69{
70 struct nwpserial_port *up = &nwpserial_ports[co->index];
71 unsigned long flags;
72 int locked = 1;
73
74 if (oops_in_progress)
75 locked = spin_trylock_irqsave(&up->port.lock, flags);
76 else
77 spin_lock_irqsave(&up->port.lock, flags);
78
79 /* save and disable interrupt */
80 up->ier = dcr_read(up->dcr_host, UART_IER);
81 dcr_write(up->dcr_host, UART_IER, up->ier & ~UART_IER_RDI);
82
83 uart_console_write(&up->port, s, count, nwpserial_console_putchar);
84
Uwe Kleine-Königa7ce2e02010-07-12 17:15:44 +020085 /* wait for transmitter to become empty */
Benjamin Krill5886188d2009-01-07 10:32:38 +010086 while ((dcr_read(up->dcr_host, UART_LSR) & UART_LSR_THRE) == 0)
87 cpu_relax();
88
89 /* restore interrupt state */
90 dcr_write(up->dcr_host, UART_IER, up->ier);
91
92 if (locked)
93 spin_unlock_irqrestore(&up->port.lock, flags);
94}
95
96static struct uart_driver nwpserial_reg;
97static struct console nwpserial_console = {
98 .name = "ttySQ",
99 .write = nwpserial_console_write,
100 .device = uart_console_device,
101 .flags = CON_PRINTBUFFER,
102 .index = -1,
103 .data = &nwpserial_reg,
104};
105#define NWPSERIAL_CONSOLE (&nwpserial_console)
106#else
107#define NWPSERIAL_CONSOLE NULL
108#endif /* CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL_CONSOLE */
109
110/**************************************************************************/
111
112static int nwpserial_request_port(struct uart_port *port)
113{
114 return 0;
115}
116
117static void nwpserial_release_port(struct uart_port *port)
118{
119 /* N/A */
120}
121
122static void nwpserial_config_port(struct uart_port *port, int flags)
123{
124 port->type = PORT_NWPSERIAL;
125}
126
127static irqreturn_t nwpserial_interrupt(int irq, void *dev_id)
128{
129 struct nwpserial_port *up = dev_id;
Alan Coxebd2c8f2009-09-19 13:13:28 -0700130 struct tty_struct *tty = up->port.state->port.tty;
Benjamin Krill5886188d2009-01-07 10:32:38 +0100131 irqreturn_t ret;
132 unsigned int iir;
133 unsigned char ch;
134
135 spin_lock(&up->port.lock);
136
137 /* check if the uart was the interrupt source. */
138 iir = dcr_read(up->dcr_host, UART_IIR);
139 if (!iir) {
140 ret = IRQ_NONE;
141 goto out;
142 }
143
144 do {
145 up->port.icount.rx++;
146 ch = dcr_read(up->dcr_host, UART_RX);
147 if (up->port.ignore_status_mask != NWPSERIAL_STATUS_RXVALID)
148 tty_insert_flip_char(tty, ch, TTY_NORMAL);
Benjamin Krill951c4df2009-05-13 05:56:54 +0000149 } while (dcr_read(up->dcr_host, UART_LSR) & UART_LSR_DR);
Benjamin Krill5886188d2009-01-07 10:32:38 +0100150
151 tty_flip_buffer_push(tty);
152 ret = IRQ_HANDLED;
153
Benjamin Krill951c4df2009-05-13 05:56:54 +0000154 /* clear interrupt */
155 dcr_write(up->dcr_host, UART_IIR, 1);
Benjamin Krill5886188d2009-01-07 10:32:38 +0100156out:
157 spin_unlock(&up->port.lock);
158 return ret;
159}
160
161static int nwpserial_startup(struct uart_port *port)
162{
163 struct nwpserial_port *up;
164 int err;
165
166 up = container_of(port, struct nwpserial_port, port);
167
168 /* disable flow control by default */
169 up->mcr = dcr_read(up->dcr_host, UART_MCR) & ~UART_MCR_AFE;
170 dcr_write(up->dcr_host, UART_MCR, up->mcr);
171
172 /* register interrupt handler */
173 err = request_irq(up->port.irq, nwpserial_interrupt,
174 IRQF_SHARED, "nwpserial", up);
175 if (err)
176 return err;
177
178 /* enable interrupts */
179 up->ier = UART_IER_RDI;
180 dcr_write(up->dcr_host, UART_IER, up->ier);
181
182 /* enable receiving */
183 up->port.ignore_status_mask &= ~NWPSERIAL_STATUS_RXVALID;
184
185 return 0;
186}
187
188static void nwpserial_shutdown(struct uart_port *port)
189{
190 struct nwpserial_port *up;
191 up = container_of(port, struct nwpserial_port, port);
192
193 /* disable receiving */
194 up->port.ignore_status_mask |= NWPSERIAL_STATUS_RXVALID;
195
196 /* disable interrupts from this port */
197 up->ier = 0;
198 dcr_write(up->dcr_host, UART_IER, up->ier);
199
200 /* free irq */
201 free_irq(up->port.irq, port);
202}
203
204static int nwpserial_verify_port(struct uart_port *port,
205 struct serial_struct *ser)
206{
207 return -EINVAL;
208}
209
210static const char *nwpserial_type(struct uart_port *port)
211{
212 return port->type == PORT_NWPSERIAL ? "nwpserial" : NULL;
213}
214
215static void nwpserial_set_termios(struct uart_port *port,
216 struct ktermios *termios, struct ktermios *old)
217{
218 struct nwpserial_port *up;
219 up = container_of(port, struct nwpserial_port, port);
220
221 up->port.read_status_mask = NWPSERIAL_STATUS_RXVALID
222 | NWPSERIAL_STATUS_TXFULL;
223
224 up->port.ignore_status_mask = 0;
225 /* ignore all characters if CREAD is not set */
226 if ((termios->c_cflag & CREAD) == 0)
227 up->port.ignore_status_mask |= NWPSERIAL_STATUS_RXVALID;
228
229 /* Copy back the old hardware settings */
230 if (old)
231 tty_termios_copy_hw(termios, old);
232}
233
234static void nwpserial_break_ctl(struct uart_port *port, int ctl)
235{
236 /* N/A */
237}
238
239static void nwpserial_enable_ms(struct uart_port *port)
240{
241 /* N/A */
242}
243
244static void nwpserial_stop_rx(struct uart_port *port)
245{
246 struct nwpserial_port *up;
247 up = container_of(port, struct nwpserial_port, port);
248 /* don't forward any more data (like !CREAD) */
249 up->port.ignore_status_mask = NWPSERIAL_STATUS_RXVALID;
250}
251
252static void nwpserial_putchar(struct nwpserial_port *up, unsigned char c)
253{
254 /* check if tx buffer is full */
255 wait_for_bits(up, UART_LSR_THRE);
256 dcr_write(up->dcr_host, UART_TX, c);
257 up->port.icount.tx++;
258}
259
260static void nwpserial_start_tx(struct uart_port *port)
261{
262 struct nwpserial_port *up;
263 struct circ_buf *xmit;
264 up = container_of(port, struct nwpserial_port, port);
Alan Coxebd2c8f2009-09-19 13:13:28 -0700265 xmit = &up->port.state->xmit;
Benjamin Krill5886188d2009-01-07 10:32:38 +0100266
267 if (port->x_char) {
268 nwpserial_putchar(up, up->port.x_char);
269 port->x_char = 0;
270 }
271
272 while (!(uart_circ_empty(xmit) || uart_tx_stopped(&up->port))) {
273 nwpserial_putchar(up, xmit->buf[xmit->tail]);
274 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
275 }
276}
277
278static unsigned int nwpserial_get_mctrl(struct uart_port *port)
279{
280 return 0;
281}
282
283static void nwpserial_set_mctrl(struct uart_port *port, unsigned int mctrl)
284{
285 /* N/A */
286}
287
288static void nwpserial_stop_tx(struct uart_port *port)
289{
290 /* N/A */
291}
292
293static unsigned int nwpserial_tx_empty(struct uart_port *port)
294{
295 struct nwpserial_port *up;
296 unsigned long flags;
297 int ret;
298 up = container_of(port, struct nwpserial_port, port);
299
300 spin_lock_irqsave(&up->port.lock, flags);
301 ret = dcr_read(up->dcr_host, UART_LSR);
302 spin_unlock_irqrestore(&up->port.lock, flags);
303
304 return ret & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
305}
306
307static struct uart_ops nwpserial_pops = {
308 .tx_empty = nwpserial_tx_empty,
309 .set_mctrl = nwpserial_set_mctrl,
310 .get_mctrl = nwpserial_get_mctrl,
311 .stop_tx = nwpserial_stop_tx,
312 .start_tx = nwpserial_start_tx,
313 .stop_rx = nwpserial_stop_rx,
314 .enable_ms = nwpserial_enable_ms,
315 .break_ctl = nwpserial_break_ctl,
316 .startup = nwpserial_startup,
317 .shutdown = nwpserial_shutdown,
318 .set_termios = nwpserial_set_termios,
319 .type = nwpserial_type,
320 .release_port = nwpserial_release_port,
321 .request_port = nwpserial_request_port,
322 .config_port = nwpserial_config_port,
323 .verify_port = nwpserial_verify_port,
324};
325
326static struct uart_driver nwpserial_reg = {
327 .owner = THIS_MODULE,
328 .driver_name = "nwpserial",
329 .dev_name = "ttySQ",
330 .major = TTY_MAJOR,
331 .minor = 68,
332 .nr = NWPSERIAL_NR,
333 .cons = NWPSERIAL_CONSOLE,
334};
335
336int nwpserial_register_port(struct uart_port *port)
337{
338 struct nwpserial_port *up = NULL;
339 int ret = -1;
340 int i;
341 static int first = 1;
342 int dcr_len;
343 int dcr_base;
344 struct device_node *dn;
345
346 mutex_lock(&nwpserial_mutex);
347
Grant Likely2dc11582010-08-06 09:25:50 -0600348 dn = port->dev->of_node;
Benjamin Krill5886188d2009-01-07 10:32:38 +0100349 if (dn == NULL)
350 goto out;
351
352 /* get dcr base. */
353 dcr_base = dcr_resource_start(dn, 0);
354
355 /* find matching entry */
356 for (i = 0; i < NWPSERIAL_NR; i++)
357 if (nwpserial_ports[i].port.iobase == dcr_base) {
358 up = &nwpserial_ports[i];
359 break;
360 }
361
362 /* we didn't find a mtching entry, search for a free port */
363 if (up == NULL)
364 for (i = 0; i < NWPSERIAL_NR; i++)
365 if (nwpserial_ports[i].port.type == PORT_UNKNOWN &&
366 nwpserial_ports[i].port.iobase == 0) {
367 up = &nwpserial_ports[i];
368 break;
369 }
370
371 if (up == NULL) {
372 ret = -EBUSY;
373 goto out;
374 }
375
376 if (first)
377 uart_register_driver(&nwpserial_reg);
378 first = 0;
379
380 up->port.membase = port->membase;
381 up->port.irq = port->irq;
382 up->port.uartclk = port->uartclk;
383 up->port.fifosize = port->fifosize;
384 up->port.regshift = port->regshift;
385 up->port.iotype = port->iotype;
386 up->port.flags = port->flags;
387 up->port.mapbase = port->mapbase;
388 up->port.private_data = port->private_data;
389
390 if (port->dev)
391 up->port.dev = port->dev;
392
393 if (up->port.iobase != dcr_base) {
394 up->port.ops = &nwpserial_pops;
395 up->port.fifosize = 16;
396
397 spin_lock_init(&up->port.lock);
398
399 up->port.iobase = dcr_base;
400 dcr_len = dcr_resource_len(dn, 0);
401
402 up->dcr_host = dcr_map(dn, dcr_base, dcr_len);
403 if (!DCR_MAP_OK(up->dcr_host)) {
404 printk(KERN_ERR "Cannot map DCR resources for NWPSERIAL");
405 goto out;
406 }
407 }
408
409 ret = uart_add_one_port(&nwpserial_reg, &up->port);
410 if (ret == 0)
411 ret = up->port.line;
412
413out:
414 mutex_unlock(&nwpserial_mutex);
415
416 return ret;
417}
418EXPORT_SYMBOL(nwpserial_register_port);
419
420void nwpserial_unregister_port(int line)
421{
422 struct nwpserial_port *up = &nwpserial_ports[line];
423 mutex_lock(&nwpserial_mutex);
424 uart_remove_one_port(&nwpserial_reg, &up->port);
425
426 up->port.type = PORT_UNKNOWN;
427
428 mutex_unlock(&nwpserial_mutex);
429}
430EXPORT_SYMBOL(nwpserial_unregister_port);
431
432#ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL_CONSOLE
433static int __init nwpserial_console_init(void)
434{
435 struct nwpserial_port *up = NULL;
436 struct device_node *dn;
437 const char *name;
438 int dcr_base;
439 int dcr_len;
440 int i;
441
442 /* search for a free port */
443 for (i = 0; i < NWPSERIAL_NR; i++)
444 if (nwpserial_ports[i].port.type == PORT_UNKNOWN) {
445 up = &nwpserial_ports[i];
446 break;
447 }
448
449 if (up == NULL)
450 return -1;
451
452 name = of_get_property(of_chosen, "linux,stdout-path", NULL);
453 if (name == NULL)
454 return -1;
455
456 dn = of_find_node_by_path(name);
457 if (!dn)
458 return -1;
459
460 spin_lock_init(&up->port.lock);
461 up->port.ops = &nwpserial_pops;
462 up->port.type = PORT_NWPSERIAL;
463 up->port.fifosize = 16;
464
465 dcr_base = dcr_resource_start(dn, 0);
466 dcr_len = dcr_resource_len(dn, 0);
467 up->port.iobase = dcr_base;
468
469 up->dcr_host = dcr_map(dn, dcr_base, dcr_len);
470 if (!DCR_MAP_OK(up->dcr_host)) {
471 printk("Cannot map DCR resources for SERIAL");
472 return -1;
473 }
474 register_console(&nwpserial_console);
475 return 0;
476}
477console_initcall(nwpserial_console_init);
478#endif /* CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL_CONSOLE */