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Ludovic Desroches655ff2662013-03-22 13:24:13 +00001/*
2 * sama5d3xmb.dts - Device Tree file for SAMA5D3x mother board
3 *
4 * Copyright (C) 2013 Atmel,
5 * 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
6 *
7 * Licensed under GPLv2 or later.
8 */
Jean-Christophe PLAGNIOL-VILLARD6db64d22013-05-15 01:21:50 +08009#include "sama5d3xcm.dtsi"
Ludovic Desroches655ff2662013-03-22 13:24:13 +000010
11/ {
12 compatible = "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5";
13
14 ahb {
15 apb {
16 mmc0: mmc@f0000000 {
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
19 status = "okay";
20 slot@0 {
21 reg = <0>;
22 bus-width = <4>;
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +080023 cd-gpios = <&pioD 17 GPIO_ACTIVE_HIGH>;
Ludovic Desroches655ff2662013-03-22 13:24:13 +000024 };
25 };
26
27 spi0: spi@f0004000 {
Bo Shenfe855db2014-09-18 14:56:43 +020028 dmas = <0>, <0>; /* Do not use DMA for spi0 */
29
Ludovic Desroches655ff2662013-03-22 13:24:13 +000030 m25p80@0 {
31 compatible = "atmel,at25df321a";
32 spi-max-frequency = <50000000>;
33 reg = <0>;
34 };
35 };
36
Bo Shen27a96a02014-03-17 17:45:38 +080037 ssc0: ssc@f0008000 {
38 atmel,clk-from-rk-pin;
39 };
40
Ludovic Desroches655ff2662013-03-22 13:24:13 +000041 /*
42 * i2c0 conflicts with ISI:
43 * disable it to allow the use of ISI
44 * can not enable audio when i2c0 disabled
45 */
46 i2c0: i2c@f0014000 {
47 wm8904: wm8904@1a {
Alexander Morozovee2322f2014-12-15 11:31:12 +080048 compatible = "wlf,wm8904";
Ludovic Desroches655ff2662013-03-22 13:24:13 +000049 reg = <0x1a>;
Bo Shen18f44d72014-06-09 11:31:46 +080050 clocks = <&pck0>;
51 clock-names = "mclk";
Ludovic Desroches655ff2662013-03-22 13:24:13 +000052 };
53 };
54
Josh Wu4dd32e62015-01-14 10:41:54 +080055 i2c1: i2c@f0018000 {
56 ov2640: camera@0x30 {
57 compatible = "ovti,ov2640";
58 reg = <0x30>;
59 pinctrl-names = "default";
60 pinctrl-0 = <&pinctrl_pck1_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>;
61 resetb-gpios = <&pioE 24 GPIO_ACTIVE_LOW>;
62 pwdn-gpios = <&pioE 29 GPIO_ACTIVE_HIGH>;
63 /* use pck1 for the master clock of ov2640 */
64 clocks = <&pck1>;
65 clock-names = "xvclk";
66 assigned-clocks = <&pck1>;
67 assigned-clock-rates = <25000000>;
68
69 port {
70 ov2640_0: endpoint {
71 remote-endpoint = <&isi_0>;
72 bus-width = <8>;
73 };
74 };
75 };
76 };
77
Ludovic Desroches655ff2662013-03-22 13:24:13 +000078 usart1: serial@f0020000 {
Bo Shenfe855db2014-09-18 14:56:43 +020079 dmas = <0>, <0>; /* Do not use DMA for usart1 */
Ludovic Desroches655ff2662013-03-22 13:24:13 +000080 pinctrl-names = "default";
81 pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
82 status = "okay";
83 };
84
85 isi: isi@f0034000 {
Josh Wu4dd32e62015-01-14 10:41:54 +080086 port {
87 isi_0: endpoint {
88 remote-endpoint = <&ov2640_0>;
89 bus-width = <8>;
90 };
91 };
Ludovic Desroches655ff2662013-03-22 13:24:13 +000092 };
93
94 mmc1: mmc@f8000000 {
95 pinctrl-names = "default";
96 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>;
97 status = "okay";
98 slot@0 {
99 reg = <0>;
100 bus-width = <4>;
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800101 cd-gpios = <&pioD 18 GPIO_ACTIVE_HIGH>;
Ludovic Desroches655ff2662013-03-22 13:24:13 +0000102 };
103 };
104
105 adc0: adc@f8018000 {
106 pinctrl-names = "default";
107 pinctrl-0 = <
108 &pinctrl_adc0_adtrg
109 &pinctrl_adc0_ad0
110 &pinctrl_adc0_ad1
111 &pinctrl_adc0_ad2
112 &pinctrl_adc0_ad3
113 &pinctrl_adc0_ad4
114 >;
115 status = "okay";
116 };
117
118 macb1: ethernet@f802c000 {
119 phy-mode = "rmii";
Boris BREZILLON8c038e72013-08-22 17:58:29 +0200120
121 #address-cells = <1>;
122 #size-cells = <0>;
Boris BREZILLONa3a975b2013-08-27 14:41:53 +0200123 phy0: ethernet-phy@1 {
Boris BREZILLON8c038e72013-08-22 17:58:29 +0200124 interrupt-parent = <&pioE>;
125 interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
126 reg = <1>;
127 };
Ludovic Desroches655ff2662013-03-22 13:24:13 +0000128 };
129
130 pinctrl@fffff200 {
131 board {
132 pinctrl_mmc0_cd: mmc0_cd {
133 atmel,pins =
Jean-Christophe PLAGNIOL-VILLARDc9d0f312013-04-24 08:34:25 +0800134 <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD17 GPIO with pullup deglitch */
Ludovic Desroches655ff2662013-03-22 13:24:13 +0000135 };
136
137 pinctrl_mmc1_cd: mmc1_cd {
138 atmel,pins =
Jean-Christophe PLAGNIOL-VILLARDc9d0f312013-04-24 08:34:25 +0800139 <AT91_PIOD 18 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD18 GPIO with pullup deglitch */
Ludovic Desroches655ff2662013-03-22 13:24:13 +0000140 };
141
142 pinctrl_pck0_as_audio_mck: pck0_as_audio_mck {
143 atmel,pins =
Jean-Christophe PLAGNIOL-VILLARDc9d0f312013-04-24 08:34:25 +0800144 <AT91_PIOD 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD30 periph B */
Ludovic Desroches655ff2662013-03-22 13:24:13 +0000145 };
146
Josh Wufbe18602015-01-04 17:02:31 +0800147 pinctrl_pck1_as_isi_mck: pck1_as_isi_mck-0 {
Bo Shen24fe3f02015-01-04 17:02:29 +0800148 atmel,pins =
149 <AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */
150 };
151
Josh Wu97889b142015-01-04 17:02:30 +0800152 pinctrl_sensor_reset: sensor_reset-0 {
Ludovic Desroches655ff2662013-03-22 13:24:13 +0000153 atmel,pins =
Jean-Christophe PLAGNIOL-VILLARDc9d0f312013-04-24 08:34:25 +0800154 <AT91_PIOE 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* PE24 gpio */
Ludovic Desroches655ff2662013-03-22 13:24:13 +0000155 };
156
Josh Wu97889b142015-01-04 17:02:30 +0800157 pinctrl_sensor_power: sensor_power-0 {
Ludovic Desroches655ff2662013-03-22 13:24:13 +0000158 atmel,pins =
Jean-Christophe PLAGNIOL-VILLARDc9d0f312013-04-24 08:34:25 +0800159 <AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* PE29 gpio */
Ludovic Desroches655ff2662013-03-22 13:24:13 +0000160 };
161
162 pinctrl_usba_vbus: usba_vbus {
163 atmel,pins =
Jean-Christophe PLAGNIOL-VILLARDc9d0f312013-04-24 08:34:25 +0800164 <AT91_PIOD 29 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PD29 GPIO with deglitch */
Ludovic Desroches655ff2662013-03-22 13:24:13 +0000165 };
166 };
167 };
168
169 dbgu: serial@ffffee00 {
Bo Shenfe855db2014-09-18 14:56:43 +0200170 dmas = <0>, <0>; /* Do not use DMA for dbgu */
Ludovic Desroches655ff2662013-03-22 13:24:13 +0000171 status = "okay";
172 };
173
174 watchdog@fffffe40 {
175 status = "okay";
176 };
177 };
178
179 usb0: gadget@00500000 {
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800180 atmel,vbus-gpio = <&pioD 29 GPIO_ACTIVE_HIGH>;
Ludovic Desroches655ff2662013-03-22 13:24:13 +0000181 pinctrl-names = "default";
182 pinctrl-0 = <&pinctrl_usba_vbus>;
183 status = "okay";
184 };
185
186 usb1: ohci@00600000 {
187 num-ports = <3>;
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800188 atmel,vbus-gpio = <&pioD 25 GPIO_ACTIVE_HIGH
189 &pioD 26 GPIO_ACTIVE_LOW
190 &pioD 27 GPIO_ACTIVE_LOW
Ludovic Desroches655ff2662013-03-22 13:24:13 +0000191 >;
192 status = "okay";
193 };
194
195 usb2: ehci@00700000 {
196 status = "okay";
197 };
198 };
199
200 sound {
Bo Shen469bbf02014-03-17 17:45:36 +0800201 compatible = "atmel,asoc-wm8904";
Ludovic Desroches655ff2662013-03-22 13:24:13 +0000202 pinctrl-names = "default";
203 pinctrl-0 = <&pinctrl_pck0_as_audio_mck>;
204
205 atmel,model = "wm8904 @ SAMA5D3EK";
206 atmel,audio-routing =
207 "Headphone Jack", "HPOUTL",
208 "Headphone Jack", "HPOUTR",
209 "IN2L", "Line In Jack",
210 "IN2R", "Line In Jack",
Bo Shen7a61fb02014-03-17 17:45:37 +0800211 "MICBIAS", "IN1L",
Ludovic Desroches655ff2662013-03-22 13:24:13 +0000212 "IN1L", "Mic";
213
214 atmel,ssc-controller = <&ssc0>;
215 atmel,audio-codec = <&wm8904>;
Bo Shen208ec6f2014-03-17 17:45:35 +0800216
217 status = "disabled";
Ludovic Desroches655ff2662013-03-22 13:24:13 +0000218 };
219};