blob: 953daf379b9bb26ca560ae48b0e1008a4ba8e4a9 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * drivers/mtd/nand/au1550nd.c
3 *
4 * Copyright (C) 2004 Embedded Edge, LLC
5 *
Pete Popovef6f0d12005-09-23 02:44:58 +01006 * $Id: au1550nd.c,v 1.12 2005/09/23 01:44:55 ppopov Exp $
Linus Torvalds1da177e2005-04-16 15:20:36 -07007 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14#include <linux/slab.h>
15#include <linux/init.h>
16#include <linux/module.h>
17#include <linux/mtd/mtd.h>
18#include <linux/mtd/nand.h>
19#include <linux/mtd/partitions.h>
20#include <asm/io.h>
21
22/* fixme: this is ugly */
23#if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 0)
Pete Popovef6f0d12005-09-23 02:44:58 +010024#include <asm/mach-au1x00/au1xxx.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070025#else
26#include <asm/au1000.h>
27#ifdef CONFIG_MIPS_PB1550
28#include <asm/pb1550.h>
29#endif
30#ifdef CONFIG_MIPS_DB1550
31#include <asm/db1x00.h>
32#endif
33#endif
34
35/*
36 * MTD structure for NAND controller
37 */
38static struct mtd_info *au1550_mtd = NULL;
39static void __iomem *p_nand;
40static int nand_width = 1; /* default x8*/
41
Linus Torvalds1da177e2005-04-16 15:20:36 -070042/*
43 * Define partitions for flash device
44 */
45const static struct mtd_partition partition_info[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -070046 {
Pete Popovef6f0d12005-09-23 02:44:58 +010047 .name = "NAND FS 0",
Linus Torvalds1da177e2005-04-16 15:20:36 -070048 .offset = 0,
Pete Popovef6f0d12005-09-23 02:44:58 +010049 .size = 8*1024*1024
Linus Torvalds1da177e2005-04-16 15:20:36 -070050 },
51 {
Pete Popovef6f0d12005-09-23 02:44:58 +010052 .name = "NAND FS 1",
Linus Torvalds1da177e2005-04-16 15:20:36 -070053 .offset = MTDPART_OFS_APPEND,
Pete Popovef6f0d12005-09-23 02:44:58 +010054 .size = MTDPART_SIZ_FULL
Linus Torvalds1da177e2005-04-16 15:20:36 -070055 }
Linus Torvalds1da177e2005-04-16 15:20:36 -070056};
Pete Popovef6f0d12005-09-23 02:44:58 +010057#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
Linus Torvalds1da177e2005-04-16 15:20:36 -070058
59
60/**
61 * au_read_byte - read one byte from the chip
62 * @mtd: MTD device structure
63 *
64 * read function for 8bit buswith
65 */
66static u_char au_read_byte(struct mtd_info *mtd)
67{
68 struct nand_chip *this = mtd->priv;
69 u_char ret = readb(this->IO_ADDR_R);
70 au_sync();
71 return ret;
72}
73
74/**
75 * au_write_byte - write one byte to the chip
76 * @mtd: MTD device structure
77 * @byte: pointer to data byte to write
78 *
79 * write function for 8it buswith
80 */
81static void au_write_byte(struct mtd_info *mtd, u_char byte)
82{
83 struct nand_chip *this = mtd->priv;
84 writeb(byte, this->IO_ADDR_W);
85 au_sync();
86}
87
88/**
89 * au_read_byte16 - read one byte endianess aware from the chip
90 * @mtd: MTD device structure
91 *
92 * read function for 16bit buswith with
93 * endianess conversion
94 */
95static u_char au_read_byte16(struct mtd_info *mtd)
96{
97 struct nand_chip *this = mtd->priv;
98 u_char ret = (u_char) cpu_to_le16(readw(this->IO_ADDR_R));
99 au_sync();
100 return ret;
101}
102
103/**
104 * au_write_byte16 - write one byte endianess aware to the chip
105 * @mtd: MTD device structure
106 * @byte: pointer to data byte to write
107 *
108 * write function for 16bit buswith with
109 * endianess conversion
110 */
111static void au_write_byte16(struct mtd_info *mtd, u_char byte)
112{
113 struct nand_chip *this = mtd->priv;
114 writew(le16_to_cpu((u16) byte), this->IO_ADDR_W);
115 au_sync();
116}
117
118/**
119 * au_read_word - read one word from the chip
120 * @mtd: MTD device structure
121 *
122 * read function for 16bit buswith without
123 * endianess conversion
124 */
125static u16 au_read_word(struct mtd_info *mtd)
126{
127 struct nand_chip *this = mtd->priv;
128 u16 ret = readw(this->IO_ADDR_R);
129 au_sync();
130 return ret;
131}
132
133/**
134 * au_write_word - write one word to the chip
135 * @mtd: MTD device structure
136 * @word: data word to write
137 *
138 * write function for 16bit buswith without
139 * endianess conversion
140 */
141static void au_write_word(struct mtd_info *mtd, u16 word)
142{
143 struct nand_chip *this = mtd->priv;
144 writew(word, this->IO_ADDR_W);
145 au_sync();
146}
147
148/**
149 * au_write_buf - write buffer to chip
150 * @mtd: MTD device structure
151 * @buf: data buffer
152 * @len: number of bytes to write
153 *
154 * write function for 8bit buswith
155 */
156static void au_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
157{
158 int i;
159 struct nand_chip *this = mtd->priv;
160
161 for (i=0; i<len; i++) {
162 writeb(buf[i], this->IO_ADDR_W);
163 au_sync();
164 }
165}
166
167/**
168 * au_read_buf - read chip data into buffer
169 * @mtd: MTD device structure
170 * @buf: buffer to store date
171 * @len: number of bytes to read
172 *
173 * read function for 8bit buswith
174 */
175static void au_read_buf(struct mtd_info *mtd, u_char *buf, int len)
176{
177 int i;
178 struct nand_chip *this = mtd->priv;
179
180 for (i=0; i<len; i++) {
181 buf[i] = readb(this->IO_ADDR_R);
182 au_sync();
183 }
184}
185
186/**
187 * au_verify_buf - Verify chip data against buffer
188 * @mtd: MTD device structure
189 * @buf: buffer containing the data to compare
190 * @len: number of bytes to compare
191 *
192 * verify function for 8bit buswith
193 */
194static int au_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
195{
196 int i;
197 struct nand_chip *this = mtd->priv;
198
199 for (i=0; i<len; i++) {
200 if (buf[i] != readb(this->IO_ADDR_R))
201 return -EFAULT;
202 au_sync();
203 }
204
205 return 0;
206}
207
208/**
209 * au_write_buf16 - write buffer to chip
210 * @mtd: MTD device structure
211 * @buf: data buffer
212 * @len: number of bytes to write
213 *
214 * write function for 16bit buswith
215 */
216static void au_write_buf16(struct mtd_info *mtd, const u_char *buf, int len)
217{
218 int i;
219 struct nand_chip *this = mtd->priv;
220 u16 *p = (u16 *) buf;
221 len >>= 1;
222
223 for (i=0; i<len; i++) {
224 writew(p[i], this->IO_ADDR_W);
225 au_sync();
226 }
227
228}
229
230/**
231 * au_read_buf16 - read chip data into buffer
232 * @mtd: MTD device structure
233 * @buf: buffer to store date
234 * @len: number of bytes to read
235 *
236 * read function for 16bit buswith
237 */
238static void au_read_buf16(struct mtd_info *mtd, u_char *buf, int len)
239{
240 int i;
241 struct nand_chip *this = mtd->priv;
242 u16 *p = (u16 *) buf;
243 len >>= 1;
244
245 for (i=0; i<len; i++) {
246 p[i] = readw(this->IO_ADDR_R);
247 au_sync();
248 }
249}
250
251/**
252 * au_verify_buf16 - Verify chip data against buffer
253 * @mtd: MTD device structure
254 * @buf: buffer containing the data to compare
255 * @len: number of bytes to compare
256 *
257 * verify function for 16bit buswith
258 */
259static int au_verify_buf16(struct mtd_info *mtd, const u_char *buf, int len)
260{
261 int i;
262 struct nand_chip *this = mtd->priv;
263 u16 *p = (u16 *) buf;
264 len >>= 1;
265
266 for (i=0; i<len; i++) {
267 if (p[i] != readw(this->IO_ADDR_R))
268 return -EFAULT;
269 au_sync();
270 }
271 return 0;
272}
273
274
275static void au1550_hwcontrol(struct mtd_info *mtd, int cmd)
276{
277 register struct nand_chip *this = mtd->priv;
278
279 switch(cmd){
280
281 case NAND_CTL_SETCLE: this->IO_ADDR_W = p_nand + MEM_STNAND_CMD; break;
282 case NAND_CTL_CLRCLE: this->IO_ADDR_W = p_nand + MEM_STNAND_DATA; break;
283
284 case NAND_CTL_SETALE: this->IO_ADDR_W = p_nand + MEM_STNAND_ADDR; break;
285 case NAND_CTL_CLRALE:
286 this->IO_ADDR_W = p_nand + MEM_STNAND_DATA;
287 /* FIXME: Nobody knows why this is neccecary,
288 * but it works only that way */
289 udelay(1);
290 break;
291
292 case NAND_CTL_SETNCE:
293 /* assert (force assert) chip enable */
294 au_writel((1<<(4+NAND_CS)) , MEM_STNDCTL); break;
295 break;
296
297 case NAND_CTL_CLRNCE:
298 /* deassert chip enable */
299 au_writel(0, MEM_STNDCTL); break;
300 break;
301 }
302
303 this->IO_ADDR_R = this->IO_ADDR_W;
304
305 /* Drain the writebuffer */
306 au_sync();
307}
308
309int au1550_device_ready(struct mtd_info *mtd)
310{
311 int ret = (au_readl(MEM_STSTAT) & 0x1) ? 1 : 0;
312 au_sync();
313 return ret;
314}
315
316/*
317 * Main initialization routine
318 */
Pete Popovef6f0d12005-09-23 02:44:58 +0100319int __init au1xxx_nand_init (void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700320{
321 struct nand_chip *this;
322 u16 boot_swapboot = 0; /* default value */
323 int retval;
Pete Popovef6f0d12005-09-23 02:44:58 +0100324 u32 mem_staddr;
325 u32 nand_phys;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700326
327 /* Allocate memory for MTD device structure and private data */
328 au1550_mtd = kmalloc (sizeof(struct mtd_info) +
329 sizeof (struct nand_chip), GFP_KERNEL);
330 if (!au1550_mtd) {
331 printk ("Unable to allocate NAND MTD dev structure.\n");
332 return -ENOMEM;
333 }
334
335 /* Get pointer to private data */
336 this = (struct nand_chip *) (&au1550_mtd[1]);
337
338 /* Initialize structures */
339 memset((char *) au1550_mtd, 0, sizeof(struct mtd_info));
340 memset((char *) this, 0, sizeof(struct nand_chip));
341
342 /* Link the private data with the MTD structure */
343 au1550_mtd->priv = this;
344
345
Pete Popovef6f0d12005-09-23 02:44:58 +0100346 /* disable interrupts */
347 au_writel(au_readl(MEM_STNDCTL) & ~(1<<8), MEM_STNDCTL);
348
349 /* disable NAND boot */
350 au_writel(au_readl(MEM_STNDCTL) & ~(1<<0), MEM_STNDCTL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700351
352#ifdef CONFIG_MIPS_PB1550
353 /* set gpio206 high */
354 au_writel(au_readl(GPIO2_DIR) & ~(1<<6), GPIO2_DIR);
355
356 boot_swapboot = (au_readl(MEM_STSTAT) & (0x7<<1)) |
357 ((bcsr->status >> 6) & 0x1);
358 switch (boot_swapboot) {
359 case 0:
360 case 2:
361 case 8:
362 case 0xC:
363 case 0xD:
364 /* x16 NAND Flash */
365 nand_width = 0;
366 break;
367 case 1:
368 case 9:
369 case 3:
370 case 0xE:
371 case 0xF:
372 /* x8 NAND Flash */
373 nand_width = 1;
374 break;
375 default:
376 printk("Pb1550 NAND: bad boot:swap\n");
377 retval = -EINVAL;
378 goto outmem;
379 }
380#endif
381
Pete Popovef6f0d12005-09-23 02:44:58 +0100382 /* Configure chip-select; normally done by boot code, e.g. YAMON */
383#ifdef NAND_STCFG
384 if (NAND_CS == 0) {
385 au_writel(NAND_STCFG, MEM_STCFG0);
386 au_writel(NAND_STTIME, MEM_STTIME0);
387 au_writel(NAND_STADDR, MEM_STADDR0);
388 }
389 if (NAND_CS == 1) {
390 au_writel(NAND_STCFG, MEM_STCFG1);
391 au_writel(NAND_STTIME, MEM_STTIME1);
392 au_writel(NAND_STADDR, MEM_STADDR1);
393 }
394 if (NAND_CS == 2) {
395 au_writel(NAND_STCFG, MEM_STCFG2);
396 au_writel(NAND_STTIME, MEM_STTIME2);
397 au_writel(NAND_STADDR, MEM_STADDR2);
398 }
399 if (NAND_CS == 3) {
400 au_writel(NAND_STCFG, MEM_STCFG3);
401 au_writel(NAND_STTIME, MEM_STTIME3);
402 au_writel(NAND_STADDR, MEM_STADDR3);
403 }
404#endif
405
406 /* Locate NAND chip-select in order to determine NAND phys address */
407 mem_staddr = 0x00000000;
408 if (((au_readl(MEM_STCFG0) & 0x7) == 0x5) && (NAND_CS == 0))
409 mem_staddr = au_readl(MEM_STADDR0);
410 else if (((au_readl(MEM_STCFG1) & 0x7) == 0x5) && (NAND_CS == 1))
411 mem_staddr = au_readl(MEM_STADDR1);
412 else if (((au_readl(MEM_STCFG2) & 0x7) == 0x5) && (NAND_CS == 2))
413 mem_staddr = au_readl(MEM_STADDR2);
414 else if (((au_readl(MEM_STCFG3) & 0x7) == 0x5) && (NAND_CS == 3))
415 mem_staddr = au_readl(MEM_STADDR3);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700416
Pete Popovef6f0d12005-09-23 02:44:58 +0100417 if (mem_staddr == 0x00000000) {
418 printk("Au1xxx NAND: ERROR WITH NAND CHIP-SELECT\n");
419 kfree(au1550_mtd);
420 return 1;
421 }
422 nand_phys = (mem_staddr << 4) & 0xFFFC0000;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700423
Pete Popovef6f0d12005-09-23 02:44:58 +0100424 p_nand = (void __iomem *)ioremap(nand_phys, 0x1000);
425
426 /* make controller and MTD agree */
427 if (NAND_CS == 0)
428 nand_width = au_readl(MEM_STCFG0) & (1<<22);
429 if (NAND_CS == 1)
430 nand_width = au_readl(MEM_STCFG1) & (1<<22);
431 if (NAND_CS == 2)
432 nand_width = au_readl(MEM_STCFG2) & (1<<22);
433 if (NAND_CS == 3)
434 nand_width = au_readl(MEM_STCFG3) & (1<<22);
435
Linus Torvalds1da177e2005-04-16 15:20:36 -0700436
437 /* Set address of hardware control function */
438 this->hwcontrol = au1550_hwcontrol;
439 this->dev_ready = au1550_device_ready;
440 /* 30 us command delay time */
441 this->chip_delay = 30;
442 this->eccmode = NAND_ECC_SOFT;
443
444 this->options = NAND_NO_AUTOINCR;
445
446 if (!nand_width)
447 this->options |= NAND_BUSWIDTH_16;
448
449 this->read_byte = (!nand_width) ? au_read_byte16 : au_read_byte;
450 this->write_byte = (!nand_width) ? au_write_byte16 : au_write_byte;
451 this->write_word = au_write_word;
452 this->read_word = au_read_word;
453 this->write_buf = (!nand_width) ? au_write_buf16 : au_write_buf;
454 this->read_buf = (!nand_width) ? au_read_buf16 : au_read_buf;
455 this->verify_buf = (!nand_width) ? au_verify_buf16 : au_verify_buf;
456
457 /* Scan to find existence of the device */
458 if (nand_scan (au1550_mtd, 1)) {
459 retval = -ENXIO;
460 goto outio;
461 }
462
463 /* Register the partitions */
Pete Popovef6f0d12005-09-23 02:44:58 +0100464 add_mtd_partitions(au1550_mtd, partition_info, NB_OF(partition_info));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700465
466 return 0;
467
468 outio:
469 iounmap ((void *)p_nand);
470
471 outmem:
472 kfree (au1550_mtd);
473 return retval;
474}
475
Pete Popovef6f0d12005-09-23 02:44:58 +0100476module_init(au1xxx_nand_init);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700477
478/*
479 * Clean up routine
480 */
481#ifdef MODULE
482static void __exit au1550_cleanup (void)
483{
484 struct nand_chip *this = (struct nand_chip *) &au1550_mtd[1];
485
486 /* Release resources, unregister device */
487 nand_release (au1550_mtd);
488
489 /* Free the MTD device structure */
490 kfree (au1550_mtd);
491
492 /* Unmap */
493 iounmap ((void *)p_nand);
494}
495module_exit(au1550_cleanup);
496#endif
497
498MODULE_LICENSE("GPL");
499MODULE_AUTHOR("Embedded Edge, LLC");
500MODULE_DESCRIPTION("Board-specific glue layer for NAND flash on Pb1550 board");