Nicolas Ferre | 49fe2ba | 2011-10-10 18:29:24 +0200 | [diff] [blame] | 1 | /* |
| 2 | * at91sam9m10g45ek.dts - Device Tree file for AT91SAM9M10G45-EK board |
| 3 | * |
| 4 | * Copyright (C) 2011 Atmel, |
| 5 | * 2011 Nicolas Ferre <nicolas.ferre@atmel.com> |
| 6 | * |
| 7 | * Licensed under GPLv2 or later. |
| 8 | */ |
| 9 | /dts-v1/; |
Jean-Christophe PLAGNIOL-VILLARD | 6db64d2 | 2013-05-15 01:21:50 +0800 | [diff] [blame] | 10 | #include "at91sam9g45.dtsi" |
Alexandre Belloni | 66844c7 | 2014-03-19 00:15:41 +0100 | [diff] [blame] | 11 | #include <dt-bindings/pwm/pwm.h> |
Nicolas Ferre | 49fe2ba | 2011-10-10 18:29:24 +0200 | [diff] [blame] | 12 | |
| 13 | / { |
| 14 | model = "Atmel AT91SAM9M10G45-EK"; |
| 15 | compatible = "atmel,at91sam9m10g45ek", "atmel,at91sam9g45", "atmel,at91sam9"; |
| 16 | |
| 17 | chosen { |
Jean-Christophe PLAGNIOL-VILLARD | d6a0166 | 2012-01-26 02:11:06 +0800 | [diff] [blame] | 18 | bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2"; |
Nicolas Ferre | 49fe2ba | 2011-10-10 18:29:24 +0200 | [diff] [blame] | 19 | }; |
| 20 | |
Ludovic Desroches | dcce6ce | 2012-04-02 20:44:20 +0200 | [diff] [blame] | 21 | memory { |
Nicolas Ferre | 49fe2ba | 2011-10-10 18:29:24 +0200 | [diff] [blame] | 22 | reg = <0x70000000 0x4000000>; |
| 23 | }; |
| 24 | |
Jean-Christophe PLAGNIOL-VILLARD | eb5e76f | 2012-03-02 20:44:23 +0800 | [diff] [blame] | 25 | clocks { |
| 26 | #address-cells = <1>; |
| 27 | #size-cells = <1>; |
| 28 | ranges; |
| 29 | |
| 30 | main_clock: clock@0 { |
| 31 | compatible = "atmel,osc", "fixed-clock"; |
| 32 | clock-frequency = <12000000>; |
| 33 | }; |
Alexandre Belloni | 4c67a13 | 2014-06-13 20:01:51 +0200 | [diff] [blame] | 34 | |
| 35 | slow_xtal { |
| 36 | clock-frequency = <32768>; |
| 37 | }; |
| 38 | |
| 39 | main_xtal { |
| 40 | clock-frequency = <12000000>; |
| 41 | }; |
Jean-Christophe PLAGNIOL-VILLARD | eb5e76f | 2012-03-02 20:44:23 +0800 | [diff] [blame] | 42 | }; |
| 43 | |
Nicolas Ferre | 49fe2ba | 2011-10-10 18:29:24 +0200 | [diff] [blame] | 44 | ahb { |
| 45 | apb { |
| 46 | dbgu: serial@ffffee00 { |
| 47 | status = "okay"; |
| 48 | }; |
| 49 | |
| 50 | usart1: serial@fff90000 { |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 51 | pinctrl-0 = |
| 52 | <&pinctrl_usart1 |
| 53 | &pinctrl_usart1_rts |
| 54 | &pinctrl_usart1_cts>; |
Nicolas Ferre | 49fe2ba | 2011-10-10 18:29:24 +0200 | [diff] [blame] | 55 | status = "okay"; |
| 56 | }; |
Nicolas Ferre | 0d4f99d | 2011-12-05 18:03:05 +0100 | [diff] [blame] | 57 | |
| 58 | macb0: ethernet@fffbc000 { |
| 59 | phy-mode = "rmii"; |
| 60 | status = "okay"; |
| 61 | }; |
Ludovic Desroches | fbc1871 | 2012-09-12 08:42:17 +0200 | [diff] [blame] | 62 | |
| 63 | i2c0: i2c@fff84000 { |
| 64 | status = "okay"; |
| 65 | }; |
| 66 | |
| 67 | i2c1: i2c@fff88000 { |
| 68 | status = "okay"; |
| 69 | }; |
Ludovic Desroches | 4134a45 | 2012-11-19 12:24:02 +0100 | [diff] [blame] | 70 | |
Wenyou Yang | c77bcef | 2013-05-31 11:11:33 +0800 | [diff] [blame] | 71 | watchdog@fffffd40 { |
| 72 | status = "okay"; |
| 73 | }; |
| 74 | |
Ludovic Desroches | 4134a45 | 2012-11-19 12:24:02 +0100 | [diff] [blame] | 75 | mmc0: mmc@fff80000 { |
Jean-Christophe PLAGNIOL-VILLARD | 199e2ed | 2012-11-20 00:38:18 +0800 | [diff] [blame] | 76 | pinctrl-0 = < |
| 77 | &pinctrl_board_mmc0 |
| 78 | &pinctrl_mmc0_slot0_clk_cmd_dat0 |
| 79 | &pinctrl_mmc0_slot0_dat1_3>; |
Ludovic Desroches | 4134a45 | 2012-11-19 12:24:02 +0100 | [diff] [blame] | 80 | status = "okay"; |
| 81 | slot@0 { |
| 82 | reg = <0>; |
| 83 | bus-width = <4>; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 84 | cd-gpios = <&pioD 10 GPIO_ACTIVE_HIGH>; |
Ludovic Desroches | 4134a45 | 2012-11-19 12:24:02 +0100 | [diff] [blame] | 85 | }; |
| 86 | }; |
| 87 | |
| 88 | mmc1: mmc@fffd0000 { |
Jean-Christophe PLAGNIOL-VILLARD | 199e2ed | 2012-11-20 00:38:18 +0800 | [diff] [blame] | 89 | pinctrl-0 = < |
| 90 | &pinctrl_board_mmc1 |
| 91 | &pinctrl_mmc1_slot0_clk_cmd_dat0 |
| 92 | &pinctrl_mmc1_slot0_dat1_3>; |
Ludovic Desroches | 4134a45 | 2012-11-19 12:24:02 +0100 | [diff] [blame] | 93 | status = "okay"; |
| 94 | slot@0 { |
| 95 | reg = <0>; |
| 96 | bus-width = <4>; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 97 | cd-gpios = <&pioD 11 GPIO_ACTIVE_HIGH>; |
| 98 | wp-gpios = <&pioD 29 GPIO_ACTIVE_HIGH>; |
Ludovic Desroches | 4134a45 | 2012-11-19 12:24:02 +0100 | [diff] [blame] | 99 | }; |
| 100 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 199e2ed | 2012-11-20 00:38:18 +0800 | [diff] [blame] | 101 | |
| 102 | pinctrl@fffff200 { |
| 103 | mmc0 { |
| 104 | pinctrl_board_mmc0: mmc0-board { |
| 105 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 106 | <AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD10 gpio CD pin pull up and deglitch */ |
Jean-Christophe PLAGNIOL-VILLARD | 199e2ed | 2012-11-20 00:38:18 +0800 | [diff] [blame] | 107 | }; |
| 108 | }; |
| 109 | |
| 110 | mmc1 { |
| 111 | pinctrl_board_mmc1: mmc1-board { |
| 112 | atmel,pins = |
Jean-Christophe PLAGNIOL-VILLARD | c9d0f31 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 113 | <AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH /* PD11 gpio CD pin pull up and deglitch */ |
| 114 | AT91_PIOD 29 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD29 gpio WP pin pull up */ |
Jean-Christophe PLAGNIOL-VILLARD | 199e2ed | 2012-11-20 00:38:18 +0800 | [diff] [blame] | 115 | }; |
| 116 | }; |
Bo Shen | eed9729 | 2013-12-19 11:59:18 +0800 | [diff] [blame] | 117 | |
| 118 | pwm0 { |
| 119 | pinctrl_pwm_leds: pwm-led { |
| 120 | atmel,pins = |
| 121 | <AT91_PIOD 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PD0 periph B */ |
| 122 | AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PD31 periph B */ |
| 123 | }; |
| 124 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 199e2ed | 2012-11-20 00:38:18 +0800 | [diff] [blame] | 125 | }; |
Richard Genoud | b6811e9 | 2013-04-03 14:03:05 +0800 | [diff] [blame] | 126 | |
| 127 | spi0: spi@fffa4000{ |
| 128 | status = "okay"; |
| 129 | cs-gpios = <&pioB 3 0>, <0>, <0>, <0>; |
| 130 | mtd_dataflash@0 { |
| 131 | compatible = "atmel,at45", "atmel,dataflash"; |
| 132 | spi-max-frequency = <13000000>; |
| 133 | reg = <0>; |
| 134 | }; |
| 135 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 24ce10e | 2013-05-03 20:56:01 +0800 | [diff] [blame] | 136 | |
| 137 | usb2: gadget@fff78000 { |
| 138 | atmel,vbus-gpio = <&pioB 19 GPIO_ACTIVE_HIGH>; |
| 139 | status = "okay"; |
| 140 | }; |
Bo Shen | eed9729 | 2013-12-19 11:59:18 +0800 | [diff] [blame] | 141 | |
Alexandre Belloni | e10a57e | 2014-03-19 00:15:40 +0100 | [diff] [blame] | 142 | adc0: adc@fffb0000 { |
| 143 | pinctrl-names = "default"; |
| 144 | pinctrl-0 = < |
| 145 | &pinctrl_adc0_ad0 |
| 146 | &pinctrl_adc0_ad1 |
| 147 | &pinctrl_adc0_ad2 |
| 148 | &pinctrl_adc0_ad3 |
| 149 | &pinctrl_adc0_ad4 |
| 150 | &pinctrl_adc0_ad5 |
| 151 | &pinctrl_adc0_ad6 |
| 152 | &pinctrl_adc0_ad7>; |
| 153 | atmel,adc-ts-wires = <4>; |
| 154 | status = "okay"; |
| 155 | }; |
| 156 | |
Bo Shen | eed9729 | 2013-12-19 11:59:18 +0800 | [diff] [blame] | 157 | pwm0: pwm@fffb8000 { |
| 158 | status = "okay"; |
| 159 | |
| 160 | pinctrl-names = "default"; |
| 161 | pinctrl-0 = <&pinctrl_pwm_leds>; |
| 162 | }; |
Erik van Luijk | 4dd7933 | 2014-09-02 12:52:12 +0200 | [diff] [blame] | 163 | |
| 164 | rtc@fffffdb0 { |
| 165 | status = "okay"; |
| 166 | }; |
Nicolas Ferre | 49fe2ba | 2011-10-10 18:29:24 +0200 | [diff] [blame] | 167 | }; |
Jean-Christophe PLAGNIOL-VILLARD | d6a0166 | 2012-01-26 02:11:06 +0800 | [diff] [blame] | 168 | |
Jean-Christophe PLAGNIOL-VILLARD | f4390a7 | 2013-03-29 02:11:22 +0800 | [diff] [blame] | 169 | fb0: fb@0x00500000 { |
| 170 | display = <&display0>; |
| 171 | status = "okay"; |
| 172 | |
| 173 | display0: display { |
| 174 | bits-per-pixel = <32>; |
| 175 | atmel,lcdcon-backlight; |
| 176 | atmel,dmacon = <0x1>; |
| 177 | atmel,lcdcon2 = <0x80008002>; |
| 178 | atmel,guard-time = <9>; |
| 179 | atmel,lcd-wiring-mode = "RGB"; |
| 180 | |
| 181 | display-timings { |
| 182 | native-mode = <&timing0>; |
| 183 | timing0: timing0 { |
| 184 | clock-frequency = <9000000>; |
| 185 | hactive = <480>; |
| 186 | vactive = <272>; |
| 187 | hback-porch = <1>; |
| 188 | hfront-porch = <1>; |
| 189 | vback-porch = <40>; |
| 190 | vfront-porch = <1>; |
| 191 | hsync-len = <45>; |
| 192 | vsync-len = <1>; |
| 193 | }; |
| 194 | }; |
| 195 | }; |
| 196 | }; |
| 197 | |
Jean-Christophe PLAGNIOL-VILLARD | d6a0166 | 2012-01-26 02:11:06 +0800 | [diff] [blame] | 198 | nand0: nand@40000000 { |
| 199 | nand-bus-width = <8>; |
| 200 | nand-ecc-mode = "soft"; |
| 201 | nand-on-flash-bbt; |
| 202 | status = "okay"; |
| 203 | |
| 204 | boot@0 { |
| 205 | label = "bootstrap/uboot/kernel"; |
| 206 | reg = <0x0 0x400000>; |
| 207 | }; |
| 208 | |
| 209 | rootfs@400000 { |
| 210 | label = "rootfs"; |
| 211 | reg = <0x400000 0x3C00000>; |
| 212 | }; |
| 213 | |
| 214 | data@4000000 { |
| 215 | label = "data"; |
| 216 | reg = <0x4000000 0xC000000>; |
| 217 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 6a06245 | 2011-11-21 06:55:18 +0800 | [diff] [blame] | 218 | }; |
Jean-Christophe PLAGNIOL-VILLARD | d6a0166 | 2012-01-26 02:11:06 +0800 | [diff] [blame] | 219 | |
Jean-Christophe PLAGNIOL-VILLARD | 6a06245 | 2011-11-21 06:55:18 +0800 | [diff] [blame] | 220 | usb0: ohci@00700000 { |
| 221 | status = "okay"; |
| 222 | num-ports = <2>; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 223 | atmel,vbus-gpio = <&pioD 1 GPIO_ACTIVE_LOW |
| 224 | &pioD 3 GPIO_ACTIVE_LOW>; |
Jean-Christophe PLAGNIOL-VILLARD | d6a0166 | 2012-01-26 02:11:06 +0800 | [diff] [blame] | 225 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 62c5553 | 2011-11-22 12:11:13 +0800 | [diff] [blame] | 226 | |
| 227 | usb1: ehci@00800000 { |
| 228 | status = "okay"; |
| 229 | }; |
Nicolas Ferre | 49fe2ba | 2011-10-10 18:29:24 +0200 | [diff] [blame] | 230 | }; |
Jean-Christophe PLAGNIOL-VILLARD | f2ee7ac | 2012-02-04 12:26:01 +0800 | [diff] [blame] | 231 | |
| 232 | leds { |
| 233 | compatible = "gpio-leds"; |
| 234 | |
| 235 | d8 { |
| 236 | label = "d8"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 237 | gpios = <&pioD 30 GPIO_ACTIVE_HIGH>; |
Jean-Christophe PLAGNIOL-VILLARD | f2ee7ac | 2012-02-04 12:26:01 +0800 | [diff] [blame] | 238 | linux,default-trigger = "heartbeat"; |
| 239 | }; |
Bo Shen | eed9729 | 2013-12-19 11:59:18 +0800 | [diff] [blame] | 240 | }; |
| 241 | |
| 242 | pwmleds { |
| 243 | compatible = "pwm-leds"; |
Jean-Christophe PLAGNIOL-VILLARD | f2ee7ac | 2012-02-04 12:26:01 +0800 | [diff] [blame] | 244 | |
| 245 | d6 { |
| 246 | label = "d6"; |
Alexandre Belloni | 66844c7 | 2014-03-19 00:15:41 +0100 | [diff] [blame] | 247 | pwms = <&pwm0 3 5000 PWM_POLARITY_INVERTED>; |
Bo Shen | eed9729 | 2013-12-19 11:59:18 +0800 | [diff] [blame] | 248 | max-brightness = <255>; |
Jean-Christophe PLAGNIOL-VILLARD | f2ee7ac | 2012-02-04 12:26:01 +0800 | [diff] [blame] | 249 | linux,default-trigger = "nand-disk"; |
| 250 | }; |
| 251 | |
| 252 | d7 { |
| 253 | label = "d7"; |
Alexandre Belloni | 66844c7 | 2014-03-19 00:15:41 +0100 | [diff] [blame] | 254 | pwms = <&pwm0 1 5000 PWM_POLARITY_INVERTED>; |
Bo Shen | eed9729 | 2013-12-19 11:59:18 +0800 | [diff] [blame] | 255 | max-brightness = <255>; |
Jean-Christophe PLAGNIOL-VILLARD | f2ee7ac | 2012-02-04 12:26:01 +0800 | [diff] [blame] | 256 | linux,default-trigger = "mmc0"; |
| 257 | }; |
| 258 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 8a087b0 | 2012-02-04 12:42:35 +0800 | [diff] [blame] | 259 | |
| 260 | gpio_keys { |
| 261 | compatible = "gpio-keys"; |
Jean-Christophe PLAGNIOL-VILLARD | 8a087b0 | 2012-02-04 12:42:35 +0800 | [diff] [blame] | 262 | |
| 263 | left_click { |
| 264 | label = "left_click"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 265 | gpios = <&pioB 6 GPIO_ACTIVE_LOW>; |
Jean-Christophe PLAGNIOL-VILLARD | 8a087b0 | 2012-02-04 12:42:35 +0800 | [diff] [blame] | 266 | linux,code = <272>; |
| 267 | gpio-key,wakeup; |
| 268 | }; |
| 269 | |
| 270 | right_click { |
| 271 | label = "right_click"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 272 | gpios = <&pioB 7 GPIO_ACTIVE_LOW>; |
Jean-Christophe PLAGNIOL-VILLARD | 8a087b0 | 2012-02-04 12:42:35 +0800 | [diff] [blame] | 273 | linux,code = <273>; |
| 274 | gpio-key,wakeup; |
| 275 | }; |
| 276 | |
| 277 | left { |
| 278 | label = "Joystick Left"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 279 | gpios = <&pioB 14 GPIO_ACTIVE_LOW>; |
Jean-Christophe PLAGNIOL-VILLARD | 8a087b0 | 2012-02-04 12:42:35 +0800 | [diff] [blame] | 280 | linux,code = <105>; |
| 281 | }; |
| 282 | |
| 283 | right { |
| 284 | label = "Joystick Right"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 285 | gpios = <&pioB 15 GPIO_ACTIVE_LOW>; |
Jean-Christophe PLAGNIOL-VILLARD | 8a087b0 | 2012-02-04 12:42:35 +0800 | [diff] [blame] | 286 | linux,code = <106>; |
| 287 | }; |
| 288 | |
| 289 | up { |
| 290 | label = "Joystick Up"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 291 | gpios = <&pioB 16 GPIO_ACTIVE_LOW>; |
Jean-Christophe PLAGNIOL-VILLARD | 8a087b0 | 2012-02-04 12:42:35 +0800 | [diff] [blame] | 292 | linux,code = <103>; |
| 293 | }; |
| 294 | |
| 295 | down { |
| 296 | label = "Joystick Down"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 297 | gpios = <&pioB 17 GPIO_ACTIVE_LOW>; |
Jean-Christophe PLAGNIOL-VILLARD | 8a087b0 | 2012-02-04 12:42:35 +0800 | [diff] [blame] | 298 | linux,code = <108>; |
| 299 | }; |
| 300 | |
| 301 | enter { |
| 302 | label = "Joystick Press"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame] | 303 | gpios = <&pioB 18 GPIO_ACTIVE_LOW>; |
Jean-Christophe PLAGNIOL-VILLARD | 8a087b0 | 2012-02-04 12:42:35 +0800 | [diff] [blame] | 304 | linux,code = <28>; |
| 305 | }; |
| 306 | }; |
Nicolas Ferre | 49fe2ba | 2011-10-10 18:29:24 +0200 | [diff] [blame] | 307 | }; |