blob: 6932928f3b45c99cc4d807edacf9475e55650056 [file] [log] [blame]
Steffen Trumtrara4f3ac42013-12-18 15:10:26 +01001/*
2 * Copyright 2012 Steffen Trumtrar, Pengutronix
3 *
4 * based on imx27.dtsi
5 *
6 * This program is free software; you can redistribute it and/or modify it under
7 * the terms of the GNU General Public License version 2 as published by the
8 * Free Software Foundation.
9 */
10
11#include "skeleton.dtsi"
12#include "imx35-pinfunc.h"
13
14/ {
15 aliases {
Marek Vasut22970072014-02-28 12:58:41 +010016 ethernet0 = &fec;
Steffen Trumtrara4f3ac42013-12-18 15:10:26 +010017 gpio0 = &gpio1;
18 gpio1 = &gpio2;
19 gpio2 = &gpio3;
20 serial0 = &uart1;
21 serial1 = &uart2;
22 serial2 = &uart3;
23 spi0 = &spi1;
24 spi1 = &spi2;
25 };
26
27 cpus {
28 #address-cells = <0>;
29 #size-cells = <0>;
30
31 cpu {
32 compatible = "arm,arm1136";
33 device_type = "cpu";
34 };
35 };
36
37 avic: avic-interrupt-controller@68000000 {
38 compatible = "fsl,imx35-avic", "fsl,avic";
39 interrupt-controller;
40 #interrupt-cells = <1>;
41 reg = <0x68000000 0x10000000>;
42 };
43
44 soc {
45 #address-cells = <1>;
46 #size-cells = <1>;
47 compatible = "simple-bus";
48 interrupt-parent = <&avic>;
49 ranges;
50
51 L2: l2-cache@30000000 {
52 compatible = "arm,l210-cache";
53 reg = <0x30000000 0x1000>;
54 cache-unified;
55 cache-level = <2>;
56 };
57
58 aips1: aips@43f00000 {
59 compatible = "fsl,aips", "simple-bus";
60 #address-cells = <1>;
61 #size-cells = <1>;
62 reg = <0x43f00000 0x100000>;
63 ranges;
64
65 i2c1: i2c@43f80000 {
66 #address-cells = <1>;
67 #size-cells = <0>;
68 compatible = "fsl,imx35-i2c", "fsl,imx1-i2c";
69 reg = <0x43f80000 0x4000>;
70 clocks = <&clks 51>;
71 clock-names = "ipg_per";
72 interrupts = <10>;
73 status = "disabled";
74 };
75
76 i2c3: i2c@43f84000 {
77 #address-cells = <1>;
78 #size-cells = <0>;
79 compatible = "fsl,imx35-i2c", "fsl,imx1-i2c";
80 reg = <0x43f84000 0x4000>;
81 clocks = <&clks 53>;
82 clock-names = "ipg_per";
83 interrupts = <3>;
84 status = "disabled";
85 };
86
87 uart1: serial@43f90000 {
88 compatible = "fsl,imx35-uart", "fsl,imx21-uart";
89 reg = <0x43f90000 0x4000>;
90 clocks = <&clks 9>, <&clks 70>;
91 clock-names = "ipg", "per";
92 interrupts = <45>;
93 status = "disabled";
94 };
95
96 uart2: serial@43f94000 {
97 compatible = "fsl,imx35-uart", "fsl,imx21-uart";
98 reg = <0x43f94000 0x4000>;
99 clocks = <&clks 9>, <&clks 71>;
100 clock-names = "ipg", "per";
101 interrupts = <32>;
102 status = "disabled";
103 };
104
105 i2c2: i2c@43f98000 {
106 #address-cells = <1>;
107 #size-cells = <0>;
108 compatible = "fsl,imx35-i2c", "fsl,imx1-i2c";
109 reg = <0x43f98000 0x4000>;
110 clocks = <&clks 52>;
111 clock-names = "ipg_per";
112 interrupts = <4>;
113 status = "disabled";
114 };
115
116 ssi1: ssi@43fa0000 {
Alexander Shiyan6ff7f512014-08-19 20:00:09 +0400117 #sound-dai-cells = <0>;
Steffen Trumtrara4f3ac42013-12-18 15:10:26 +0100118 compatible = "fsl,imx35-ssi", "fsl,imx21-ssi";
119 reg = <0x43fa0000 0x4000>;
120 interrupts = <11>;
121 clocks = <&clks 68>;
122 dmas = <&sdma 28 0 0>,
123 <&sdma 29 0 0>;
124 dma-names = "rx", "tx";
125 fsl,fifo-depth = <15>;
126 status = "disabled";
127 };
128
129 spi1: cspi@43fa4000 {
130 #address-cells = <1>;
131 #size-cells = <0>;
132 compatible = "fsl,imx35-cspi";
133 reg = <0x43fa4000 0x4000>;
134 clocks = <&clks 35 &clks 35>;
135 clock-names = "ipg", "per";
136 interrupts = <14>;
137 status = "disabled";
138 };
139
140 iomuxc: iomuxc@43fac000 {
141 compatible = "fsl,imx35-iomuxc";
142 reg = <0x43fac000 0x4000>;
143 };
144 };
145
146 spba: spba-bus@50000000 {
147 compatible = "fsl,spba-bus", "simple-bus";
148 #address-cells = <1>;
149 #size-cells = <1>;
150 reg = <0x50000000 0x100000>;
151 ranges;
152
153 uart3: serial@5000c000 {
154 compatible = "fsl,imx35-uart", "fsl,imx21-uart";
155 reg = <0x5000c000 0x4000>;
156 clocks = <&clks 9>, <&clks 72>;
157 clock-names = "ipg", "per";
158 interrupts = <18>;
159 status = "disabled";
160 };
161
162 spi2: cspi@50010000 {
163 #address-cells = <1>;
164 #size-cells = <0>;
165 compatible = "fsl,imx35-cspi";
166 reg = <0x50010000 0x4000>;
167 interrupts = <13>;
168 clocks = <&clks 36 &clks 36>;
169 clock-names = "ipg", "per";
170 status = "disabled";
171 };
172
173 fec: fec@50038000 {
174 compatible = "fsl,imx35-fec", "fsl,imx27-fec";
175 reg = <0x50038000 0x4000>;
176 clocks = <&clks 46>, <&clks 8>;
177 clock-names = "ipg", "ahb";
178 interrupts = <57>;
179 status = "disabled";
180 };
181 };
182
183 aips2: aips@53f00000 {
184 compatible = "fsl,aips", "simple-bus";
185 #address-cells = <1>;
186 #size-cells = <1>;
187 reg = <0x53f00000 0x100000>;
188 ranges;
189
190 clks: ccm@53f80000 {
191 compatible = "fsl,imx35-ccm";
192 reg = <0x53f80000 0x4000>;
193 interrupts = <31>;
194 #clock-cells = <1>;
195 };
196
Alexander Shiyan0ebda1d2014-06-07 16:34:18 +0400197 gpt: timer@53f90000 {
198 compatible = "fsl,imx35-gpt", "fsl,imx31-gpt";
199 reg = <0x53f90000 0x4000>;
200 interrupts = <29>;
201 clocks = <&clks 9>, <&clks 50>;
202 clock-names = "ipg", "per";
203 };
204
Steffen Trumtrara4f3ac42013-12-18 15:10:26 +0100205 gpio3: gpio@53fa4000 {
206 compatible = "fsl,imx35-gpio", "fsl,imx31-gpio";
207 reg = <0x53fa4000 0x4000>;
208 interrupts = <56>;
209 gpio-controller;
210 #gpio-cells = <2>;
211 interrupt-controller;
212 #interrupt-cells = <2>;
213 };
214
215 esdhc1: esdhc@53fb4000 {
216 compatible = "fsl,imx35-esdhc";
217 reg = <0x53fb4000 0x4000>;
218 interrupts = <7>;
219 clocks = <&clks 9>, <&clks 8>, <&clks 43>;
220 clock-names = "ipg", "ahb", "per";
221 status = "disabled";
222 };
223
224 esdhc2: esdhc@53fb8000 {
225 compatible = "fsl,imx35-esdhc";
226 reg = <0x53fb8000 0x4000>;
227 interrupts = <8>;
228 clocks = <&clks 9>, <&clks 8>, <&clks 44>;
229 clock-names = "ipg", "ahb", "per";
230 status = "disabled";
231 };
232
233 esdhc3: esdhc@53fbc000 {
234 compatible = "fsl,imx35-esdhc";
235 reg = <0x53fbc000 0x4000>;
236 interrupts = <9>;
237 clocks = <&clks 9>, <&clks 8>, <&clks 45>;
238 clock-names = "ipg", "ahb", "per";
239 status = "disabled";
240 };
241
242 audmux: audmux@53fc4000 {
243 compatible = "fsl,imx35-audmux", "fsl,imx31-audmux";
244 reg = <0x53fc4000 0x4000>;
245 status = "disabled";
246 };
247
248 gpio1: gpio@53fcc000 {
249 compatible = "fsl,imx35-gpio", "fsl,imx31-gpio";
250 reg = <0x53fcc000 0x4000>;
251 interrupts = <52>;
252 gpio-controller;
253 #gpio-cells = <2>;
254 interrupt-controller;
255 #interrupt-cells = <2>;
256 };
257
258 gpio2: gpio@53fd0000 {
259 compatible = "fsl,imx35-gpio", "fsl,imx31-gpio";
260 reg = <0x53fd0000 0x4000>;
261 interrupts = <51>;
262 gpio-controller;
263 #gpio-cells = <2>;
264 interrupt-controller;
265 #interrupt-cells = <2>;
266 };
267
268 sdma: sdma@53fd4000 {
269 compatible = "fsl,imx35-sdma";
270 reg = <0x53fd4000 0x4000>;
271 clocks = <&clks 9>, <&clks 65>;
272 clock-names = "ipg", "ahb";
273 #dma-cells = <3>;
274 interrupts = <34>;
275 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx35.bin";
276 };
277
278 wdog: wdog@53fdc000 {
279 compatible = "fsl,imx35-wdt", "fsl,imx21-wdt";
280 reg = <0x53fdc000 0x4000>;
281 clocks = <&clks 74>;
282 clock-names = "";
283 interrupts = <55>;
284 };
285
286 can1: can@53fe4000 {
287 compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";
288 reg = <0x53fe4000 0x1000>;
289 clocks = <&clks 33>;
290 clock-names = "ipg";
291 interrupts = <43>;
292 status = "disabled";
293 };
294
295 can2: can@53fe8000 {
296 compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";
297 reg = <0x53fe8000 0x1000>;
298 clocks = <&clks 34>;
299 clock-names = "ipg";
300 interrupts = <44>;
301 status = "disabled";
302 };
303
304 usbotg: usb@53ff4000 {
305 compatible = "fsl,imx35-usb", "fsl,imx27-usb";
306 reg = <0x53ff4000 0x0200>;
307 interrupts = <37>;
Fabio Estevam056c5a52014-03-13 10:18:40 +0100308 clocks = <&clks 73>;
Steffen Trumtrara4f3ac42013-12-18 15:10:26 +0100309 fsl,usbmisc = <&usbmisc 0>;
Denis Carikliff348252014-03-13 10:18:44 +0100310 fsl,usbphy = <&usbphy0>;
Steffen Trumtrara4f3ac42013-12-18 15:10:26 +0100311 status = "disabled";
312 };
313
314 usbhost1: usb@53ff4400 {
315 compatible = "fsl,imx35-usb", "fsl,imx27-usb";
316 reg = <0x53ff4400 0x0200>;
317 interrupts = <35>;
Fabio Estevam056c5a52014-03-13 10:18:40 +0100318 clocks = <&clks 73>;
Steffen Trumtrara4f3ac42013-12-18 15:10:26 +0100319 fsl,usbmisc = <&usbmisc 1>;
Denis Carikliff348252014-03-13 10:18:44 +0100320 fsl,usbphy = <&usbphy1>;
Steffen Trumtrara4f3ac42013-12-18 15:10:26 +0100321 status = "disabled";
322 };
323
324 usbmisc: usbmisc@53ff4600 {
325 #index-cells = <1>;
326 compatible = "fsl,imx35-usbmisc";
327 clocks = <&clks 9>, <&clks 73>, <&clks 28>;
328 clock-names = "ipg", "ahb", "per";
329 reg = <0x53ff4600 0x00f>;
330 };
331 };
332
333 emi@80000000 { /* External Memory Interface */
334 compatible = "fsl,emi", "simple-bus";
335 #address-cells = <1>;
336 #size-cells = <1>;
337 reg = <0x80000000 0x40000000>;
338 ranges;
339
340 nfc: nand@bb000000 {
341 #address-cells = <1>;
342 #size-cells = <1>;
343 compatible = "fsl,imx35-nand", "fsl,imx25-nand";
344 reg = <0xbb000000 0x2000>;
345 clocks = <&clks 29>;
346 clock-names = "";
347 interrupts = <33>;
348 status = "disabled";
349 };
350
351 weim: weim@b8002000 {
352 #address-cells = <2>;
353 #size-cells = <1>;
354 clocks = <&clks 0>;
355 compatible = "fsl,imx35-weim", "fsl,imx27-weim";
356 reg = <0xb8002000 0x1000>;
357 ranges = <
358 0 0 0xa0000000 0x8000000
359 1 0 0xa8000000 0x8000000
360 2 0 0xb0000000 0x2000000
361 3 0 0xb2000000 0x2000000
362 4 0 0xb4000000 0x2000000
363 5 0 0xb6000000 0x2000000
364 >;
365 status = "disabled";
366 };
367 };
368 };
Denis Carikliff348252014-03-13 10:18:44 +0100369
370 usbphy {
371 compatible = "simple-bus";
372 #address-cells = <1>;
373 #size-cells = <0>;
374
375 usbphy0: usb-phy@0 {
376 reg = <0>;
377 compatible = "usb-nop-xceiv";
378 };
379
380 usbphy1: usb-phy@1 {
381 reg = <1>;
382 compatible = "usb-nop-xceiv";
383 };
384 };
Steffen Trumtrara4f3ac42013-12-18 15:10:26 +0100385};