Shawn Guo | d2daa2f | 2014-05-13 21:43:36 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014 Freescale Semiconductor, Inc. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
| 7 | */ |
| 8 | |
| 9 | /dts-v1/; |
| 10 | |
Anson Huang | 4014a4f | 2014-06-20 13:17:29 +0800 | [diff] [blame] | 11 | #include <dt-bindings/gpio/gpio.h> |
| 12 | #include <dt-bindings/input/input.h> |
Shawn Guo | d2daa2f | 2014-05-13 21:43:36 +0800 | [diff] [blame] | 13 | #include "imx6sx.dtsi" |
| 14 | |
| 15 | / { |
| 16 | model = "Freescale i.MX6 SoloX SDB Board"; |
| 17 | compatible = "fsl,imx6sx-sdb", "fsl,imx6sx"; |
| 18 | |
| 19 | chosen { |
| 20 | stdout-path = &uart1; |
| 21 | }; |
| 22 | |
| 23 | memory { |
| 24 | reg = <0x80000000 0x40000000>; |
| 25 | }; |
| 26 | |
Fabio Estevam | 31ffdbc8 | 2014-09-02 15:00:44 -0300 | [diff] [blame] | 27 | backlight { |
| 28 | compatible = "pwm-backlight"; |
| 29 | pwms = <&pwm3 0 5000000>; |
| 30 | brightness-levels = <0 4 8 16 32 64 128 255>; |
| 31 | default-brightness-level = <6>; |
| 32 | }; |
| 33 | |
Anson Huang | 4014a4f | 2014-06-20 13:17:29 +0800 | [diff] [blame] | 34 | gpio-keys { |
| 35 | compatible = "gpio-keys"; |
| 36 | pinctrl-names = "default"; |
| 37 | pinctrl-0 = <&pinctrl_gpio_keys>; |
| 38 | |
| 39 | volume-up { |
| 40 | label = "Volume Up"; |
| 41 | gpios = <&gpio1 18 GPIO_ACTIVE_LOW>; |
| 42 | linux,code = <KEY_VOLUMEUP>; |
| 43 | }; |
| 44 | |
| 45 | volume-down { |
| 46 | label = "Volume Down"; |
| 47 | gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; |
| 48 | linux,code = <KEY_VOLUMEDOWN>; |
| 49 | }; |
| 50 | }; |
| 51 | |
Shawn Guo | d2daa2f | 2014-05-13 21:43:36 +0800 | [diff] [blame] | 52 | regulators { |
| 53 | compatible = "simple-bus"; |
| 54 | #address-cells = <1>; |
| 55 | #size-cells = <0>; |
| 56 | |
| 57 | vcc_sd3: regulator@0 { |
| 58 | compatible = "regulator-fixed"; |
| 59 | reg = <0>; |
| 60 | pinctrl-names = "default"; |
| 61 | pinctrl-0 = <&pinctrl_vcc_sd3>; |
| 62 | regulator-name = "VCC_SD3"; |
| 63 | regulator-min-microvolt = <3000000>; |
| 64 | regulator-max-microvolt = <3000000>; |
| 65 | gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>; |
| 66 | enable-active-high; |
| 67 | }; |
Fabio Estevam | 960feff | 2014-06-23 11:21:05 -0300 | [diff] [blame] | 68 | |
| 69 | reg_usb_otg1_vbus: regulator@1 { |
| 70 | compatible = "regulator-fixed"; |
| 71 | reg = <1>; |
| 72 | pinctrl-names = "default"; |
| 73 | pinctrl-0 = <&pinctrl_usb_otg1>; |
| 74 | regulator-name = "usb_otg1_vbus"; |
| 75 | regulator-min-microvolt = <5000000>; |
| 76 | regulator-max-microvolt = <5000000>; |
| 77 | gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>; |
| 78 | enable-active-high; |
| 79 | }; |
| 80 | |
| 81 | reg_usb_otg2_vbus: regulator@2 { |
| 82 | compatible = "regulator-fixed"; |
| 83 | reg = <2>; |
| 84 | pinctrl-names = "default"; |
| 85 | pinctrl-0 = <&pinctrl_usb_otg2>; |
| 86 | regulator-name = "usb_otg2_vbus"; |
| 87 | regulator-min-microvolt = <5000000>; |
| 88 | regulator-max-microvolt = <5000000>; |
| 89 | gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>; |
| 90 | enable-active-high; |
| 91 | }; |
Fabio Estevam | 9c86ae8 | 2014-07-02 11:58:52 -0300 | [diff] [blame] | 92 | |
| 93 | reg_psu_5v: regulator@3 { |
| 94 | compatible = "regulator-fixed"; |
| 95 | reg = <3>; |
| 96 | regulator-name = "PSU-5V0"; |
| 97 | regulator-min-microvolt = <5000000>; |
| 98 | regulator-max-microvolt = <5000000>; |
| 99 | }; |
Fabio Estevam | 31ffdbc8 | 2014-09-02 15:00:44 -0300 | [diff] [blame] | 100 | |
| 101 | reg_lcd_3v3: regulator@4 { |
| 102 | compatible = "regulator-fixed"; |
| 103 | reg = <4>; |
| 104 | regulator-name = "lcd-3v3"; |
| 105 | gpio = <&gpio3 27 0>; |
| 106 | enable-active-high; |
| 107 | }; |
Fugang Duan | 9863aba | 2014-09-28 16:40:36 +0800 | [diff] [blame] | 108 | |
| 109 | reg_peri_3v3: regulator@5 { |
| 110 | compatible = "regulator-fixed"; |
| 111 | reg = <5>; |
| 112 | pinctrl-names = "default"; |
| 113 | pinctrl-0 = <&pinctrl_peri_3v3>; |
| 114 | regulator-name = "peri_3v3"; |
| 115 | regulator-min-microvolt = <3300000>; |
| 116 | regulator-max-microvolt = <3300000>; |
| 117 | gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; |
| 118 | enable-active-high; |
| 119 | regulator-always-on; |
| 120 | }; |
| 121 | |
| 122 | reg_enet_3v3: regulator@6 { |
| 123 | compatible = "regulator-fixed"; |
| 124 | reg = <6>; |
| 125 | pinctrl-names = "default"; |
| 126 | pinctrl-0 = <&pinctrl_enet_3v3>; |
| 127 | regulator-name = "enet_3v3"; |
| 128 | regulator-min-microvolt = <3300000>; |
| 129 | regulator-max-microvolt = <3300000>; |
| 130 | gpios = <&gpio2 6 GPIO_ACTIVE_LOW>; |
| 131 | }; |
Shawn Guo | d2daa2f | 2014-05-13 21:43:36 +0800 | [diff] [blame] | 132 | }; |
Fabio Estevam | 9c86ae8 | 2014-07-02 11:58:52 -0300 | [diff] [blame] | 133 | |
| 134 | sound { |
| 135 | compatible = "fsl,imx6sx-sdb-wm8962", "fsl,imx-audio-wm8962"; |
| 136 | model = "wm8962-audio"; |
| 137 | ssi-controller = <&ssi2>; |
| 138 | audio-codec = <&codec>; |
| 139 | audio-routing = |
| 140 | "Headphone Jack", "HPOUTL", |
| 141 | "Headphone Jack", "HPOUTR", |
| 142 | "Ext Spk", "SPKOUTL", |
| 143 | "Ext Spk", "SPKOUTR", |
| 144 | "AMIC", "MICBIAS", |
| 145 | "IN3R", "AMIC"; |
| 146 | mux-int-port = <2>; |
| 147 | mux-ext-port = <6>; |
| 148 | }; |
| 149 | }; |
| 150 | |
| 151 | &audmux { |
| 152 | pinctrl-names = "default"; |
| 153 | pinctrl-0 = <&pinctrl_audmux>; |
| 154 | status = "okay"; |
Shawn Guo | d2daa2f | 2014-05-13 21:43:36 +0800 | [diff] [blame] | 155 | }; |
| 156 | |
| 157 | &fec1 { |
| 158 | pinctrl-names = "default"; |
| 159 | pinctrl-0 = <&pinctrl_enet1>; |
Fugang Duan | 9863aba | 2014-09-28 16:40:36 +0800 | [diff] [blame] | 160 | phy-supply = <®_enet_3v3>; |
| 161 | phy-mode = "rgmii"; |
| 162 | status = "okay"; |
| 163 | }; |
| 164 | |
| 165 | &fec2 { |
| 166 | pinctrl-names = "default"; |
| 167 | pinctrl-0 = <&pinctrl_enet2>; |
Shawn Guo | d2daa2f | 2014-05-13 21:43:36 +0800 | [diff] [blame] | 168 | phy-mode = "rgmii"; |
| 169 | status = "okay"; |
| 170 | }; |
| 171 | |
Fabio Estevam | b3d8e11 | 2014-06-23 11:21:06 -0300 | [diff] [blame] | 172 | &i2c1 { |
| 173 | clock-frequency = <100000>; |
| 174 | pinctrl-names = "default"; |
| 175 | pinctrl-0 = <&pinctrl_i2c1>; |
| 176 | status = "okay"; |
| 177 | |
| 178 | pmic: pfuze100@08 { |
| 179 | compatible = "fsl,pfuze100"; |
| 180 | reg = <0x08>; |
| 181 | |
| 182 | regulators { |
| 183 | sw1a_reg: sw1ab { |
| 184 | regulator-min-microvolt = <300000>; |
| 185 | regulator-max-microvolt = <1875000>; |
| 186 | regulator-boot-on; |
| 187 | regulator-always-on; |
| 188 | regulator-ramp-delay = <6250>; |
| 189 | }; |
| 190 | |
| 191 | sw1c_reg: sw1c { |
| 192 | regulator-min-microvolt = <300000>; |
| 193 | regulator-max-microvolt = <1875000>; |
| 194 | regulator-boot-on; |
| 195 | regulator-always-on; |
| 196 | regulator-ramp-delay = <6250>; |
| 197 | }; |
| 198 | |
| 199 | sw2_reg: sw2 { |
| 200 | regulator-min-microvolt = <800000>; |
| 201 | regulator-max-microvolt = <3300000>; |
| 202 | regulator-boot-on; |
| 203 | regulator-always-on; |
| 204 | }; |
| 205 | |
| 206 | sw3a_reg: sw3a { |
| 207 | regulator-min-microvolt = <400000>; |
| 208 | regulator-max-microvolt = <1975000>; |
| 209 | regulator-boot-on; |
| 210 | regulator-always-on; |
| 211 | }; |
| 212 | |
| 213 | sw3b_reg: sw3b { |
| 214 | regulator-min-microvolt = <400000>; |
| 215 | regulator-max-microvolt = <1975000>; |
| 216 | regulator-boot-on; |
| 217 | regulator-always-on; |
| 218 | }; |
| 219 | |
| 220 | sw4_reg: sw4 { |
| 221 | regulator-min-microvolt = <800000>; |
| 222 | regulator-max-microvolt = <3300000>; |
| 223 | }; |
| 224 | |
| 225 | swbst_reg: swbst { |
| 226 | regulator-min-microvolt = <5000000>; |
| 227 | regulator-max-microvolt = <5150000>; |
| 228 | }; |
| 229 | |
| 230 | snvs_reg: vsnvs { |
| 231 | regulator-min-microvolt = <1000000>; |
| 232 | regulator-max-microvolt = <3000000>; |
| 233 | regulator-boot-on; |
| 234 | regulator-always-on; |
| 235 | }; |
| 236 | |
| 237 | vref_reg: vrefddr { |
| 238 | regulator-boot-on; |
| 239 | regulator-always-on; |
| 240 | }; |
| 241 | |
| 242 | vgen1_reg: vgen1 { |
| 243 | regulator-min-microvolt = <800000>; |
| 244 | regulator-max-microvolt = <1550000>; |
| 245 | regulator-always-on; |
| 246 | }; |
| 247 | |
| 248 | vgen2_reg: vgen2 { |
| 249 | regulator-min-microvolt = <800000>; |
| 250 | regulator-max-microvolt = <1550000>; |
| 251 | }; |
| 252 | |
| 253 | vgen3_reg: vgen3 { |
| 254 | regulator-min-microvolt = <1800000>; |
| 255 | regulator-max-microvolt = <3300000>; |
| 256 | regulator-always-on; |
| 257 | }; |
| 258 | |
| 259 | vgen4_reg: vgen4 { |
| 260 | regulator-min-microvolt = <1800000>; |
| 261 | regulator-max-microvolt = <3300000>; |
| 262 | regulator-always-on; |
| 263 | }; |
| 264 | |
| 265 | vgen5_reg: vgen5 { |
| 266 | regulator-min-microvolt = <1800000>; |
| 267 | regulator-max-microvolt = <3300000>; |
| 268 | regulator-always-on; |
| 269 | }; |
| 270 | |
| 271 | vgen6_reg: vgen6 { |
| 272 | regulator-min-microvolt = <1800000>; |
| 273 | regulator-max-microvolt = <3300000>; |
| 274 | regulator-always-on; |
| 275 | }; |
| 276 | }; |
| 277 | }; |
| 278 | }; |
| 279 | |
Fabio Estevam | 9c86ae8 | 2014-07-02 11:58:52 -0300 | [diff] [blame] | 280 | &i2c4 { |
| 281 | clock-frequency = <100000>; |
| 282 | pinctrl-names = "default"; |
| 283 | pinctrl-0 = <&pinctrl_i2c4>; |
| 284 | status = "okay"; |
| 285 | |
| 286 | codec: wm8962@1a { |
| 287 | compatible = "wlf,wm8962"; |
| 288 | reg = <0x1a>; |
| 289 | clocks = <&clks IMX6SX_CLK_AUDIO>; |
| 290 | DCVDD-supply = <&vgen4_reg>; |
| 291 | DBVDD-supply = <&vgen4_reg>; |
| 292 | AVDD-supply = <&vgen4_reg>; |
| 293 | CPVDD-supply = <&vgen4_reg>; |
| 294 | MICVDD-supply = <&vgen3_reg>; |
| 295 | PLLVDD-supply = <&vgen4_reg>; |
| 296 | SPKVDD1-supply = <®_psu_5v>; |
| 297 | SPKVDD2-supply = <®_psu_5v>; |
| 298 | }; |
| 299 | }; |
| 300 | |
Fabio Estevam | 31ffdbc8 | 2014-09-02 15:00:44 -0300 | [diff] [blame] | 301 | &lcdif1 { |
| 302 | pinctrl-names = "default"; |
| 303 | pinctrl-0 = <&pinctrl_lcd>; |
| 304 | lcd-supply = <®_lcd_3v3>; |
| 305 | display = <&display0>; |
| 306 | status = "okay"; |
| 307 | |
| 308 | display0: display0 { |
| 309 | bits-per-pixel = <16>; |
| 310 | bus-width = <24>; |
| 311 | |
| 312 | display-timings { |
| 313 | native-mode = <&timing0>; |
| 314 | timing0: timing0 { |
| 315 | clock-frequency = <33500000>; |
| 316 | hactive = <800>; |
| 317 | vactive = <480>; |
| 318 | hback-porch = <89>; |
| 319 | hfront-porch = <164>; |
| 320 | vback-porch = <23>; |
| 321 | vfront-porch = <10>; |
| 322 | hsync-len = <10>; |
| 323 | vsync-len = <10>; |
| 324 | hsync-active = <0>; |
| 325 | vsync-active = <0>; |
| 326 | de-active = <1>; |
| 327 | pixelclk-active = <0>; |
| 328 | }; |
| 329 | }; |
| 330 | }; |
| 331 | }; |
| 332 | |
| 333 | &pwm3 { |
| 334 | pinctrl-names = "default"; |
| 335 | pinctrl-0 = <&pinctrl_pwm3>; |
| 336 | status = "okay"; |
| 337 | }; |
| 338 | |
Fabio Estevam | 9c86ae8 | 2014-07-02 11:58:52 -0300 | [diff] [blame] | 339 | &ssi2 { |
| 340 | status = "okay"; |
| 341 | }; |
| 342 | |
Shawn Guo | d2daa2f | 2014-05-13 21:43:36 +0800 | [diff] [blame] | 343 | &uart1 { |
| 344 | pinctrl-names = "default"; |
| 345 | pinctrl-0 = <&pinctrl_uart1>; |
| 346 | status = "okay"; |
| 347 | }; |
| 348 | |
| 349 | &uart5 { /* for bluetooth */ |
| 350 | pinctrl-names = "default"; |
| 351 | pinctrl-0 = <&pinctrl_uart5>; |
| 352 | fsl,uart-has-rtscts; |
| 353 | status = "okay"; |
| 354 | }; |
| 355 | |
Fabio Estevam | 960feff | 2014-06-23 11:21:05 -0300 | [diff] [blame] | 356 | &usbotg1 { |
| 357 | vbus-supply = <®_usb_otg1_vbus>; |
| 358 | pinctrl-names = "default"; |
| 359 | pinctrl-0 = <&pinctrl_usb_otg1_id>; |
| 360 | status = "okay"; |
| 361 | }; |
| 362 | |
| 363 | &usbotg2 { |
| 364 | vbus-supply = <®_usb_otg2_vbus>; |
| 365 | dr_mode = "host"; |
| 366 | status = "okay"; |
| 367 | }; |
| 368 | |
Shawn Guo | d2daa2f | 2014-05-13 21:43:36 +0800 | [diff] [blame] | 369 | &usdhc2 { |
| 370 | pinctrl-names = "default"; |
| 371 | pinctrl-0 = <&pinctrl_usdhc2>; |
| 372 | non-removable; |
| 373 | no-1-8-v; |
| 374 | keep-power-in-suspend; |
| 375 | enable-sdio-wakeup; |
| 376 | status = "okay"; |
| 377 | }; |
| 378 | |
| 379 | &usdhc3 { |
| 380 | pinctrl-names = "default", "state_100mhz", "state_200mhz"; |
| 381 | pinctrl-0 = <&pinctrl_usdhc3>; |
| 382 | pinctrl-1 = <&pinctrl_usdhc3_100mhz>; |
| 383 | pinctrl-2 = <&pinctrl_usdhc3_200mhz>; |
| 384 | bus-width = <8>; |
| 385 | cd-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>; |
| 386 | wp-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>; |
| 387 | keep-power-in-suspend; |
| 388 | enable-sdio-wakeup; |
| 389 | vmmc-supply = <&vcc_sd3>; |
| 390 | status = "okay"; |
| 391 | }; |
| 392 | |
| 393 | &usdhc4 { |
| 394 | pinctrl-names = "default"; |
| 395 | pinctrl-0 = <&pinctrl_usdhc4>; |
| 396 | cd-gpios = <&gpio6 21 GPIO_ACTIVE_HIGH>; |
| 397 | wp-gpios = <&gpio6 20 GPIO_ACTIVE_HIGH>; |
| 398 | status = "okay"; |
| 399 | }; |
| 400 | |
| 401 | &iomuxc { |
| 402 | imx6x-sdb { |
Fabio Estevam | 9c86ae8 | 2014-07-02 11:58:52 -0300 | [diff] [blame] | 403 | pinctrl_audmux: audmuxgrp { |
| 404 | fsl,pins = < |
| 405 | MX6SX_PAD_CSI_DATA00__AUDMUX_AUD6_TXC 0x130b0 |
| 406 | MX6SX_PAD_CSI_DATA01__AUDMUX_AUD6_TXFS 0x130b0 |
| 407 | MX6SX_PAD_CSI_HSYNC__AUDMUX_AUD6_TXD 0x120b0 |
| 408 | MX6SX_PAD_CSI_VSYNC__AUDMUX_AUD6_RXD 0x130b0 |
| 409 | MX6SX_PAD_CSI_PIXCLK__AUDMUX_MCLK 0x130b0 |
| 410 | >; |
| 411 | }; |
| 412 | |
Shawn Guo | d2daa2f | 2014-05-13 21:43:36 +0800 | [diff] [blame] | 413 | pinctrl_enet1: enet1grp { |
| 414 | fsl,pins = < |
| 415 | MX6SX_PAD_ENET1_MDIO__ENET1_MDIO 0xa0b1 |
| 416 | MX6SX_PAD_ENET1_MDC__ENET1_MDC 0xa0b1 |
| 417 | MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC 0xa0b1 |
| 418 | MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0 0xa0b1 |
| 419 | MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1 0xa0b1 |
| 420 | MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2 0xa0b1 |
| 421 | MX6SX_PAD_RGMII1_TD3__ENET1_TX_DATA_3 0xa0b1 |
| 422 | MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN 0xa0b1 |
| 423 | MX6SX_PAD_RGMII1_RXC__ENET1_RX_CLK 0x3081 |
| 424 | MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0 0x3081 |
| 425 | MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1 0x3081 |
| 426 | MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2 0x3081 |
| 427 | MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3 0x3081 |
| 428 | MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x3081 |
Fugang Duan | 9863aba | 2014-09-28 16:40:36 +0800 | [diff] [blame] | 429 | MX6SX_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M 0x91 |
| 430 | >; |
| 431 | }; |
| 432 | |
| 433 | pinctrl_enet_3v3: enet3v3grp { |
| 434 | fsl,pins = < |
| 435 | MX6SX_PAD_ENET2_COL__GPIO2_IO_6 0x80000000 |
| 436 | >; |
| 437 | }; |
| 438 | |
| 439 | pinctrl_enet2: enet2grp { |
| 440 | fsl,pins = < |
| 441 | MX6SX_PAD_RGMII2_TXC__ENET2_RGMII_TXC 0xa0b9 |
| 442 | MX6SX_PAD_RGMII2_TD0__ENET2_TX_DATA_0 0xa0b1 |
| 443 | MX6SX_PAD_RGMII2_TD1__ENET2_TX_DATA_1 0xa0b1 |
| 444 | MX6SX_PAD_RGMII2_TD2__ENET2_TX_DATA_2 0xa0b1 |
| 445 | MX6SX_PAD_RGMII2_TD3__ENET2_TX_DATA_3 0xa0b1 |
| 446 | MX6SX_PAD_RGMII2_TX_CTL__ENET2_TX_EN 0xa0b1 |
| 447 | MX6SX_PAD_RGMII2_RXC__ENET2_RX_CLK 0x3081 |
| 448 | MX6SX_PAD_RGMII2_RD0__ENET2_RX_DATA_0 0x3081 |
| 449 | MX6SX_PAD_RGMII2_RD1__ENET2_RX_DATA_1 0x3081 |
| 450 | MX6SX_PAD_RGMII2_RD2__ENET2_RX_DATA_2 0x3081 |
| 451 | MX6SX_PAD_RGMII2_RD3__ENET2_RX_DATA_3 0x3081 |
| 452 | MX6SX_PAD_RGMII2_RX_CTL__ENET2_RX_EN 0x3081 |
Shawn Guo | d2daa2f | 2014-05-13 21:43:36 +0800 | [diff] [blame] | 453 | >; |
| 454 | }; |
| 455 | |
Anson Huang | 4014a4f | 2014-06-20 13:17:29 +0800 | [diff] [blame] | 456 | pinctrl_gpio_keys: gpio_keysgrp { |
| 457 | fsl,pins = < |
| 458 | MX6SX_PAD_CSI_DATA04__GPIO1_IO_18 0x17059 |
| 459 | MX6SX_PAD_CSI_DATA05__GPIO1_IO_19 0x17059 |
| 460 | >; |
| 461 | }; |
| 462 | |
Fabio Estevam | b3d8e11 | 2014-06-23 11:21:06 -0300 | [diff] [blame] | 463 | pinctrl_i2c1: i2c1grp { |
| 464 | fsl,pins = < |
| 465 | MX6SX_PAD_GPIO1_IO01__I2C1_SDA 0x4001b8b1 |
| 466 | MX6SX_PAD_GPIO1_IO00__I2C1_SCL 0x4001b8b1 |
| 467 | >; |
| 468 | }; |
| 469 | |
Fabio Estevam | 9c86ae8 | 2014-07-02 11:58:52 -0300 | [diff] [blame] | 470 | pinctrl_i2c4: i2c4grp { |
| 471 | fsl,pins = < |
| 472 | MX6SX_PAD_CSI_DATA07__I2C4_SDA 0x4001b8b1 |
| 473 | MX6SX_PAD_CSI_DATA06__I2C4_SCL 0x4001b8b1 |
| 474 | >; |
| 475 | }; |
| 476 | |
Fabio Estevam | 31ffdbc8 | 2014-09-02 15:00:44 -0300 | [diff] [blame] | 477 | pinctrl_lcd: lcdgrp { |
| 478 | fsl,pins = < |
| 479 | MX6SX_PAD_LCD1_DATA00__LCDIF1_DATA_0 0x4001b0b0 |
| 480 | MX6SX_PAD_LCD1_DATA01__LCDIF1_DATA_1 0x4001b0b0 |
| 481 | MX6SX_PAD_LCD1_DATA02__LCDIF1_DATA_2 0x4001b0b0 |
| 482 | MX6SX_PAD_LCD1_DATA03__LCDIF1_DATA_3 0x4001b0b0 |
| 483 | MX6SX_PAD_LCD1_DATA04__LCDIF1_DATA_4 0x4001b0b0 |
| 484 | MX6SX_PAD_LCD1_DATA05__LCDIF1_DATA_5 0x4001b0b0 |
| 485 | MX6SX_PAD_LCD1_DATA06__LCDIF1_DATA_6 0x4001b0b0 |
| 486 | MX6SX_PAD_LCD1_DATA07__LCDIF1_DATA_7 0x4001b0b0 |
| 487 | MX6SX_PAD_LCD1_DATA08__LCDIF1_DATA_8 0x4001b0b0 |
| 488 | MX6SX_PAD_LCD1_DATA09__LCDIF1_DATA_9 0x4001b0b0 |
| 489 | MX6SX_PAD_LCD1_DATA10__LCDIF1_DATA_10 0x4001b0b0 |
| 490 | MX6SX_PAD_LCD1_DATA11__LCDIF1_DATA_11 0x4001b0b0 |
| 491 | MX6SX_PAD_LCD1_DATA12__LCDIF1_DATA_12 0x4001b0b0 |
| 492 | MX6SX_PAD_LCD1_DATA13__LCDIF1_DATA_13 0x4001b0b0 |
| 493 | MX6SX_PAD_LCD1_DATA14__LCDIF1_DATA_14 0x4001b0b0 |
| 494 | MX6SX_PAD_LCD1_DATA15__LCDIF1_DATA_15 0x4001b0b0 |
| 495 | MX6SX_PAD_LCD1_DATA16__LCDIF1_DATA_16 0x4001b0b0 |
| 496 | MX6SX_PAD_LCD1_DATA17__LCDIF1_DATA_17 0x4001b0b0 |
| 497 | MX6SX_PAD_LCD1_DATA18__LCDIF1_DATA_18 0x4001b0b0 |
| 498 | MX6SX_PAD_LCD1_DATA19__LCDIF1_DATA_19 0x4001b0b0 |
| 499 | MX6SX_PAD_LCD1_DATA20__LCDIF1_DATA_20 0x4001b0b0 |
| 500 | MX6SX_PAD_LCD1_DATA21__LCDIF1_DATA_21 0x4001b0b0 |
| 501 | MX6SX_PAD_LCD1_DATA22__LCDIF1_DATA_22 0x4001b0b0 |
| 502 | MX6SX_PAD_LCD1_DATA23__LCDIF1_DATA_23 0x4001b0b0 |
| 503 | MX6SX_PAD_LCD1_CLK__LCDIF1_CLK 0x4001b0b0 |
| 504 | MX6SX_PAD_LCD1_ENABLE__LCDIF1_ENABLE 0x4001b0b0 |
| 505 | MX6SX_PAD_LCD1_VSYNC__LCDIF1_VSYNC 0x4001b0b0 |
| 506 | MX6SX_PAD_LCD1_HSYNC__LCDIF1_HSYNC 0x4001b0b0 |
| 507 | MX6SX_PAD_LCD1_RESET__GPIO3_IO_27 0x4001b0b0 |
| 508 | >; |
| 509 | }; |
| 510 | |
Fugang Duan | 9863aba | 2014-09-28 16:40:36 +0800 | [diff] [blame] | 511 | pinctrl_peri_3v3: peri3v3grp { |
| 512 | fsl,pins = < |
| 513 | MX6SX_PAD_QSPI1A_DATA0__GPIO4_IO_16 0x80000000 |
| 514 | >; |
| 515 | }; |
| 516 | |
Fabio Estevam | 31ffdbc8 | 2014-09-02 15:00:44 -0300 | [diff] [blame] | 517 | pinctrl_pwm3: pwm3grp-1 { |
| 518 | fsl,pins = < |
| 519 | MX6SX_PAD_SD1_DATA2__PWM3_OUT 0x110b0 |
| 520 | >; |
| 521 | }; |
| 522 | |
Shawn Guo | d2daa2f | 2014-05-13 21:43:36 +0800 | [diff] [blame] | 523 | pinctrl_vcc_sd3: vccsd3grp { |
| 524 | fsl,pins = < |
| 525 | MX6SX_PAD_KEY_COL1__GPIO2_IO_11 0x17059 |
| 526 | >; |
| 527 | }; |
| 528 | |
| 529 | pinctrl_uart1: uart1grp { |
| 530 | fsl,pins = < |
| 531 | MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1 |
| 532 | MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1 |
| 533 | >; |
| 534 | }; |
| 535 | |
| 536 | pinctrl_uart5: uart5grp { |
| 537 | fsl,pins = < |
| 538 | MX6SX_PAD_KEY_ROW3__UART5_RX 0x1b0b1 |
| 539 | MX6SX_PAD_KEY_COL3__UART5_TX 0x1b0b1 |
| 540 | MX6SX_PAD_KEY_ROW2__UART5_CTS_B 0x1b0b1 |
| 541 | MX6SX_PAD_KEY_COL2__UART5_RTS_B 0x1b0b1 |
| 542 | >; |
| 543 | }; |
| 544 | |
Fabio Estevam | 960feff | 2014-06-23 11:21:05 -0300 | [diff] [blame] | 545 | pinctrl_usb_otg1: usbotg1grp { |
| 546 | fsl,pins = < |
| 547 | MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9 0x10b0 |
| 548 | >; |
| 549 | }; |
| 550 | |
| 551 | pinctrl_usb_otg1_id: usbotg1idgrp { |
| 552 | fsl,pins = < |
| 553 | MX6SX_PAD_GPIO1_IO10__ANATOP_OTG1_ID 0x17059 |
| 554 | >; |
| 555 | }; |
| 556 | |
| 557 | pinctrl_usb_otg2: usbot2ggrp { |
| 558 | fsl,pins = < |
| 559 | MX6SX_PAD_GPIO1_IO12__GPIO1_IO_12 0x10b0 |
| 560 | >; |
| 561 | }; |
| 562 | |
Shawn Guo | d2daa2f | 2014-05-13 21:43:36 +0800 | [diff] [blame] | 563 | pinctrl_usdhc2: usdhc2grp { |
| 564 | fsl,pins = < |
| 565 | MX6SX_PAD_SD2_CMD__USDHC2_CMD 0x17059 |
| 566 | MX6SX_PAD_SD2_CLK__USDHC2_CLK 0x10059 |
| 567 | MX6SX_PAD_SD2_DATA0__USDHC2_DATA0 0x17059 |
| 568 | MX6SX_PAD_SD2_DATA1__USDHC2_DATA1 0x17059 |
| 569 | MX6SX_PAD_SD2_DATA2__USDHC2_DATA2 0x17059 |
| 570 | MX6SX_PAD_SD2_DATA3__USDHC2_DATA3 0x17059 |
| 571 | >; |
| 572 | }; |
| 573 | |
| 574 | pinctrl_usdhc3: usdhc3grp { |
| 575 | fsl,pins = < |
| 576 | MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x17059 |
| 577 | MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x10059 |
| 578 | MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x17059 |
| 579 | MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x17059 |
| 580 | MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x17059 |
| 581 | MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x17059 |
| 582 | MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x17059 |
| 583 | MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x17059 |
| 584 | MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x17059 |
| 585 | MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x17059 |
| 586 | MX6SX_PAD_KEY_COL0__GPIO2_IO_10 0x17059 /* CD */ |
| 587 | MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x17059 /* WP */ |
| 588 | >; |
| 589 | }; |
| 590 | |
| 591 | pinctrl_usdhc3_100mhz: usdhc3grp-100mhz { |
| 592 | fsl,pins = < |
| 593 | MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170b9 |
| 594 | MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100b9 |
| 595 | MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170b9 |
| 596 | MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170b9 |
| 597 | MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170b9 |
| 598 | MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170b9 |
| 599 | MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170b9 |
| 600 | MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170b9 |
| 601 | MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170b9 |
| 602 | MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170b9 |
| 603 | >; |
| 604 | }; |
| 605 | |
| 606 | pinctrl_usdhc3_200mhz: usdhc3grp-200mhz { |
| 607 | fsl,pins = < |
| 608 | MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170f9 |
| 609 | MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100f9 |
| 610 | MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170f9 |
| 611 | MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170f9 |
| 612 | MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170f9 |
| 613 | MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170f9 |
| 614 | MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170f9 |
| 615 | MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170f9 |
| 616 | MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170f9 |
| 617 | MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170f9 |
| 618 | >; |
| 619 | }; |
| 620 | |
| 621 | pinctrl_usdhc4: usdhc4grp { |
| 622 | fsl,pins = < |
| 623 | MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x17059 |
| 624 | MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x10059 |
| 625 | MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x17059 |
| 626 | MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x17059 |
| 627 | MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x17059 |
| 628 | MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x17059 |
| 629 | MX6SX_PAD_SD4_DATA7__GPIO6_IO_21 0x17059 /* CD */ |
| 630 | MX6SX_PAD_SD4_DATA6__GPIO6_IO_20 0x17059 /* WP */ |
| 631 | >; |
| 632 | }; |
| 633 | }; |
| 634 | }; |