Dinh Nguyen | 475dc86 | 2014-09-04 16:45:56 -0500 | [diff] [blame] | 1 | /* |
Dinh Nguyen | 88c8e4c | 2015-03-09 22:57:04 -0500 | [diff] [blame] | 2 | * Copyright (C) 2015 Altera Corporation <www.altera.com> |
Dinh Nguyen | 475dc86 | 2014-09-04 16:45:56 -0500 | [diff] [blame] | 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License as published by |
| 6 | * the Free Software Foundation; either version 2 of the License, or |
| 7 | * (at your option) any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License |
| 15 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 16 | */ |
Dinh Nguyen | 475dc86 | 2014-09-04 16:45:56 -0500 | [diff] [blame] | 17 | #include "socfpga_arria10.dtsi" |
| 18 | |
| 19 | / { |
| 20 | model = "Altera SOCFPGA Arria 10"; |
| 21 | compatible = "altr,socfpga-arria10", "altr,socfpga"; |
| 22 | |
| 23 | chosen { |
Dinh Nguyen | efc1985 | 2015-07-14 17:19:02 -0500 | [diff] [blame^] | 24 | bootargs = "earlyprintk"; |
| 25 | stdout-path = "serial1:115200n8"; |
Dinh Nguyen | 475dc86 | 2014-09-04 16:45:56 -0500 | [diff] [blame] | 26 | }; |
| 27 | |
| 28 | memory { |
| 29 | name = "memory"; |
| 30 | device_type = "memory"; |
| 31 | reg = <0x0 0x40000000>; /* 1GB */ |
| 32 | }; |
| 33 | |
| 34 | soc { |
| 35 | clkmgr@ffd04000 { |
| 36 | clocks { |
| 37 | osc1 { |
| 38 | clock-frequency = <25000000>; |
| 39 | }; |
| 40 | }; |
| 41 | }; |
Dinh Nguyen | 475dc86 | 2014-09-04 16:45:56 -0500 | [diff] [blame] | 42 | }; |
| 43 | }; |
Dinh Nguyen | 74568da | 2015-04-02 13:26:35 -0500 | [diff] [blame] | 44 | |
Dinh Nguyen | 112cadf | 2015-06-02 21:31:00 -0500 | [diff] [blame] | 45 | &gmac0 { |
| 46 | phy-mode = "rgmii"; |
| 47 | phy-addr = <0xffffffff>; /* probe for phy addr */ |
| 48 | |
| 49 | /* |
| 50 | * These skews assume the user's FPGA design is adding 600ps of delay |
| 51 | * for TX_CLK on Arria 10. |
| 52 | * |
| 53 | * All skews are offset since hardware skew values for the ksz9031 |
| 54 | * range from a negative skew to a positive skew. |
| 55 | * See the micrel-ksz90x1.txt Documentation file for details. |
| 56 | */ |
| 57 | txd0-skew-ps = <0>; /* -420ps */ |
| 58 | txd1-skew-ps = <0>; /* -420ps */ |
| 59 | txd2-skew-ps = <0>; /* -420ps */ |
| 60 | txd3-skew-ps = <0>; /* -420ps */ |
| 61 | rxd0-skew-ps = <420>; /* 0ps */ |
| 62 | rxd1-skew-ps = <420>; /* 0ps */ |
| 63 | rxd2-skew-ps = <420>; /* 0ps */ |
| 64 | rxd3-skew-ps = <420>; /* 0ps */ |
| 65 | txen-skew-ps = <0>; /* -420ps */ |
| 66 | txc-skew-ps = <1860>; /* 960ps */ |
| 67 | rxdv-skew-ps = <420>; /* 0ps */ |
| 68 | rxc-skew-ps = <1680>; /* 780ps */ |
| 69 | max-frame-size = <3800>; |
| 70 | status = "okay"; |
| 71 | }; |
| 72 | |
Dinh Nguyen | 74568da | 2015-04-02 13:26:35 -0500 | [diff] [blame] | 73 | &uart1 { |
| 74 | status = "okay"; |
| 75 | }; |