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David Lopoaa69a802008-11-17 14:14:51 -08001/*
2 * ci13xxx_udc.c - MIPS USB IP core family device controller
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13/*
14 * Description: MIPS USB IP core family device controller
15 * Currently it only supports IP part number CI13412
16 *
17 * This driver is composed of several blocks:
18 * - HW: hardware interface
19 * - DBG: debug facilities (optional)
20 * - UTIL: utilities
21 * - ISR: interrupts handling
22 * - ENDPT: endpoint operations (Gadget API)
23 * - GADGET: gadget operations (Gadget API)
24 * - BUS: bus glue code, bus abstraction layer
David Lopoaa69a802008-11-17 14:14:51 -080025 *
26 * Compile Options
27 * - CONFIG_USB_GADGET_DEBUG_FILES: enable debug facilities
28 * - STALL_IN: non-empty bulk-in pipes cannot be halted
29 * if defined mass storage compliance succeeds but with warnings
30 * => case 4: Hi > Dn
31 * => case 5: Hi > Di
32 * => case 8: Hi <> Do
33 * if undefined usbtest 13 fails
34 * - TRACE: enable function tracing (depends on DEBUG)
35 *
36 * Main Features
37 * - Chapter 9 & Mass Storage Compliance with Gadget File Storage
38 * - Chapter 9 Compliance with Gadget Zero (STALL_IN undefined)
39 * - Normal & LPM support
40 *
41 * USBTEST Report
42 * - OK: 0-12, 13 (STALL_IN defined) & 14
43 * - Not Supported: 15 & 16 (ISO)
44 *
45 * TODO List
46 * - OTG
47 * - Isochronous & Interrupt Traffic
48 * - Handle requests which spawns into several TDs
49 * - GET_STATUS(device) - always reports 0
50 * - Gadget API (majority of optional features)
51 * - Suspend & Remote Wakeup
52 */
Matthias Kaehlcke36825a22009-04-15 22:28:36 +020053#include <linux/delay.h>
David Lopoaa69a802008-11-17 14:14:51 -080054#include <linux/device.h>
55#include <linux/dmapool.h>
56#include <linux/dma-mapping.h>
57#include <linux/init.h>
58#include <linux/interrupt.h>
David Lopoaa69a802008-11-17 14:14:51 -080059#include <linux/io.h>
60#include <linux/irq.h>
61#include <linux/kernel.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090062#include <linux/slab.h>
David Lopoaa69a802008-11-17 14:14:51 -080063#include <linux/usb/ch9.h>
64#include <linux/usb/gadget.h>
Pavankumar Kondetif01ef572010-12-07 17:54:02 +053065#include <linux/usb/otg.h>
David Lopoaa69a802008-11-17 14:14:51 -080066
67#include "ci13xxx_udc.h"
68
69
70/******************************************************************************
71 * DEFINE
72 *****************************************************************************/
73/* ctrl register bank access */
74static DEFINE_SPINLOCK(udc_lock);
75
David Lopoaa69a802008-11-17 14:14:51 -080076/* control endpoint description */
77static const struct usb_endpoint_descriptor
78ctrl_endpt_desc = {
79 .bLength = USB_DT_ENDPOINT_SIZE,
80 .bDescriptorType = USB_DT_ENDPOINT,
81
82 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
83 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
84};
85
86/* UDC descriptor */
87static struct ci13xxx *_udc;
88
89/* Interrupt statistics */
90#define ISR_MASK 0x1F
91static struct {
92 u32 test;
93 u32 ui;
94 u32 uei;
95 u32 pci;
96 u32 uri;
97 u32 sli;
98 u32 none;
99 struct {
100 u32 cnt;
101 u32 buf[ISR_MASK+1];
102 u32 idx;
103 } hndl;
104} isr_statistics;
105
106/**
107 * ffs_nr: find first (least significant) bit set
108 * @x: the word to search
109 *
110 * This function returns bit number (instead of position)
111 */
112static int ffs_nr(u32 x)
113{
114 int n = ffs(x);
115
116 return n ? n-1 : 32;
117}
118
119/******************************************************************************
120 * HW block
121 *****************************************************************************/
122/* register bank descriptor */
123static struct {
124 unsigned lpm; /* is LPM? */
125 void __iomem *abs; /* bus map offset */
126 void __iomem *cap; /* bus map offset + CAP offset + CAP data */
127 size_t size; /* bank size */
128} hw_bank;
129
Pavankumar Kondetif01ef572010-12-07 17:54:02 +0530130/* MSM specific */
131#define ABS_AHBBURST (0x0090UL)
132#define ABS_AHBMODE (0x0098UL)
David Lopoaa69a802008-11-17 14:14:51 -0800133/* UDC register map */
134#define ABS_CAPLENGTH (0x100UL)
135#define ABS_HCCPARAMS (0x108UL)
136#define ABS_DCCPARAMS (0x124UL)
137#define ABS_TESTMODE (hw_bank.lpm ? 0x0FCUL : 0x138UL)
138/* offset to CAPLENTGH (addr + data) */
139#define CAP_USBCMD (0x000UL)
140#define CAP_USBSTS (0x004UL)
141#define CAP_USBINTR (0x008UL)
142#define CAP_DEVICEADDR (0x014UL)
143#define CAP_ENDPTLISTADDR (0x018UL)
144#define CAP_PORTSC (0x044UL)
David Lopof23e6492009-04-16 14:35:24 -0700145#define CAP_DEVLC (0x084UL)
David Lopoaa69a802008-11-17 14:14:51 -0800146#define CAP_USBMODE (hw_bank.lpm ? 0x0C8UL : 0x068UL)
147#define CAP_ENDPTSETUPSTAT (hw_bank.lpm ? 0x0D8UL : 0x06CUL)
148#define CAP_ENDPTPRIME (hw_bank.lpm ? 0x0DCUL : 0x070UL)
149#define CAP_ENDPTFLUSH (hw_bank.lpm ? 0x0E0UL : 0x074UL)
150#define CAP_ENDPTSTAT (hw_bank.lpm ? 0x0E4UL : 0x078UL)
151#define CAP_ENDPTCOMPLETE (hw_bank.lpm ? 0x0E8UL : 0x07CUL)
152#define CAP_ENDPTCTRL (hw_bank.lpm ? 0x0ECUL : 0x080UL)
153#define CAP_LAST (hw_bank.lpm ? 0x12CUL : 0x0C0UL)
154
155/* maximum number of enpoints: valid only after hw_device_reset() */
156static unsigned hw_ep_max;
157
158/**
159 * hw_ep_bit: calculates the bit number
160 * @num: endpoint number
161 * @dir: endpoint direction
162 *
163 * This function returns bit number
164 */
165static inline int hw_ep_bit(int num, int dir)
166{
167 return num + (dir ? 16 : 0);
168}
169
170/**
171 * hw_aread: reads from register bitfield
172 * @addr: address relative to bus map
173 * @mask: bitfield mask
174 *
175 * This function returns register bitfield data
176 */
177static u32 hw_aread(u32 addr, u32 mask)
178{
179 return ioread32(addr + hw_bank.abs) & mask;
180}
181
182/**
183 * hw_awrite: writes to register bitfield
184 * @addr: address relative to bus map
185 * @mask: bitfield mask
186 * @data: new data
187 */
188static void hw_awrite(u32 addr, u32 mask, u32 data)
189{
190 iowrite32(hw_aread(addr, ~mask) | (data & mask),
191 addr + hw_bank.abs);
192}
193
194/**
195 * hw_cread: reads from register bitfield
196 * @addr: address relative to CAP offset plus content
197 * @mask: bitfield mask
198 *
199 * This function returns register bitfield data
200 */
201static u32 hw_cread(u32 addr, u32 mask)
202{
203 return ioread32(addr + hw_bank.cap) & mask;
204}
205
206/**
207 * hw_cwrite: writes to register bitfield
208 * @addr: address relative to CAP offset plus content
209 * @mask: bitfield mask
210 * @data: new data
211 */
212static void hw_cwrite(u32 addr, u32 mask, u32 data)
213{
214 iowrite32(hw_cread(addr, ~mask) | (data & mask),
215 addr + hw_bank.cap);
216}
217
218/**
219 * hw_ctest_and_clear: tests & clears register bitfield
220 * @addr: address relative to CAP offset plus content
221 * @mask: bitfield mask
222 *
223 * This function returns register bitfield data
224 */
225static u32 hw_ctest_and_clear(u32 addr, u32 mask)
226{
227 u32 reg = hw_cread(addr, mask);
228
229 iowrite32(reg, addr + hw_bank.cap);
230 return reg;
231}
232
233/**
234 * hw_ctest_and_write: tests & writes register bitfield
235 * @addr: address relative to CAP offset plus content
236 * @mask: bitfield mask
237 * @data: new data
238 *
239 * This function returns register bitfield data
240 */
241static u32 hw_ctest_and_write(u32 addr, u32 mask, u32 data)
242{
243 u32 reg = hw_cread(addr, ~0);
244
245 iowrite32((reg & ~mask) | (data & mask), addr + hw_bank.cap);
246 return (reg & mask) >> ffs_nr(mask);
247}
248
Pavankumar Kondetif01ef572010-12-07 17:54:02 +0530249static int hw_device_init(void __iomem *base)
David Lopoaa69a802008-11-17 14:14:51 -0800250{
251 u32 reg;
252
253 /* bank is a module variable */
254 hw_bank.abs = base;
255
256 hw_bank.cap = hw_bank.abs;
257 hw_bank.cap += ABS_CAPLENGTH;
258 hw_bank.cap += ioread8(hw_bank.cap);
259
260 reg = hw_aread(ABS_HCCPARAMS, HCCPARAMS_LEN) >> ffs_nr(HCCPARAMS_LEN);
261 hw_bank.lpm = reg;
262 hw_bank.size = hw_bank.cap - hw_bank.abs;
263 hw_bank.size += CAP_LAST;
264 hw_bank.size /= sizeof(u32);
265
David Lopoaa69a802008-11-17 14:14:51 -0800266 reg = hw_aread(ABS_DCCPARAMS, DCCPARAMS_DEN) >> ffs_nr(DCCPARAMS_DEN);
267 if (reg == 0 || reg > ENDPT_MAX)
268 return -ENODEV;
269
270 hw_ep_max = reg; /* cache hw ENDPT_MAX */
271
272 /* setup lock mode ? */
273
274 /* ENDPTSETUPSTAT is '0' by default */
275
276 /* HCSPARAMS.bf.ppc SHOULD BE zero for device */
277
278 return 0;
279}
Pavankumar Kondetif01ef572010-12-07 17:54:02 +0530280/**
281 * hw_device_reset: resets chip (execute without interruption)
282 * @base: register base address
283 *
284 * This function returns an error code
285 */
286static int hw_device_reset(struct ci13xxx *udc)
287{
288 /* should flush & stop before reset */
289 hw_cwrite(CAP_ENDPTFLUSH, ~0, ~0);
290 hw_cwrite(CAP_USBCMD, USBCMD_RS, 0);
291
292 hw_cwrite(CAP_USBCMD, USBCMD_RST, USBCMD_RST);
293 while (hw_cread(CAP_USBCMD, USBCMD_RST))
294 udelay(10); /* not RTOS friendly */
295
296
297 if (udc->udc_driver->notify_event)
298 udc->udc_driver->notify_event(udc,
299 CI13XXX_CONTROLLER_RESET_EVENT);
300
301 if (udc->udc_driver->flags && CI13XXX_DISABLE_STREAMING)
302 hw_cwrite(CAP_USBMODE, USBMODE_SDIS, USBMODE_SDIS);
303
304 /* USBMODE should be configured step by step */
305 hw_cwrite(CAP_USBMODE, USBMODE_CM, USBMODE_CM_IDLE);
306 hw_cwrite(CAP_USBMODE, USBMODE_CM, USBMODE_CM_DEVICE);
307 hw_cwrite(CAP_USBMODE, USBMODE_SLOM, USBMODE_SLOM); /* HW >= 2.3 */
308
309 if (hw_cread(CAP_USBMODE, USBMODE_CM) != USBMODE_CM_DEVICE) {
310 pr_err("cannot enter in device mode");
311 pr_err("lpm = %i", hw_bank.lpm);
312 return -ENODEV;
313 }
314
315 return 0;
316}
David Lopoaa69a802008-11-17 14:14:51 -0800317
318/**
319 * hw_device_state: enables/disables interrupts & starts/stops device (execute
320 * without interruption)
321 * @dma: 0 => disable, !0 => enable and set dma engine
322 *
323 * This function returns an error code
324 */
325static int hw_device_state(u32 dma)
326{
327 if (dma) {
328 hw_cwrite(CAP_ENDPTLISTADDR, ~0, dma);
329 /* interrupt, error, port change, reset, sleep/suspend */
330 hw_cwrite(CAP_USBINTR, ~0,
331 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
332 hw_cwrite(CAP_USBCMD, USBCMD_RS, USBCMD_RS);
333 } else {
334 hw_cwrite(CAP_USBCMD, USBCMD_RS, 0);
335 hw_cwrite(CAP_USBINTR, ~0, 0);
336 }
337 return 0;
338}
339
340/**
341 * hw_ep_flush: flush endpoint fifo (execute without interruption)
342 * @num: endpoint number
343 * @dir: endpoint direction
344 *
345 * This function returns an error code
346 */
347static int hw_ep_flush(int num, int dir)
348{
349 int n = hw_ep_bit(num, dir);
350
351 do {
352 /* flush any pending transfer */
353 hw_cwrite(CAP_ENDPTFLUSH, BIT(n), BIT(n));
354 while (hw_cread(CAP_ENDPTFLUSH, BIT(n)))
355 cpu_relax();
356 } while (hw_cread(CAP_ENDPTSTAT, BIT(n)));
357
358 return 0;
359}
360
361/**
362 * hw_ep_disable: disables endpoint (execute without interruption)
363 * @num: endpoint number
364 * @dir: endpoint direction
365 *
366 * This function returns an error code
367 */
368static int hw_ep_disable(int num, int dir)
369{
370 hw_ep_flush(num, dir);
371 hw_cwrite(CAP_ENDPTCTRL + num * sizeof(u32),
372 dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
373 return 0;
374}
375
376/**
377 * hw_ep_enable: enables endpoint (execute without interruption)
378 * @num: endpoint number
379 * @dir: endpoint direction
380 * @type: endpoint type
381 *
382 * This function returns an error code
383 */
384static int hw_ep_enable(int num, int dir, int type)
385{
386 u32 mask, data;
387
388 if (dir) {
389 mask = ENDPTCTRL_TXT; /* type */
390 data = type << ffs_nr(mask);
391
392 mask |= ENDPTCTRL_TXS; /* unstall */
393 mask |= ENDPTCTRL_TXR; /* reset data toggle */
394 data |= ENDPTCTRL_TXR;
395 mask |= ENDPTCTRL_TXE; /* enable */
396 data |= ENDPTCTRL_TXE;
397 } else {
398 mask = ENDPTCTRL_RXT; /* type */
399 data = type << ffs_nr(mask);
400
401 mask |= ENDPTCTRL_RXS; /* unstall */
402 mask |= ENDPTCTRL_RXR; /* reset data toggle */
403 data |= ENDPTCTRL_RXR;
404 mask |= ENDPTCTRL_RXE; /* enable */
405 data |= ENDPTCTRL_RXE;
406 }
407 hw_cwrite(CAP_ENDPTCTRL + num * sizeof(u32), mask, data);
408 return 0;
409}
410
411/**
412 * hw_ep_get_halt: return endpoint halt status
413 * @num: endpoint number
414 * @dir: endpoint direction
415 *
416 * This function returns 1 if endpoint halted
417 */
418static int hw_ep_get_halt(int num, int dir)
419{
420 u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
421
422 return hw_cread(CAP_ENDPTCTRL + num * sizeof(u32), mask) ? 1 : 0;
423}
424
425/**
426 * hw_ep_is_primed: test if endpoint is primed (execute without interruption)
427 * @num: endpoint number
428 * @dir: endpoint direction
429 *
430 * This function returns true if endpoint primed
431 */
432static int hw_ep_is_primed(int num, int dir)
433{
434 u32 reg = hw_cread(CAP_ENDPTPRIME, ~0) | hw_cread(CAP_ENDPTSTAT, ~0);
435
436 return test_bit(hw_ep_bit(num, dir), (void *)&reg);
437}
438
439/**
440 * hw_test_and_clear_setup_status: test & clear setup status (execute without
441 * interruption)
442 * @n: bit number (endpoint)
443 *
444 * This function returns setup status
445 */
446static int hw_test_and_clear_setup_status(int n)
447{
448 return hw_ctest_and_clear(CAP_ENDPTSETUPSTAT, BIT(n));
449}
450
451/**
452 * hw_ep_prime: primes endpoint (execute without interruption)
453 * @num: endpoint number
454 * @dir: endpoint direction
455 * @is_ctrl: true if control endpoint
456 *
457 * This function returns an error code
458 */
459static int hw_ep_prime(int num, int dir, int is_ctrl)
460{
461 int n = hw_ep_bit(num, dir);
462
463 /* the caller should flush first */
464 if (hw_ep_is_primed(num, dir))
465 return -EBUSY;
466
467 if (is_ctrl && dir == RX && hw_cread(CAP_ENDPTSETUPSTAT, BIT(num)))
468 return -EAGAIN;
469
470 hw_cwrite(CAP_ENDPTPRIME, BIT(n), BIT(n));
471
472 while (hw_cread(CAP_ENDPTPRIME, BIT(n)))
473 cpu_relax();
474 if (is_ctrl && dir == RX && hw_cread(CAP_ENDPTSETUPSTAT, BIT(num)))
475 return -EAGAIN;
476
477 /* status shoult be tested according with manual but it doesn't work */
478 return 0;
479}
480
481/**
482 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
483 * without interruption)
484 * @num: endpoint number
485 * @dir: endpoint direction
486 * @value: true => stall, false => unstall
487 *
488 * This function returns an error code
489 */
490static int hw_ep_set_halt(int num, int dir, int value)
491{
492 if (value != 0 && value != 1)
493 return -EINVAL;
494
495 do {
496 u32 addr = CAP_ENDPTCTRL + num * sizeof(u32);
497 u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
498 u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
499
500 /* data toggle - reserved for EP0 but it's in ESS */
501 hw_cwrite(addr, mask_xs|mask_xr, value ? mask_xs : mask_xr);
502
503 } while (value != hw_ep_get_halt(num, dir));
504
505 return 0;
506}
507
508/**
509 * hw_intr_clear: disables interrupt & clears interrupt status (execute without
510 * interruption)
511 * @n: interrupt bit
512 *
513 * This function returns an error code
514 */
515static int hw_intr_clear(int n)
516{
517 if (n >= REG_BITS)
518 return -EINVAL;
519
520 hw_cwrite(CAP_USBINTR, BIT(n), 0);
521 hw_cwrite(CAP_USBSTS, BIT(n), BIT(n));
522 return 0;
523}
524
525/**
526 * hw_intr_force: enables interrupt & forces interrupt status (execute without
527 * interruption)
528 * @n: interrupt bit
529 *
530 * This function returns an error code
531 */
532static int hw_intr_force(int n)
533{
534 if (n >= REG_BITS)
535 return -EINVAL;
536
537 hw_awrite(ABS_TESTMODE, TESTMODE_FORCE, TESTMODE_FORCE);
538 hw_cwrite(CAP_USBINTR, BIT(n), BIT(n));
539 hw_cwrite(CAP_USBSTS, BIT(n), BIT(n));
540 hw_awrite(ABS_TESTMODE, TESTMODE_FORCE, 0);
541 return 0;
542}
543
544/**
545 * hw_is_port_high_speed: test if port is high speed
546 *
547 * This function returns true if high speed port
548 */
549static int hw_port_is_high_speed(void)
550{
551 return hw_bank.lpm ? hw_cread(CAP_DEVLC, DEVLC_PSPD) :
552 hw_cread(CAP_PORTSC, PORTSC_HSP);
553}
554
555/**
556 * hw_port_test_get: reads port test mode value
557 *
558 * This function returns port test mode value
559 */
560static u8 hw_port_test_get(void)
561{
562 return hw_cread(CAP_PORTSC, PORTSC_PTC) >> ffs_nr(PORTSC_PTC);
563}
564
565/**
566 * hw_port_test_set: writes port test mode (execute without interruption)
567 * @mode: new value
568 *
569 * This function returns an error code
570 */
571static int hw_port_test_set(u8 mode)
572{
573 const u8 TEST_MODE_MAX = 7;
574
575 if (mode > TEST_MODE_MAX)
576 return -EINVAL;
577
578 hw_cwrite(CAP_PORTSC, PORTSC_PTC, mode << ffs_nr(PORTSC_PTC));
579 return 0;
580}
581
582/**
583 * hw_read_intr_enable: returns interrupt enable register
584 *
585 * This function returns register data
586 */
587static u32 hw_read_intr_enable(void)
588{
589 return hw_cread(CAP_USBINTR, ~0);
590}
591
592/**
593 * hw_read_intr_status: returns interrupt status register
594 *
595 * This function returns register data
596 */
597static u32 hw_read_intr_status(void)
598{
599 return hw_cread(CAP_USBSTS, ~0);
600}
601
602/**
603 * hw_register_read: reads all device registers (execute without interruption)
604 * @buf: destination buffer
605 * @size: buffer size
606 *
607 * This function returns number of registers read
608 */
609static size_t hw_register_read(u32 *buf, size_t size)
610{
611 unsigned i;
612
613 if (size > hw_bank.size)
614 size = hw_bank.size;
615
616 for (i = 0; i < size; i++)
617 buf[i] = hw_aread(i * sizeof(u32), ~0);
618
619 return size;
620}
621
622/**
623 * hw_register_write: writes to register
624 * @addr: register address
625 * @data: register value
626 *
627 * This function returns an error code
628 */
629static int hw_register_write(u16 addr, u32 data)
630{
631 /* align */
632 addr /= sizeof(u32);
633
634 if (addr >= hw_bank.size)
635 return -EINVAL;
636
637 /* align */
638 addr *= sizeof(u32);
639
640 hw_awrite(addr, ~0, data);
641 return 0;
642}
643
644/**
645 * hw_test_and_clear_complete: test & clear complete status (execute without
646 * interruption)
647 * @n: bit number (endpoint)
648 *
649 * This function returns complete status
650 */
651static int hw_test_and_clear_complete(int n)
652{
653 return hw_ctest_and_clear(CAP_ENDPTCOMPLETE, BIT(n));
654}
655
656/**
657 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
658 * without interruption)
659 *
660 * This function returns active interrutps
661 */
662static u32 hw_test_and_clear_intr_active(void)
663{
664 u32 reg = hw_read_intr_status() & hw_read_intr_enable();
665
666 hw_cwrite(CAP_USBSTS, ~0, reg);
667 return reg;
668}
669
670/**
671 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
672 * interruption)
673 *
674 * This function returns guard value
675 */
676static int hw_test_and_clear_setup_guard(void)
677{
678 return hw_ctest_and_write(CAP_USBCMD, USBCMD_SUTW, 0);
679}
680
681/**
682 * hw_test_and_set_setup_guard: test & set setup guard (execute without
683 * interruption)
684 *
685 * This function returns guard value
686 */
687static int hw_test_and_set_setup_guard(void)
688{
689 return hw_ctest_and_write(CAP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
690}
691
692/**
693 * hw_usb_set_address: configures USB address (execute without interruption)
694 * @value: new USB address
695 *
696 * This function returns an error code
697 */
698static int hw_usb_set_address(u8 value)
699{
700 /* advance */
701 hw_cwrite(CAP_DEVICEADDR, DEVICEADDR_USBADR | DEVICEADDR_USBADRA,
702 value << ffs_nr(DEVICEADDR_USBADR) | DEVICEADDR_USBADRA);
703 return 0;
704}
705
706/**
707 * hw_usb_reset: restart device after a bus reset (execute without
708 * interruption)
709 *
710 * This function returns an error code
711 */
712static int hw_usb_reset(void)
713{
714 hw_usb_set_address(0);
715
716 /* ESS flushes only at end?!? */
717 hw_cwrite(CAP_ENDPTFLUSH, ~0, ~0); /* flush all EPs */
718
719 /* clear setup token semaphores */
720 hw_cwrite(CAP_ENDPTSETUPSTAT, 0, 0); /* writes its content */
721
722 /* clear complete status */
723 hw_cwrite(CAP_ENDPTCOMPLETE, 0, 0); /* writes its content */
724
725 /* wait until all bits cleared */
726 while (hw_cread(CAP_ENDPTPRIME, ~0))
727 udelay(10); /* not RTOS friendly */
728
729 /* reset all endpoints ? */
730
731 /* reset internal status and wait for further instructions
732 no need to verify the port reset status (ESS does it) */
733
734 return 0;
735}
736
737/******************************************************************************
738 * DBG block
739 *****************************************************************************/
740/**
741 * show_device: prints information about device capabilities and status
742 *
743 * Check "device.h" for details
744 */
745static ssize_t show_device(struct device *dev, struct device_attribute *attr,
746 char *buf)
747{
748 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
749 struct usb_gadget *gadget = &udc->gadget;
750 int n = 0;
751
752 dbg_trace("[%s] %p\n", __func__, buf);
753 if (attr == NULL || buf == NULL) {
754 dev_err(dev, "[%s] EINVAL\n", __func__);
755 return 0;
756 }
757
758 n += scnprintf(buf + n, PAGE_SIZE - n, "speed = %d\n",
759 gadget->speed);
760 n += scnprintf(buf + n, PAGE_SIZE - n, "is_dualspeed = %d\n",
761 gadget->is_dualspeed);
762 n += scnprintf(buf + n, PAGE_SIZE - n, "is_otg = %d\n",
763 gadget->is_otg);
764 n += scnprintf(buf + n, PAGE_SIZE - n, "is_a_peripheral = %d\n",
765 gadget->is_a_peripheral);
766 n += scnprintf(buf + n, PAGE_SIZE - n, "b_hnp_enable = %d\n",
767 gadget->b_hnp_enable);
768 n += scnprintf(buf + n, PAGE_SIZE - n, "a_hnp_support = %d\n",
769 gadget->a_hnp_support);
770 n += scnprintf(buf + n, PAGE_SIZE - n, "a_alt_hnp_support = %d\n",
771 gadget->a_alt_hnp_support);
772 n += scnprintf(buf + n, PAGE_SIZE - n, "name = %s\n",
773 (gadget->name ? gadget->name : ""));
774
775 return n;
776}
777static DEVICE_ATTR(device, S_IRUSR, show_device, NULL);
778
779/**
780 * show_driver: prints information about attached gadget (if any)
781 *
782 * Check "device.h" for details
783 */
784static ssize_t show_driver(struct device *dev, struct device_attribute *attr,
785 char *buf)
786{
787 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
788 struct usb_gadget_driver *driver = udc->driver;
789 int n = 0;
790
791 dbg_trace("[%s] %p\n", __func__, buf);
792 if (attr == NULL || buf == NULL) {
793 dev_err(dev, "[%s] EINVAL\n", __func__);
794 return 0;
795 }
796
797 if (driver == NULL)
798 return scnprintf(buf, PAGE_SIZE,
799 "There is no gadget attached!\n");
800
801 n += scnprintf(buf + n, PAGE_SIZE - n, "function = %s\n",
802 (driver->function ? driver->function : ""));
803 n += scnprintf(buf + n, PAGE_SIZE - n, "max speed = %d\n",
804 driver->speed);
805
806 return n;
807}
808static DEVICE_ATTR(driver, S_IRUSR, show_driver, NULL);
809
810/* Maximum event message length */
811#define DBG_DATA_MSG 64UL
812
813/* Maximum event messages */
814#define DBG_DATA_MAX 128UL
815
816/* Event buffer descriptor */
817static struct {
818 char (buf[DBG_DATA_MAX])[DBG_DATA_MSG]; /* buffer */
819 unsigned idx; /* index */
820 unsigned tty; /* print to console? */
821 rwlock_t lck; /* lock */
822} dbg_data = {
823 .idx = 0,
824 .tty = 0,
825 .lck = __RW_LOCK_UNLOCKED(lck)
826};
827
828/**
829 * dbg_dec: decrements debug event index
830 * @idx: buffer index
831 */
832static void dbg_dec(unsigned *idx)
833{
834 *idx = (*idx - 1) & (DBG_DATA_MAX-1);
835}
836
837/**
838 * dbg_inc: increments debug event index
839 * @idx: buffer index
840 */
841static void dbg_inc(unsigned *idx)
842{
843 *idx = (*idx + 1) & (DBG_DATA_MAX-1);
844}
845
846/**
847 * dbg_print: prints the common part of the event
848 * @addr: endpoint address
849 * @name: event name
850 * @status: status
851 * @extra: extra information
852 */
853static void dbg_print(u8 addr, const char *name, int status, const char *extra)
854{
855 struct timeval tval;
856 unsigned int stamp;
857 unsigned long flags;
858
859 write_lock_irqsave(&dbg_data.lck, flags);
860
861 do_gettimeofday(&tval);
862 stamp = tval.tv_sec & 0xFFFF; /* 2^32 = 4294967296. Limit to 4096s */
863 stamp = stamp * 1000000 + tval.tv_usec;
864
865 scnprintf(dbg_data.buf[dbg_data.idx], DBG_DATA_MSG,
866 "%04X\t» %02X %-7.7s %4i «\t%s\n",
867 stamp, addr, name, status, extra);
868
869 dbg_inc(&dbg_data.idx);
870
871 write_unlock_irqrestore(&dbg_data.lck, flags);
872
873 if (dbg_data.tty != 0)
874 pr_notice("%04X\t» %02X %-7.7s %4i «\t%s\n",
875 stamp, addr, name, status, extra);
876}
877
878/**
879 * dbg_done: prints a DONE event
880 * @addr: endpoint address
881 * @td: transfer descriptor
882 * @status: status
883 */
884static void dbg_done(u8 addr, const u32 token, int status)
885{
886 char msg[DBG_DATA_MSG];
887
888 scnprintf(msg, sizeof(msg), "%d %02X",
889 (int)(token & TD_TOTAL_BYTES) >> ffs_nr(TD_TOTAL_BYTES),
890 (int)(token & TD_STATUS) >> ffs_nr(TD_STATUS));
891 dbg_print(addr, "DONE", status, msg);
892}
893
894/**
895 * dbg_event: prints a generic event
896 * @addr: endpoint address
897 * @name: event name
898 * @status: status
899 */
900static void dbg_event(u8 addr, const char *name, int status)
901{
902 if (name != NULL)
903 dbg_print(addr, name, status, "");
904}
905
906/*
907 * dbg_queue: prints a QUEUE event
908 * @addr: endpoint address
909 * @req: USB request
910 * @status: status
911 */
912static void dbg_queue(u8 addr, const struct usb_request *req, int status)
913{
914 char msg[DBG_DATA_MSG];
915
916 if (req != NULL) {
917 scnprintf(msg, sizeof(msg),
918 "%d %d", !req->no_interrupt, req->length);
919 dbg_print(addr, "QUEUE", status, msg);
920 }
921}
922
923/**
924 * dbg_setup: prints a SETUP event
925 * @addr: endpoint address
926 * @req: setup request
927 */
928static void dbg_setup(u8 addr, const struct usb_ctrlrequest *req)
929{
930 char msg[DBG_DATA_MSG];
931
932 if (req != NULL) {
933 scnprintf(msg, sizeof(msg),
934 "%02X %02X %04X %04X %d", req->bRequestType,
935 req->bRequest, le16_to_cpu(req->wValue),
936 le16_to_cpu(req->wIndex), le16_to_cpu(req->wLength));
937 dbg_print(addr, "SETUP", 0, msg);
938 }
939}
940
941/**
942 * show_events: displays the event buffer
943 *
944 * Check "device.h" for details
945 */
946static ssize_t show_events(struct device *dev, struct device_attribute *attr,
947 char *buf)
948{
949 unsigned long flags;
950 unsigned i, j, n = 0;
951
952 dbg_trace("[%s] %p\n", __func__, buf);
953 if (attr == NULL || buf == NULL) {
954 dev_err(dev, "[%s] EINVAL\n", __func__);
955 return 0;
956 }
957
958 read_lock_irqsave(&dbg_data.lck, flags);
959
960 i = dbg_data.idx;
961 for (dbg_dec(&i); i != dbg_data.idx; dbg_dec(&i)) {
962 n += strlen(dbg_data.buf[i]);
963 if (n >= PAGE_SIZE) {
964 n -= strlen(dbg_data.buf[i]);
965 break;
966 }
967 }
968 for (j = 0, dbg_inc(&i); j < n; dbg_inc(&i))
969 j += scnprintf(buf + j, PAGE_SIZE - j,
970 "%s", dbg_data.buf[i]);
971
972 read_unlock_irqrestore(&dbg_data.lck, flags);
973
974 return n;
975}
976
977/**
978 * store_events: configure if events are going to be also printed to console
979 *
980 * Check "device.h" for details
981 */
982static ssize_t store_events(struct device *dev, struct device_attribute *attr,
983 const char *buf, size_t count)
984{
985 unsigned tty;
986
987 dbg_trace("[%s] %p, %d\n", __func__, buf, count);
988 if (attr == NULL || buf == NULL) {
989 dev_err(dev, "[%s] EINVAL\n", __func__);
990 goto done;
991 }
992
993 if (sscanf(buf, "%u", &tty) != 1 || tty > 1) {
994 dev_err(dev, "<1|0>: enable|disable console log\n");
995 goto done;
996 }
997
998 dbg_data.tty = tty;
999 dev_info(dev, "tty = %u", dbg_data.tty);
1000
1001 done:
1002 return count;
1003}
1004static DEVICE_ATTR(events, S_IRUSR | S_IWUSR, show_events, store_events);
1005
1006/**
1007 * show_inters: interrupt status, enable status and historic
1008 *
1009 * Check "device.h" for details
1010 */
1011static ssize_t show_inters(struct device *dev, struct device_attribute *attr,
1012 char *buf)
1013{
1014 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1015 unsigned long flags;
1016 u32 intr;
1017 unsigned i, j, n = 0;
1018
1019 dbg_trace("[%s] %p\n", __func__, buf);
1020 if (attr == NULL || buf == NULL) {
1021 dev_err(dev, "[%s] EINVAL\n", __func__);
1022 return 0;
1023 }
1024
1025 spin_lock_irqsave(udc->lock, flags);
1026
1027 n += scnprintf(buf + n, PAGE_SIZE - n,
1028 "status = %08x\n", hw_read_intr_status());
1029 n += scnprintf(buf + n, PAGE_SIZE - n,
1030 "enable = %08x\n", hw_read_intr_enable());
1031
1032 n += scnprintf(buf + n, PAGE_SIZE - n, "*test = %d\n",
1033 isr_statistics.test);
1034 n += scnprintf(buf + n, PAGE_SIZE - n, "» ui = %d\n",
1035 isr_statistics.ui);
1036 n += scnprintf(buf + n, PAGE_SIZE - n, "» uei = %d\n",
1037 isr_statistics.uei);
1038 n += scnprintf(buf + n, PAGE_SIZE - n, "» pci = %d\n",
1039 isr_statistics.pci);
1040 n += scnprintf(buf + n, PAGE_SIZE - n, "» uri = %d\n",
1041 isr_statistics.uri);
1042 n += scnprintf(buf + n, PAGE_SIZE - n, "» sli = %d\n",
1043 isr_statistics.sli);
1044 n += scnprintf(buf + n, PAGE_SIZE - n, "*none = %d\n",
1045 isr_statistics.none);
1046 n += scnprintf(buf + n, PAGE_SIZE - n, "*hndl = %d\n",
1047 isr_statistics.hndl.cnt);
1048
1049 for (i = isr_statistics.hndl.idx, j = 0; j <= ISR_MASK; j++, i++) {
1050 i &= ISR_MASK;
1051 intr = isr_statistics.hndl.buf[i];
1052
1053 if (USBi_UI & intr)
1054 n += scnprintf(buf + n, PAGE_SIZE - n, "ui ");
1055 intr &= ~USBi_UI;
1056 if (USBi_UEI & intr)
1057 n += scnprintf(buf + n, PAGE_SIZE - n, "uei ");
1058 intr &= ~USBi_UEI;
1059 if (USBi_PCI & intr)
1060 n += scnprintf(buf + n, PAGE_SIZE - n, "pci ");
1061 intr &= ~USBi_PCI;
1062 if (USBi_URI & intr)
1063 n += scnprintf(buf + n, PAGE_SIZE - n, "uri ");
1064 intr &= ~USBi_URI;
1065 if (USBi_SLI & intr)
1066 n += scnprintf(buf + n, PAGE_SIZE - n, "sli ");
1067 intr &= ~USBi_SLI;
1068 if (intr)
1069 n += scnprintf(buf + n, PAGE_SIZE - n, "??? ");
1070 if (isr_statistics.hndl.buf[i])
1071 n += scnprintf(buf + n, PAGE_SIZE - n, "\n");
1072 }
1073
1074 spin_unlock_irqrestore(udc->lock, flags);
1075
1076 return n;
1077}
1078
1079/**
1080 * store_inters: enable & force or disable an individual interrutps
1081 * (to be used for test purposes only)
1082 *
1083 * Check "device.h" for details
1084 */
1085static ssize_t store_inters(struct device *dev, struct device_attribute *attr,
1086 const char *buf, size_t count)
1087{
1088 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1089 unsigned long flags;
1090 unsigned en, bit;
1091
1092 dbg_trace("[%s] %p, %d\n", __func__, buf, count);
1093 if (attr == NULL || buf == NULL) {
1094 dev_err(dev, "[%s] EINVAL\n", __func__);
1095 goto done;
1096 }
1097
1098 if (sscanf(buf, "%u %u", &en, &bit) != 2 || en > 1) {
1099 dev_err(dev, "<1|0> <bit>: enable|disable interrupt");
1100 goto done;
1101 }
1102
1103 spin_lock_irqsave(udc->lock, flags);
1104 if (en) {
1105 if (hw_intr_force(bit))
1106 dev_err(dev, "invalid bit number\n");
1107 else
1108 isr_statistics.test++;
1109 } else {
1110 if (hw_intr_clear(bit))
1111 dev_err(dev, "invalid bit number\n");
1112 }
1113 spin_unlock_irqrestore(udc->lock, flags);
1114
1115 done:
1116 return count;
1117}
1118static DEVICE_ATTR(inters, S_IRUSR | S_IWUSR, show_inters, store_inters);
1119
1120/**
1121 * show_port_test: reads port test mode
1122 *
1123 * Check "device.h" for details
1124 */
1125static ssize_t show_port_test(struct device *dev,
1126 struct device_attribute *attr, char *buf)
1127{
1128 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1129 unsigned long flags;
1130 unsigned mode;
1131
1132 dbg_trace("[%s] %p\n", __func__, buf);
1133 if (attr == NULL || buf == NULL) {
1134 dev_err(dev, "[%s] EINVAL\n", __func__);
1135 return 0;
1136 }
1137
1138 spin_lock_irqsave(udc->lock, flags);
1139 mode = hw_port_test_get();
1140 spin_unlock_irqrestore(udc->lock, flags);
1141
1142 return scnprintf(buf, PAGE_SIZE, "mode = %u\n", mode);
1143}
1144
1145/**
1146 * store_port_test: writes port test mode
1147 *
1148 * Check "device.h" for details
1149 */
1150static ssize_t store_port_test(struct device *dev,
1151 struct device_attribute *attr,
1152 const char *buf, size_t count)
1153{
1154 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1155 unsigned long flags;
1156 unsigned mode;
1157
1158 dbg_trace("[%s] %p, %d\n", __func__, buf, count);
1159 if (attr == NULL || buf == NULL) {
1160 dev_err(dev, "[%s] EINVAL\n", __func__);
1161 goto done;
1162 }
1163
1164 if (sscanf(buf, "%u", &mode) != 1) {
1165 dev_err(dev, "<mode>: set port test mode");
1166 goto done;
1167 }
1168
1169 spin_lock_irqsave(udc->lock, flags);
1170 if (hw_port_test_set(mode))
1171 dev_err(dev, "invalid mode\n");
1172 spin_unlock_irqrestore(udc->lock, flags);
1173
1174 done:
1175 return count;
1176}
1177static DEVICE_ATTR(port_test, S_IRUSR | S_IWUSR,
1178 show_port_test, store_port_test);
1179
1180/**
1181 * show_qheads: DMA contents of all queue heads
1182 *
1183 * Check "device.h" for details
1184 */
1185static ssize_t show_qheads(struct device *dev, struct device_attribute *attr,
1186 char *buf)
1187{
1188 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1189 unsigned long flags;
1190 unsigned i, j, n = 0;
1191
1192 dbg_trace("[%s] %p\n", __func__, buf);
1193 if (attr == NULL || buf == NULL) {
1194 dev_err(dev, "[%s] EINVAL\n", __func__);
1195 return 0;
1196 }
1197
1198 spin_lock_irqsave(udc->lock, flags);
1199 for (i = 0; i < hw_ep_max; i++) {
1200 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
1201 n += scnprintf(buf + n, PAGE_SIZE - n,
1202 "EP=%02i: RX=%08X TX=%08X\n",
1203 i, (u32)mEp->qh[RX].dma, (u32)mEp->qh[TX].dma);
1204 for (j = 0; j < (sizeof(struct ci13xxx_qh)/sizeof(u32)); j++) {
1205 n += scnprintf(buf + n, PAGE_SIZE - n,
1206 " %04X: %08X %08X\n", j,
1207 *((u32 *)mEp->qh[RX].ptr + j),
1208 *((u32 *)mEp->qh[TX].ptr + j));
1209 }
1210 }
1211 spin_unlock_irqrestore(udc->lock, flags);
1212
1213 return n;
1214}
1215static DEVICE_ATTR(qheads, S_IRUSR, show_qheads, NULL);
1216
1217/**
1218 * show_registers: dumps all registers
1219 *
1220 * Check "device.h" for details
1221 */
1222static ssize_t show_registers(struct device *dev,
1223 struct device_attribute *attr, char *buf)
1224{
1225 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1226 unsigned long flags;
1227 u32 dump[512];
1228 unsigned i, k, n = 0;
1229
1230 dbg_trace("[%s] %p\n", __func__, buf);
1231 if (attr == NULL || buf == NULL) {
1232 dev_err(dev, "[%s] EINVAL\n", __func__);
1233 return 0;
1234 }
1235
1236 spin_lock_irqsave(udc->lock, flags);
1237 k = hw_register_read(dump, sizeof(dump)/sizeof(u32));
1238 spin_unlock_irqrestore(udc->lock, flags);
1239
1240 for (i = 0; i < k; i++) {
1241 n += scnprintf(buf + n, PAGE_SIZE - n,
1242 "reg[0x%04X] = 0x%08X\n",
1243 i * (unsigned)sizeof(u32), dump[i]);
1244 }
1245
1246 return n;
1247}
1248
1249/**
1250 * store_registers: writes value to register address
1251 *
1252 * Check "device.h" for details
1253 */
1254static ssize_t store_registers(struct device *dev,
1255 struct device_attribute *attr,
1256 const char *buf, size_t count)
1257{
1258 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1259 unsigned long addr, data, flags;
1260
1261 dbg_trace("[%s] %p, %d\n", __func__, buf, count);
1262 if (attr == NULL || buf == NULL) {
1263 dev_err(dev, "[%s] EINVAL\n", __func__);
1264 goto done;
1265 }
1266
1267 if (sscanf(buf, "%li %li", &addr, &data) != 2) {
1268 dev_err(dev, "<addr> <data>: write data to register address");
1269 goto done;
1270 }
1271
1272 spin_lock_irqsave(udc->lock, flags);
1273 if (hw_register_write(addr, data))
1274 dev_err(dev, "invalid address range\n");
1275 spin_unlock_irqrestore(udc->lock, flags);
1276
1277 done:
1278 return count;
1279}
1280static DEVICE_ATTR(registers, S_IRUSR | S_IWUSR,
1281 show_registers, store_registers);
1282
1283/**
1284 * show_requests: DMA contents of all requests currently queued (all endpts)
1285 *
1286 * Check "device.h" for details
1287 */
1288static ssize_t show_requests(struct device *dev, struct device_attribute *attr,
1289 char *buf)
1290{
1291 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1292 unsigned long flags;
1293 struct list_head *ptr = NULL;
1294 struct ci13xxx_req *req = NULL;
1295 unsigned i, j, k, n = 0, qSize = sizeof(struct ci13xxx_td)/sizeof(u32);
1296
1297 dbg_trace("[%s] %p\n", __func__, buf);
1298 if (attr == NULL || buf == NULL) {
1299 dev_err(dev, "[%s] EINVAL\n", __func__);
1300 return 0;
1301 }
1302
1303 spin_lock_irqsave(udc->lock, flags);
1304 for (i = 0; i < hw_ep_max; i++)
1305 for (k = RX; k <= TX; k++)
1306 list_for_each(ptr, &udc->ci13xxx_ep[i].qh[k].queue)
1307 {
1308 req = list_entry(ptr,
1309 struct ci13xxx_req, queue);
1310
1311 n += scnprintf(buf + n, PAGE_SIZE - n,
1312 "EP=%02i: TD=%08X %s\n",
1313 i, (u32)req->dma,
1314 ((k == RX) ? "RX" : "TX"));
1315
1316 for (j = 0; j < qSize; j++)
1317 n += scnprintf(buf + n, PAGE_SIZE - n,
1318 " %04X: %08X\n", j,
1319 *((u32 *)req->ptr + j));
1320 }
1321 spin_unlock_irqrestore(udc->lock, flags);
1322
1323 return n;
1324}
1325static DEVICE_ATTR(requests, S_IRUSR, show_requests, NULL);
1326
1327/**
1328 * dbg_create_files: initializes the attribute interface
1329 * @dev: device
1330 *
1331 * This function returns an error code
1332 */
1333__maybe_unused static int dbg_create_files(struct device *dev)
1334{
1335 int retval = 0;
1336
1337 if (dev == NULL)
1338 return -EINVAL;
1339 retval = device_create_file(dev, &dev_attr_device);
1340 if (retval)
1341 goto done;
1342 retval = device_create_file(dev, &dev_attr_driver);
1343 if (retval)
1344 goto rm_device;
1345 retval = device_create_file(dev, &dev_attr_events);
1346 if (retval)
1347 goto rm_driver;
1348 retval = device_create_file(dev, &dev_attr_inters);
1349 if (retval)
1350 goto rm_events;
1351 retval = device_create_file(dev, &dev_attr_port_test);
1352 if (retval)
1353 goto rm_inters;
1354 retval = device_create_file(dev, &dev_attr_qheads);
1355 if (retval)
1356 goto rm_port_test;
1357 retval = device_create_file(dev, &dev_attr_registers);
1358 if (retval)
1359 goto rm_qheads;
1360 retval = device_create_file(dev, &dev_attr_requests);
1361 if (retval)
1362 goto rm_registers;
1363 return 0;
1364
1365 rm_registers:
1366 device_remove_file(dev, &dev_attr_registers);
1367 rm_qheads:
1368 device_remove_file(dev, &dev_attr_qheads);
1369 rm_port_test:
1370 device_remove_file(dev, &dev_attr_port_test);
1371 rm_inters:
1372 device_remove_file(dev, &dev_attr_inters);
1373 rm_events:
1374 device_remove_file(dev, &dev_attr_events);
1375 rm_driver:
1376 device_remove_file(dev, &dev_attr_driver);
1377 rm_device:
1378 device_remove_file(dev, &dev_attr_device);
1379 done:
1380 return retval;
1381}
1382
1383/**
1384 * dbg_remove_files: destroys the attribute interface
1385 * @dev: device
1386 *
1387 * This function returns an error code
1388 */
1389__maybe_unused static int dbg_remove_files(struct device *dev)
1390{
1391 if (dev == NULL)
1392 return -EINVAL;
1393 device_remove_file(dev, &dev_attr_requests);
1394 device_remove_file(dev, &dev_attr_registers);
1395 device_remove_file(dev, &dev_attr_qheads);
1396 device_remove_file(dev, &dev_attr_port_test);
1397 device_remove_file(dev, &dev_attr_inters);
1398 device_remove_file(dev, &dev_attr_events);
1399 device_remove_file(dev, &dev_attr_driver);
1400 device_remove_file(dev, &dev_attr_device);
1401 return 0;
1402}
1403
1404/******************************************************************************
1405 * UTIL block
1406 *****************************************************************************/
1407/**
1408 * _usb_addr: calculates endpoint address from direction & number
1409 * @ep: endpoint
1410 */
1411static inline u8 _usb_addr(struct ci13xxx_ep *ep)
1412{
1413 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
1414}
1415
1416/**
1417 * _hardware_queue: configures a request at hardware level
1418 * @gadget: gadget
1419 * @mEp: endpoint
1420 *
1421 * This function returns an error code
1422 */
1423static int _hardware_enqueue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
1424{
1425 unsigned i;
1426
1427 trace("%p, %p", mEp, mReq);
1428
1429 /* don't queue twice */
1430 if (mReq->req.status == -EALREADY)
1431 return -EALREADY;
1432
1433 if (hw_ep_is_primed(mEp->num, mEp->dir))
1434 return -EBUSY;
1435
1436 mReq->req.status = -EALREADY;
1437
1438 if (mReq->req.length && !mReq->req.dma) {
1439 mReq->req.dma = \
1440 dma_map_single(mEp->device, mReq->req.buf,
1441 mReq->req.length, mEp->dir ?
1442 DMA_TO_DEVICE : DMA_FROM_DEVICE);
1443 if (mReq->req.dma == 0)
1444 return -ENOMEM;
1445
1446 mReq->map = 1;
1447 }
1448
1449 /*
1450 * TD configuration
1451 * TODO - handle requests which spawns into several TDs
1452 */
1453 memset(mReq->ptr, 0, sizeof(*mReq->ptr));
1454 mReq->ptr->next |= TD_TERMINATE;
1455 mReq->ptr->token = mReq->req.length << ffs_nr(TD_TOTAL_BYTES);
1456 mReq->ptr->token &= TD_TOTAL_BYTES;
1457 mReq->ptr->token |= TD_IOC;
1458 mReq->ptr->token |= TD_STATUS_ACTIVE;
1459 mReq->ptr->page[0] = mReq->req.dma;
1460 for (i = 1; i < 5; i++)
1461 mReq->ptr->page[i] =
1462 (mReq->req.dma + i * PAGE_SIZE) & ~TD_RESERVED_MASK;
1463
1464 /*
1465 * QH configuration
1466 * At this point it's guaranteed exclusive access to qhead
1467 * (endpt is not primed) so it's no need to use tripwire
1468 */
1469 mEp->qh[mEp->dir].ptr->td.next = mReq->dma; /* TERMINATE = 0 */
1470 mEp->qh[mEp->dir].ptr->td.token &= ~TD_STATUS; /* clear status */
1471 if (mReq->req.zero == 0)
1472 mEp->qh[mEp->dir].ptr->cap |= QH_ZLT;
1473 else
1474 mEp->qh[mEp->dir].ptr->cap &= ~QH_ZLT;
1475
1476 wmb(); /* synchronize before ep prime */
1477
1478 return hw_ep_prime(mEp->num, mEp->dir,
1479 mEp->type == USB_ENDPOINT_XFER_CONTROL);
1480}
1481
1482/**
1483 * _hardware_dequeue: handles a request at hardware level
1484 * @gadget: gadget
1485 * @mEp: endpoint
1486 *
1487 * This function returns an error code
1488 */
1489static int _hardware_dequeue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
1490{
1491 trace("%p, %p", mEp, mReq);
1492
1493 if (mReq->req.status != -EALREADY)
1494 return -EINVAL;
1495
1496 if (hw_ep_is_primed(mEp->num, mEp->dir))
1497 hw_ep_flush(mEp->num, mEp->dir);
1498
1499 mReq->req.status = 0;
1500
1501 if (mReq->map) {
1502 dma_unmap_single(mEp->device, mReq->req.dma, mReq->req.length,
1503 mEp->dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1504 mReq->req.dma = 0;
1505 mReq->map = 0;
1506 }
1507
1508 mReq->req.status = mReq->ptr->token & TD_STATUS;
1509 if ((TD_STATUS_ACTIVE & mReq->req.status) != 0)
1510 mReq->req.status = -ECONNRESET;
1511 else if ((TD_STATUS_HALTED & mReq->req.status) != 0)
1512 mReq->req.status = -1;
1513 else if ((TD_STATUS_DT_ERR & mReq->req.status) != 0)
1514 mReq->req.status = -1;
1515 else if ((TD_STATUS_TR_ERR & mReq->req.status) != 0)
1516 mReq->req.status = -1;
1517
1518 mReq->req.actual = mReq->ptr->token & TD_TOTAL_BYTES;
1519 mReq->req.actual >>= ffs_nr(TD_TOTAL_BYTES);
1520 mReq->req.actual = mReq->req.length - mReq->req.actual;
1521 mReq->req.actual = mReq->req.status ? 0 : mReq->req.actual;
1522
1523 return mReq->req.actual;
1524}
1525
1526/**
1527 * _ep_nuke: dequeues all endpoint requests
1528 * @mEp: endpoint
1529 *
1530 * This function returns an error code
1531 * Caller must hold lock
1532 */
1533static int _ep_nuke(struct ci13xxx_ep *mEp)
1534__releases(mEp->lock)
1535__acquires(mEp->lock)
1536{
1537 trace("%p", mEp);
1538
1539 if (mEp == NULL)
1540 return -EINVAL;
1541
1542 hw_ep_flush(mEp->num, mEp->dir);
1543
1544 while (!list_empty(&mEp->qh[mEp->dir].queue)) {
1545
1546 /* pop oldest request */
1547 struct ci13xxx_req *mReq = \
1548 list_entry(mEp->qh[mEp->dir].queue.next,
1549 struct ci13xxx_req, queue);
1550 list_del_init(&mReq->queue);
1551 mReq->req.status = -ESHUTDOWN;
1552
1553 if (!mReq->req.no_interrupt && mReq->req.complete != NULL) {
1554 spin_unlock(mEp->lock);
1555 mReq->req.complete(&mEp->ep, &mReq->req);
1556 spin_lock(mEp->lock);
1557 }
1558 }
1559 return 0;
1560}
1561
1562/**
1563 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
1564 * @gadget: gadget
1565 *
1566 * This function returns an error code
1567 * Caller must hold lock
1568 */
1569static int _gadget_stop_activity(struct usb_gadget *gadget)
David Lopoaa69a802008-11-17 14:14:51 -08001570{
1571 struct usb_ep *ep;
1572 struct ci13xxx *udc = container_of(gadget, struct ci13xxx, gadget);
1573 struct ci13xxx_ep *mEp = container_of(gadget->ep0,
1574 struct ci13xxx_ep, ep);
1575
1576 trace("%p", gadget);
1577
1578 if (gadget == NULL)
1579 return -EINVAL;
1580
David Lopoaa69a802008-11-17 14:14:51 -08001581 /* flush all endpoints */
1582 gadget_for_each_ep(ep, gadget) {
1583 usb_ep_fifo_flush(ep);
1584 }
1585 usb_ep_fifo_flush(gadget->ep0);
1586
1587 udc->driver->disconnect(gadget);
1588
1589 /* make sure to disable all endpoints */
1590 gadget_for_each_ep(ep, gadget) {
1591 usb_ep_disable(ep);
1592 }
1593 usb_ep_disable(gadget->ep0);
1594
1595 if (mEp->status != NULL) {
1596 usb_ep_free_request(gadget->ep0, mEp->status);
1597 mEp->status = NULL;
1598 }
1599
David Lopoaa69a802008-11-17 14:14:51 -08001600 return 0;
1601}
1602
1603/******************************************************************************
1604 * ISR block
1605 *****************************************************************************/
1606/**
1607 * isr_reset_handler: USB reset interrupt handler
1608 * @udc: UDC device
1609 *
1610 * This function resets USB engine after a bus reset occurred
1611 */
1612static void isr_reset_handler(struct ci13xxx *udc)
1613__releases(udc->lock)
1614__acquires(udc->lock)
1615{
1616 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[0];
1617 int retval;
1618
1619 trace("%p", udc);
1620
1621 if (udc == NULL) {
1622 err("EINVAL");
1623 return;
1624 }
1625
1626 dbg_event(0xFF, "BUS RST", 0);
1627
Pavankumar Kondetif01ef572010-12-07 17:54:02 +05301628 spin_unlock(udc->lock);
David Lopoaa69a802008-11-17 14:14:51 -08001629 retval = _gadget_stop_activity(&udc->gadget);
1630 if (retval)
1631 goto done;
1632
1633 retval = hw_usb_reset();
1634 if (retval)
1635 goto done;
1636
David Lopoaa69a802008-11-17 14:14:51 -08001637 retval = usb_ep_enable(&mEp->ep, &ctrl_endpt_desc);
1638 if (!retval) {
Pavankumar Kondeti0a91efa2010-12-07 17:54:00 +05301639 mEp->status = usb_ep_alloc_request(&mEp->ep, GFP_ATOMIC);
David Lopoaa69a802008-11-17 14:14:51 -08001640 if (mEp->status == NULL) {
1641 usb_ep_disable(&mEp->ep);
1642 retval = -ENOMEM;
1643 }
1644 }
1645 spin_lock(udc->lock);
1646
1647 done:
1648 if (retval)
1649 err("error: %i", retval);
1650}
1651
1652/**
1653 * isr_get_status_complete: get_status request complete function
1654 * @ep: endpoint
1655 * @req: request handled
1656 *
1657 * Caller must release lock
1658 */
1659static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
1660{
1661 trace("%p, %p", ep, req);
1662
1663 if (ep == NULL || req == NULL) {
1664 err("EINVAL");
1665 return;
1666 }
1667
1668 kfree(req->buf);
1669 usb_ep_free_request(ep, req);
1670}
1671
1672/**
1673 * isr_get_status_response: get_status request response
1674 * @ep: endpoint
1675 * @setup: setup request packet
1676 *
1677 * This function returns an error code
1678 */
1679static int isr_get_status_response(struct ci13xxx_ep *mEp,
1680 struct usb_ctrlrequest *setup)
1681__releases(mEp->lock)
1682__acquires(mEp->lock)
1683{
1684 struct usb_request *req = NULL;
1685 gfp_t gfp_flags = GFP_ATOMIC;
1686 int dir, num, retval;
1687
1688 trace("%p, %p", mEp, setup);
1689
1690 if (mEp == NULL || setup == NULL)
1691 return -EINVAL;
1692
1693 spin_unlock(mEp->lock);
1694 req = usb_ep_alloc_request(&mEp->ep, gfp_flags);
1695 spin_lock(mEp->lock);
1696 if (req == NULL)
1697 return -ENOMEM;
1698
1699 req->complete = isr_get_status_complete;
1700 req->length = 2;
1701 req->buf = kzalloc(req->length, gfp_flags);
1702 if (req->buf == NULL) {
1703 retval = -ENOMEM;
1704 goto err_free_req;
1705 }
1706
1707 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1708 /* TODO: D1 - Remote Wakeup; D0 - Self Powered */
1709 retval = 0;
1710 } else if ((setup->bRequestType & USB_RECIP_MASK) \
1711 == USB_RECIP_ENDPOINT) {
1712 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
1713 TX : RX;
1714 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
1715 *((u16 *)req->buf) = hw_ep_get_halt(num, dir);
1716 }
1717 /* else do nothing; reserved for future use */
1718
1719 spin_unlock(mEp->lock);
1720 retval = usb_ep_queue(&mEp->ep, req, gfp_flags);
1721 spin_lock(mEp->lock);
1722 if (retval)
1723 goto err_free_buf;
1724
1725 return 0;
1726
1727 err_free_buf:
1728 kfree(req->buf);
1729 err_free_req:
1730 spin_unlock(mEp->lock);
1731 usb_ep_free_request(&mEp->ep, req);
1732 spin_lock(mEp->lock);
1733 return retval;
1734}
1735
1736/**
1737 * isr_setup_status_phase: queues the status phase of a setup transation
1738 * @mEp: endpoint
1739 *
1740 * This function returns an error code
1741 */
1742static int isr_setup_status_phase(struct ci13xxx_ep *mEp)
1743__releases(mEp->lock)
1744__acquires(mEp->lock)
1745{
1746 int retval;
1747
1748 trace("%p", mEp);
1749
1750 /* mEp is always valid & configured */
1751
1752 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
1753 mEp->dir = (mEp->dir == TX) ? RX : TX;
1754
1755 mEp->status->no_interrupt = 1;
1756
1757 spin_unlock(mEp->lock);
1758 retval = usb_ep_queue(&mEp->ep, mEp->status, GFP_ATOMIC);
1759 spin_lock(mEp->lock);
1760
1761 return retval;
1762}
1763
1764/**
1765 * isr_tr_complete_low: transaction complete low level handler
1766 * @mEp: endpoint
1767 *
1768 * This function returns an error code
1769 * Caller must hold lock
1770 */
1771static int isr_tr_complete_low(struct ci13xxx_ep *mEp)
1772__releases(mEp->lock)
1773__acquires(mEp->lock)
1774{
1775 struct ci13xxx_req *mReq;
1776 int retval;
1777
1778 trace("%p", mEp);
1779
1780 if (list_empty(&mEp->qh[mEp->dir].queue))
1781 return -EINVAL;
1782
1783 /* pop oldest request */
1784 mReq = list_entry(mEp->qh[mEp->dir].queue.next,
1785 struct ci13xxx_req, queue);
1786 list_del_init(&mReq->queue);
1787
1788 retval = _hardware_dequeue(mEp, mReq);
1789 if (retval < 0) {
1790 dbg_event(_usb_addr(mEp), "DONE", retval);
1791 goto done;
1792 }
1793
1794 dbg_done(_usb_addr(mEp), mReq->ptr->token, retval);
1795
1796 if (!mReq->req.no_interrupt && mReq->req.complete != NULL) {
1797 spin_unlock(mEp->lock);
1798 mReq->req.complete(&mEp->ep, &mReq->req);
1799 spin_lock(mEp->lock);
1800 }
1801
1802 if (!list_empty(&mEp->qh[mEp->dir].queue)) {
1803 mReq = list_entry(mEp->qh[mEp->dir].queue.next,
1804 struct ci13xxx_req, queue);
1805 _hardware_enqueue(mEp, mReq);
1806 }
1807
1808 done:
1809 return retval;
1810}
1811
1812/**
1813 * isr_tr_complete_handler: transaction complete interrupt handler
1814 * @udc: UDC descriptor
1815 *
1816 * This function handles traffic events
1817 */
1818static void isr_tr_complete_handler(struct ci13xxx *udc)
1819__releases(udc->lock)
1820__acquires(udc->lock)
1821{
1822 unsigned i;
1823
1824 trace("%p", udc);
1825
1826 if (udc == NULL) {
1827 err("EINVAL");
1828 return;
1829 }
1830
1831 for (i = 0; i < hw_ep_max; i++) {
1832 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
1833 int type, num, err = -EINVAL;
1834 struct usb_ctrlrequest req;
1835
1836
1837 if (mEp->desc == NULL)
1838 continue; /* not configured */
1839
1840 if ((mEp->dir == RX && hw_test_and_clear_complete(i)) ||
1841 (mEp->dir == TX && hw_test_and_clear_complete(i + 16))) {
1842 err = isr_tr_complete_low(mEp);
1843 if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
1844 if (err > 0) /* needs status phase */
1845 err = isr_setup_status_phase(mEp);
1846 if (err < 0) {
1847 dbg_event(_usb_addr(mEp),
1848 "ERROR", err);
1849 spin_unlock(udc->lock);
1850 if (usb_ep_set_halt(&mEp->ep))
1851 err("error: ep_set_halt");
1852 spin_lock(udc->lock);
1853 }
1854 }
1855 }
1856
1857 if (mEp->type != USB_ENDPOINT_XFER_CONTROL ||
1858 !hw_test_and_clear_setup_status(i))
1859 continue;
1860
1861 if (i != 0) {
1862 warn("ctrl traffic received at endpoint");
1863 continue;
1864 }
1865
1866 /* read_setup_packet */
1867 do {
1868 hw_test_and_set_setup_guard();
1869 memcpy(&req, &mEp->qh[RX].ptr->setup, sizeof(req));
1870 } while (!hw_test_and_clear_setup_guard());
1871
1872 type = req.bRequestType;
1873
1874 mEp->dir = (type & USB_DIR_IN) ? TX : RX;
1875
1876 dbg_setup(_usb_addr(mEp), &req);
1877
1878 switch (req.bRequest) {
1879 case USB_REQ_CLEAR_FEATURE:
1880 if (type != (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1881 le16_to_cpu(req.wValue) != USB_ENDPOINT_HALT)
1882 goto delegate;
1883 if (req.wLength != 0)
1884 break;
1885 num = le16_to_cpu(req.wIndex);
1886 num &= USB_ENDPOINT_NUMBER_MASK;
1887 if (!udc->ci13xxx_ep[num].wedge) {
1888 spin_unlock(udc->lock);
1889 err = usb_ep_clear_halt(
1890 &udc->ci13xxx_ep[num].ep);
1891 spin_lock(udc->lock);
1892 if (err)
1893 break;
1894 }
1895 err = isr_setup_status_phase(mEp);
1896 break;
1897 case USB_REQ_GET_STATUS:
1898 if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
1899 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1900 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1901 goto delegate;
1902 if (le16_to_cpu(req.wLength) != 2 ||
1903 le16_to_cpu(req.wValue) != 0)
1904 break;
1905 err = isr_get_status_response(mEp, &req);
1906 break;
1907 case USB_REQ_SET_ADDRESS:
1908 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1909 goto delegate;
1910 if (le16_to_cpu(req.wLength) != 0 ||
1911 le16_to_cpu(req.wIndex) != 0)
1912 break;
1913 err = hw_usb_set_address((u8)le16_to_cpu(req.wValue));
1914 if (err)
1915 break;
1916 err = isr_setup_status_phase(mEp);
1917 break;
1918 case USB_REQ_SET_FEATURE:
1919 if (type != (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1920 le16_to_cpu(req.wValue) != USB_ENDPOINT_HALT)
1921 goto delegate;
1922 if (req.wLength != 0)
1923 break;
1924 num = le16_to_cpu(req.wIndex);
1925 num &= USB_ENDPOINT_NUMBER_MASK;
1926
1927 spin_unlock(udc->lock);
1928 err = usb_ep_set_halt(&udc->ci13xxx_ep[num].ep);
1929 spin_lock(udc->lock);
1930 if (err)
1931 break;
1932 err = isr_setup_status_phase(mEp);
1933 break;
1934 default:
1935delegate:
1936 if (req.wLength == 0) /* no data phase */
1937 mEp->dir = TX;
1938
1939 spin_unlock(udc->lock);
1940 err = udc->driver->setup(&udc->gadget, &req);
1941 spin_lock(udc->lock);
1942 break;
1943 }
1944
1945 if (err < 0) {
1946 dbg_event(_usb_addr(mEp), "ERROR", err);
1947
1948 spin_unlock(udc->lock);
1949 if (usb_ep_set_halt(&mEp->ep))
1950 err("error: ep_set_halt");
1951 spin_lock(udc->lock);
1952 }
1953 }
1954}
1955
1956/******************************************************************************
1957 * ENDPT block
1958 *****************************************************************************/
1959/**
1960 * ep_enable: configure endpoint, making it usable
1961 *
1962 * Check usb_ep_enable() at "usb_gadget.h" for details
1963 */
1964static int ep_enable(struct usb_ep *ep,
1965 const struct usb_endpoint_descriptor *desc)
1966{
1967 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1968 int direction, retval = 0;
1969 unsigned long flags;
1970
1971 trace("%p, %p", ep, desc);
1972
1973 if (ep == NULL || desc == NULL)
1974 return -EINVAL;
1975
1976 spin_lock_irqsave(mEp->lock, flags);
1977
1978 /* only internal SW should enable ctrl endpts */
1979
1980 mEp->desc = desc;
1981
1982 if (!list_empty(&mEp->qh[mEp->dir].queue))
1983 warn("enabling a non-empty endpoint!");
1984
Matthias Kaehlcke15739bb2009-04-15 22:28:41 +02001985 mEp->dir = usb_endpoint_dir_in(desc) ? TX : RX;
1986 mEp->num = usb_endpoint_num(desc);
1987 mEp->type = usb_endpoint_type(desc);
David Lopoaa69a802008-11-17 14:14:51 -08001988
1989 mEp->ep.maxpacket = __constant_le16_to_cpu(desc->wMaxPacketSize);
1990
1991 direction = mEp->dir;
1992 do {
1993 dbg_event(_usb_addr(mEp), "ENABLE", 0);
1994
David Lopof23e6492009-04-16 14:35:24 -07001995 mEp->qh[mEp->dir].ptr->cap = 0;
1996
David Lopoaa69a802008-11-17 14:14:51 -08001997 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
1998 mEp->qh[mEp->dir].ptr->cap |= QH_IOS;
1999 else if (mEp->type == USB_ENDPOINT_XFER_ISOC)
2000 mEp->qh[mEp->dir].ptr->cap &= ~QH_MULT;
2001 else
2002 mEp->qh[mEp->dir].ptr->cap &= ~QH_ZLT;
2003
2004 mEp->qh[mEp->dir].ptr->cap |=
2005 (mEp->ep.maxpacket << ffs_nr(QH_MAX_PKT)) & QH_MAX_PKT;
2006 mEp->qh[mEp->dir].ptr->td.next |= TD_TERMINATE; /* needed? */
2007
2008 retval |= hw_ep_enable(mEp->num, mEp->dir, mEp->type);
2009
2010 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
2011 mEp->dir = (mEp->dir == TX) ? RX : TX;
2012
2013 } while (mEp->dir != direction);
2014
2015 spin_unlock_irqrestore(mEp->lock, flags);
2016 return retval;
2017}
2018
2019/**
2020 * ep_disable: endpoint is no longer usable
2021 *
2022 * Check usb_ep_disable() at "usb_gadget.h" for details
2023 */
2024static int ep_disable(struct usb_ep *ep)
2025{
2026 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2027 int direction, retval = 0;
2028 unsigned long flags;
2029
2030 trace("%p", ep);
2031
2032 if (ep == NULL)
2033 return -EINVAL;
2034 else if (mEp->desc == NULL)
2035 return -EBUSY;
2036
2037 spin_lock_irqsave(mEp->lock, flags);
2038
2039 /* only internal SW should disable ctrl endpts */
2040
2041 direction = mEp->dir;
2042 do {
2043 dbg_event(_usb_addr(mEp), "DISABLE", 0);
2044
2045 retval |= _ep_nuke(mEp);
2046 retval |= hw_ep_disable(mEp->num, mEp->dir);
2047
2048 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
2049 mEp->dir = (mEp->dir == TX) ? RX : TX;
2050
2051 } while (mEp->dir != direction);
2052
2053 mEp->desc = NULL;
2054
2055 spin_unlock_irqrestore(mEp->lock, flags);
2056 return retval;
2057}
2058
2059/**
2060 * ep_alloc_request: allocate a request object to use with this endpoint
2061 *
2062 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
2063 */
2064static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
2065{
2066 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2067 struct ci13xxx_req *mReq = NULL;
David Lopoaa69a802008-11-17 14:14:51 -08002068
2069 trace("%p, %i", ep, gfp_flags);
2070
2071 if (ep == NULL) {
2072 err("EINVAL");
2073 return NULL;
2074 }
2075
David Lopoaa69a802008-11-17 14:14:51 -08002076 mReq = kzalloc(sizeof(struct ci13xxx_req), gfp_flags);
2077 if (mReq != NULL) {
2078 INIT_LIST_HEAD(&mReq->queue);
2079
2080 mReq->ptr = dma_pool_alloc(mEp->td_pool, gfp_flags,
2081 &mReq->dma);
2082 if (mReq->ptr == NULL) {
2083 kfree(mReq);
2084 mReq = NULL;
2085 }
2086 }
2087
2088 dbg_event(_usb_addr(mEp), "ALLOC", mReq == NULL);
2089
David Lopoaa69a802008-11-17 14:14:51 -08002090 return (mReq == NULL) ? NULL : &mReq->req;
2091}
2092
2093/**
2094 * ep_free_request: frees a request object
2095 *
2096 * Check usb_ep_free_request() at "usb_gadget.h" for details
2097 */
2098static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
2099{
2100 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2101 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
2102 unsigned long flags;
2103
2104 trace("%p, %p", ep, req);
2105
2106 if (ep == NULL || req == NULL) {
2107 err("EINVAL");
2108 return;
2109 } else if (!list_empty(&mReq->queue)) {
2110 err("EBUSY");
2111 return;
2112 }
2113
2114 spin_lock_irqsave(mEp->lock, flags);
2115
2116 if (mReq->ptr)
2117 dma_pool_free(mEp->td_pool, mReq->ptr, mReq->dma);
2118 kfree(mReq);
2119
2120 dbg_event(_usb_addr(mEp), "FREE", 0);
2121
2122 spin_unlock_irqrestore(mEp->lock, flags);
2123}
2124
2125/**
2126 * ep_queue: queues (submits) an I/O request to an endpoint
2127 *
2128 * Check usb_ep_queue()* at usb_gadget.h" for details
2129 */
2130static int ep_queue(struct usb_ep *ep, struct usb_request *req,
2131 gfp_t __maybe_unused gfp_flags)
2132{
2133 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2134 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
2135 int retval = 0;
2136 unsigned long flags;
2137
2138 trace("%p, %p, %X", ep, req, gfp_flags);
2139
2140 if (ep == NULL || req == NULL || mEp->desc == NULL)
2141 return -EINVAL;
2142
2143 spin_lock_irqsave(mEp->lock, flags);
2144
2145 if (mEp->type == USB_ENDPOINT_XFER_CONTROL &&
2146 !list_empty(&mEp->qh[mEp->dir].queue)) {
2147 _ep_nuke(mEp);
2148 retval = -EOVERFLOW;
2149 warn("endpoint ctrl %X nuked", _usb_addr(mEp));
2150 }
2151
2152 /* first nuke then test link, e.g. previous status has not sent */
2153 if (!list_empty(&mReq->queue)) {
2154 retval = -EBUSY;
2155 err("request already in queue");
2156 goto done;
2157 }
2158
2159 if (req->length > (4 * PAGE_SIZE)) {
2160 req->length = (4 * PAGE_SIZE);
2161 retval = -EMSGSIZE;
2162 warn("request length truncated");
2163 }
2164
2165 dbg_queue(_usb_addr(mEp), req, retval);
2166
2167 /* push request */
2168 mReq->req.status = -EINPROGRESS;
2169 mReq->req.actual = 0;
2170 list_add_tail(&mReq->queue, &mEp->qh[mEp->dir].queue);
2171
2172 retval = _hardware_enqueue(mEp, mReq);
2173 if (retval == -EALREADY || retval == -EBUSY) {
2174 dbg_event(_usb_addr(mEp), "QUEUE", retval);
2175 retval = 0;
2176 }
2177
2178 done:
2179 spin_unlock_irqrestore(mEp->lock, flags);
2180 return retval;
2181}
2182
2183/**
2184 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
2185 *
2186 * Check usb_ep_dequeue() at "usb_gadget.h" for details
2187 */
2188static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
2189{
2190 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2191 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
2192 unsigned long flags;
2193
2194 trace("%p, %p", ep, req);
2195
2196 if (ep == NULL || req == NULL || mEp->desc == NULL ||
2197 list_empty(&mReq->queue) || list_empty(&mEp->qh[mEp->dir].queue))
2198 return -EINVAL;
2199
2200 spin_lock_irqsave(mEp->lock, flags);
2201
2202 dbg_event(_usb_addr(mEp), "DEQUEUE", 0);
2203
2204 if (mReq->req.status == -EALREADY)
2205 _hardware_dequeue(mEp, mReq);
2206
2207 /* pop request */
2208 list_del_init(&mReq->queue);
2209 req->status = -ECONNRESET;
2210
2211 if (!mReq->req.no_interrupt && mReq->req.complete != NULL) {
2212 spin_unlock(mEp->lock);
2213 mReq->req.complete(&mEp->ep, &mReq->req);
2214 spin_lock(mEp->lock);
2215 }
2216
2217 spin_unlock_irqrestore(mEp->lock, flags);
2218 return 0;
2219}
2220
2221/**
2222 * ep_set_halt: sets the endpoint halt feature
2223 *
2224 * Check usb_ep_set_halt() at "usb_gadget.h" for details
2225 */
2226static int ep_set_halt(struct usb_ep *ep, int value)
2227{
2228 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2229 int direction, retval = 0;
2230 unsigned long flags;
2231
2232 trace("%p, %i", ep, value);
2233
2234 if (ep == NULL || mEp->desc == NULL)
2235 return -EINVAL;
2236
2237 spin_lock_irqsave(mEp->lock, flags);
2238
2239#ifndef STALL_IN
2240 /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
2241 if (value && mEp->type == USB_ENDPOINT_XFER_BULK && mEp->dir == TX &&
2242 !list_empty(&mEp->qh[mEp->dir].queue)) {
2243 spin_unlock_irqrestore(mEp->lock, flags);
2244 return -EAGAIN;
2245 }
2246#endif
2247
2248 direction = mEp->dir;
2249 do {
2250 dbg_event(_usb_addr(mEp), "HALT", value);
2251 retval |= hw_ep_set_halt(mEp->num, mEp->dir, value);
2252
2253 if (!value)
2254 mEp->wedge = 0;
2255
2256 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
2257 mEp->dir = (mEp->dir == TX) ? RX : TX;
2258
2259 } while (mEp->dir != direction);
2260
2261 spin_unlock_irqrestore(mEp->lock, flags);
2262 return retval;
2263}
2264
2265/**
2266 * ep_set_wedge: sets the halt feature and ignores clear requests
2267 *
2268 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
2269 */
2270static int ep_set_wedge(struct usb_ep *ep)
2271{
2272 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2273 unsigned long flags;
2274
2275 trace("%p", ep);
2276
2277 if (ep == NULL || mEp->desc == NULL)
2278 return -EINVAL;
2279
2280 spin_lock_irqsave(mEp->lock, flags);
2281
2282 dbg_event(_usb_addr(mEp), "WEDGE", 0);
2283 mEp->wedge = 1;
2284
2285 spin_unlock_irqrestore(mEp->lock, flags);
2286
2287 return usb_ep_set_halt(ep);
2288}
2289
2290/**
2291 * ep_fifo_flush: flushes contents of a fifo
2292 *
2293 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
2294 */
2295static void ep_fifo_flush(struct usb_ep *ep)
2296{
2297 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2298 unsigned long flags;
2299
2300 trace("%p", ep);
2301
2302 if (ep == NULL) {
2303 err("%02X: -EINVAL", _usb_addr(mEp));
2304 return;
2305 }
2306
2307 spin_lock_irqsave(mEp->lock, flags);
2308
2309 dbg_event(_usb_addr(mEp), "FFLUSH", 0);
2310 hw_ep_flush(mEp->num, mEp->dir);
2311
2312 spin_unlock_irqrestore(mEp->lock, flags);
2313}
2314
2315/**
2316 * Endpoint-specific part of the API to the USB controller hardware
2317 * Check "usb_gadget.h" for details
2318 */
2319static const struct usb_ep_ops usb_ep_ops = {
2320 .enable = ep_enable,
2321 .disable = ep_disable,
2322 .alloc_request = ep_alloc_request,
2323 .free_request = ep_free_request,
2324 .queue = ep_queue,
2325 .dequeue = ep_dequeue,
2326 .set_halt = ep_set_halt,
2327 .set_wedge = ep_set_wedge,
2328 .fifo_flush = ep_fifo_flush,
2329};
2330
2331/******************************************************************************
2332 * GADGET block
2333 *****************************************************************************/
Pavankumar Kondetif01ef572010-12-07 17:54:02 +05302334static int ci13xxx_vbus_session(struct usb_gadget *_gadget, int is_active)
2335{
2336 struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
2337 unsigned long flags;
2338 int gadget_ready = 0;
2339
2340 if (!(udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS))
2341 return -EOPNOTSUPP;
2342
2343 spin_lock_irqsave(udc->lock, flags);
2344 udc->vbus_active = is_active;
2345 if (udc->driver)
2346 gadget_ready = 1;
2347 spin_unlock_irqrestore(udc->lock, flags);
2348
2349 if (gadget_ready) {
2350 if (is_active) {
2351 hw_device_reset(udc);
2352 hw_device_state(udc->ci13xxx_ep[0].qh[RX].dma);
2353 } else {
2354 hw_device_state(0);
2355 if (udc->udc_driver->notify_event)
2356 udc->udc_driver->notify_event(udc,
2357 CI13XXX_CONTROLLER_STOPPED_EVENT);
2358 _gadget_stop_activity(&udc->gadget);
2359 }
2360 }
2361
2362 return 0;
2363}
2364
David Lopoaa69a802008-11-17 14:14:51 -08002365/**
2366 * Device operations part of the API to the USB controller hardware,
2367 * which don't involve endpoints (or i/o)
2368 * Check "usb_gadget.h" for details
2369 */
Pavankumar Kondetif01ef572010-12-07 17:54:02 +05302370static const struct usb_gadget_ops usb_gadget_ops = {
2371 .vbus_session = ci13xxx_vbus_session,
2372};
David Lopoaa69a802008-11-17 14:14:51 -08002373
2374/**
Uwe Kleine-Königb0fca502010-08-12 17:43:53 +02002375 * usb_gadget_probe_driver: register a gadget driver
2376 * @driver: the driver being registered
2377 * @bind: the driver's bind callback
David Lopoaa69a802008-11-17 14:14:51 -08002378 *
Uwe Kleine-Königb0fca502010-08-12 17:43:53 +02002379 * Check usb_gadget_probe_driver() at <linux/usb/gadget.h> for details.
2380 * Interrupts are enabled here.
David Lopoaa69a802008-11-17 14:14:51 -08002381 */
Uwe Kleine-Königb0fca502010-08-12 17:43:53 +02002382int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
2383 int (*bind)(struct usb_gadget *))
David Lopoaa69a802008-11-17 14:14:51 -08002384{
2385 struct ci13xxx *udc = _udc;
2386 unsigned long i, k, flags;
2387 int retval = -ENOMEM;
2388
2389 trace("%p", driver);
2390
2391 if (driver == NULL ||
Uwe Kleine-Königb0fca502010-08-12 17:43:53 +02002392 bind == NULL ||
David Lopoaa69a802008-11-17 14:14:51 -08002393 driver->unbind == NULL ||
2394 driver->setup == NULL ||
2395 driver->disconnect == NULL ||
2396 driver->suspend == NULL ||
2397 driver->resume == NULL)
2398 return -EINVAL;
2399 else if (udc == NULL)
2400 return -ENODEV;
2401 else if (udc->driver != NULL)
2402 return -EBUSY;
2403
2404 /* alloc resources */
2405 udc->qh_pool = dma_pool_create("ci13xxx_qh", &udc->gadget.dev,
2406 sizeof(struct ci13xxx_qh),
2407 64, PAGE_SIZE);
2408 if (udc->qh_pool == NULL)
2409 return -ENOMEM;
2410
2411 udc->td_pool = dma_pool_create("ci13xxx_td", &udc->gadget.dev,
2412 sizeof(struct ci13xxx_td),
2413 64, PAGE_SIZE);
2414 if (udc->td_pool == NULL) {
2415 dma_pool_destroy(udc->qh_pool);
2416 udc->qh_pool = NULL;
2417 return -ENOMEM;
2418 }
2419
2420 spin_lock_irqsave(udc->lock, flags);
2421
2422 info("hw_ep_max = %d", hw_ep_max);
2423
2424 udc->driver = driver;
David Lopoaa69a802008-11-17 14:14:51 -08002425 udc->gadget.dev.driver = NULL;
2426
2427 retval = 0;
2428 for (i = 0; i < hw_ep_max; i++) {
2429 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
2430
2431 scnprintf(mEp->name, sizeof(mEp->name), "ep%i", (int)i);
2432
2433 mEp->lock = udc->lock;
2434 mEp->device = &udc->gadget.dev;
2435 mEp->td_pool = udc->td_pool;
2436
2437 mEp->ep.name = mEp->name;
2438 mEp->ep.ops = &usb_ep_ops;
2439 mEp->ep.maxpacket = CTRL_PAYLOAD_MAX;
2440
2441 /* this allocation cannot be random */
2442 for (k = RX; k <= TX; k++) {
2443 INIT_LIST_HEAD(&mEp->qh[k].queue);
Pavankumar Kondeti0a91efa2010-12-07 17:54:00 +05302444 spin_unlock_irqrestore(udc->lock, flags);
David Lopoaa69a802008-11-17 14:14:51 -08002445 mEp->qh[k].ptr = dma_pool_alloc(udc->qh_pool,
2446 GFP_KERNEL,
2447 &mEp->qh[k].dma);
Pavankumar Kondeti0a91efa2010-12-07 17:54:00 +05302448 spin_lock_irqsave(udc->lock, flags);
David Lopoaa69a802008-11-17 14:14:51 -08002449 if (mEp->qh[k].ptr == NULL)
2450 retval = -ENOMEM;
2451 else
2452 memset(mEp->qh[k].ptr, 0,
2453 sizeof(*mEp->qh[k].ptr));
2454 }
2455 if (i == 0)
2456 udc->gadget.ep0 = &mEp->ep;
2457 else
2458 list_add_tail(&mEp->ep.ep_list, &udc->gadget.ep_list);
2459 }
2460 if (retval)
2461 goto done;
2462
2463 /* bind gadget */
2464 driver->driver.bus = NULL;
David Lopoaa69a802008-11-17 14:14:51 -08002465 udc->gadget.dev.driver = &driver->driver;
2466
2467 spin_unlock_irqrestore(udc->lock, flags);
Uwe Kleine-Königb0fca502010-08-12 17:43:53 +02002468 retval = bind(&udc->gadget); /* MAY SLEEP */
David Lopoaa69a802008-11-17 14:14:51 -08002469 spin_lock_irqsave(udc->lock, flags);
2470
2471 if (retval) {
David Lopoaa69a802008-11-17 14:14:51 -08002472 udc->gadget.dev.driver = NULL;
2473 goto done;
2474 }
2475
Pavankumar Kondetif01ef572010-12-07 17:54:02 +05302476 if (udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS) {
2477 if (udc->vbus_active) {
2478 if (udc->udc_driver->flags & CI13XXX_REGS_SHARED)
2479 hw_device_reset(udc);
2480 } else {
2481 goto done;
2482 }
2483 }
2484
David Lopoaa69a802008-11-17 14:14:51 -08002485 retval = hw_device_state(udc->ci13xxx_ep[0].qh[RX].dma);
2486
2487 done:
2488 spin_unlock_irqrestore(udc->lock, flags);
2489 if (retval)
2490 usb_gadget_unregister_driver(driver);
2491 return retval;
2492}
Uwe Kleine-Königb0fca502010-08-12 17:43:53 +02002493EXPORT_SYMBOL(usb_gadget_probe_driver);
David Lopoaa69a802008-11-17 14:14:51 -08002494
2495/**
2496 * usb_gadget_unregister_driver: unregister a gadget driver
2497 *
2498 * Check usb_gadget_unregister_driver() at "usb_gadget.h" for details
2499 */
2500int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
2501{
2502 struct ci13xxx *udc = _udc;
2503 unsigned long i, k, flags;
2504
2505 trace("%p", driver);
2506
2507 if (driver == NULL ||
David Lopoaa69a802008-11-17 14:14:51 -08002508 driver->unbind == NULL ||
2509 driver->setup == NULL ||
2510 driver->disconnect == NULL ||
2511 driver->suspend == NULL ||
2512 driver->resume == NULL ||
2513 driver != udc->driver)
2514 return -EINVAL;
2515
2516 spin_lock_irqsave(udc->lock, flags);
2517
Pavankumar Kondetif01ef572010-12-07 17:54:02 +05302518 if (!(udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS) ||
2519 udc->vbus_active) {
2520 hw_device_state(0);
2521 if (udc->udc_driver->notify_event)
2522 udc->udc_driver->notify_event(udc,
2523 CI13XXX_CONTROLLER_STOPPED_EVENT);
2524 _gadget_stop_activity(&udc->gadget);
2525 }
David Lopoaa69a802008-11-17 14:14:51 -08002526
2527 /* unbind gadget */
Pavankumar Kondetif01ef572010-12-07 17:54:02 +05302528 spin_unlock_irqrestore(udc->lock, flags);
2529 driver->unbind(&udc->gadget); /* MAY SLEEP */
2530 spin_lock_irqsave(udc->lock, flags);
David Lopoaa69a802008-11-17 14:14:51 -08002531
Pavankumar Kondetif01ef572010-12-07 17:54:02 +05302532 udc->gadget.dev.driver = NULL;
David Lopoaa69a802008-11-17 14:14:51 -08002533
2534 /* free resources */
2535 for (i = 0; i < hw_ep_max; i++) {
2536 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
2537
2538 if (i == 0)
2539 udc->gadget.ep0 = NULL;
2540 else if (!list_empty(&mEp->ep.ep_list))
2541 list_del_init(&mEp->ep.ep_list);
2542
2543 for (k = RX; k <= TX; k++)
2544 if (mEp->qh[k].ptr != NULL)
2545 dma_pool_free(udc->qh_pool,
2546 mEp->qh[k].ptr, mEp->qh[k].dma);
2547 }
2548
2549 udc->driver = NULL;
2550
2551 spin_unlock_irqrestore(udc->lock, flags);
2552
2553 if (udc->td_pool != NULL) {
2554 dma_pool_destroy(udc->td_pool);
2555 udc->td_pool = NULL;
2556 }
2557 if (udc->qh_pool != NULL) {
2558 dma_pool_destroy(udc->qh_pool);
2559 udc->qh_pool = NULL;
2560 }
2561
2562 return 0;
2563}
2564EXPORT_SYMBOL(usb_gadget_unregister_driver);
2565
2566/******************************************************************************
2567 * BUS block
2568 *****************************************************************************/
2569/**
2570 * udc_irq: global interrupt handler
2571 *
2572 * This function returns IRQ_HANDLED if the IRQ has been handled
2573 * It locks access to registers
2574 */
2575static irqreturn_t udc_irq(void)
2576{
2577 struct ci13xxx *udc = _udc;
2578 irqreturn_t retval;
2579 u32 intr;
2580
2581 trace();
2582
2583 if (udc == NULL) {
2584 err("ENODEV");
2585 return IRQ_HANDLED;
2586 }
2587
2588 spin_lock(udc->lock);
Pavankumar Kondetif01ef572010-12-07 17:54:02 +05302589
2590 if (udc->udc_driver->flags & CI13XXX_REGS_SHARED) {
2591 if (hw_cread(CAP_USBMODE, USBMODE_CM) !=
2592 USBMODE_CM_DEVICE) {
2593 spin_unlock(udc->lock);
2594 return IRQ_NONE;
2595 }
2596 }
David Lopoaa69a802008-11-17 14:14:51 -08002597 intr = hw_test_and_clear_intr_active();
2598 if (intr) {
2599 isr_statistics.hndl.buf[isr_statistics.hndl.idx++] = intr;
2600 isr_statistics.hndl.idx &= ISR_MASK;
2601 isr_statistics.hndl.cnt++;
2602
2603 /* order defines priority - do NOT change it */
2604 if (USBi_URI & intr) {
2605 isr_statistics.uri++;
2606 isr_reset_handler(udc);
2607 }
2608 if (USBi_PCI & intr) {
2609 isr_statistics.pci++;
2610 udc->gadget.speed = hw_port_is_high_speed() ?
2611 USB_SPEED_HIGH : USB_SPEED_FULL;
2612 }
2613 if (USBi_UEI & intr)
2614 isr_statistics.uei++;
2615 if (USBi_UI & intr) {
2616 isr_statistics.ui++;
2617 isr_tr_complete_handler(udc);
2618 }
2619 if (USBi_SLI & intr)
2620 isr_statistics.sli++;
2621 retval = IRQ_HANDLED;
2622 } else {
2623 isr_statistics.none++;
2624 retval = IRQ_NONE;
2625 }
2626 spin_unlock(udc->lock);
2627
2628 return retval;
2629}
2630
2631/**
2632 * udc_release: driver release function
2633 * @dev: device
2634 *
2635 * Currently does nothing
2636 */
2637static void udc_release(struct device *dev)
2638{
2639 trace("%p", dev);
2640
2641 if (dev == NULL)
2642 err("EINVAL");
2643}
2644
2645/**
2646 * udc_probe: parent probe must call this to initialize UDC
2647 * @dev: parent device
2648 * @regs: registers base address
2649 * @name: driver name
2650 *
2651 * This function returns an error code
2652 * No interrupts active, the IRQ has not been requested yet
2653 * Kernel assumes 32-bit DMA operations by default, no need to dma_set_mask
2654 */
Pavankumar Kondetif01ef572010-12-07 17:54:02 +05302655static int udc_probe(struct ci13xxx_udc_driver *driver, struct device *dev,
2656 void __iomem *regs)
David Lopoaa69a802008-11-17 14:14:51 -08002657{
2658 struct ci13xxx *udc;
2659 int retval = 0;
2660
2661 trace("%p, %p, %p", dev, regs, name);
2662
Pavankumar Kondetif01ef572010-12-07 17:54:02 +05302663 if (dev == NULL || regs == NULL || driver == NULL ||
2664 driver->name == NULL)
David Lopoaa69a802008-11-17 14:14:51 -08002665 return -EINVAL;
2666
2667 udc = kzalloc(sizeof(struct ci13xxx), GFP_KERNEL);
2668 if (udc == NULL)
2669 return -ENOMEM;
2670
2671 udc->lock = &udc_lock;
Pavankumar Kondetif01ef572010-12-07 17:54:02 +05302672 udc->regs = regs;
2673 udc->udc_driver = driver;
David Lopoaa69a802008-11-17 14:14:51 -08002674
Pavankumar Kondetif01ef572010-12-07 17:54:02 +05302675 udc->gadget.ops = &usb_gadget_ops;
David Lopoaa69a802008-11-17 14:14:51 -08002676 udc->gadget.speed = USB_SPEED_UNKNOWN;
2677 udc->gadget.is_dualspeed = 1;
2678 udc->gadget.is_otg = 0;
Pavankumar Kondetif01ef572010-12-07 17:54:02 +05302679 udc->gadget.name = driver->name;
David Lopoaa69a802008-11-17 14:14:51 -08002680
2681 INIT_LIST_HEAD(&udc->gadget.ep_list);
2682 udc->gadget.ep0 = NULL;
2683
Kay Sievers5df58522009-03-24 16:38:23 -07002684 dev_set_name(&udc->gadget.dev, "gadget");
David Lopoaa69a802008-11-17 14:14:51 -08002685 udc->gadget.dev.dma_mask = dev->dma_mask;
Pavankumar Kondeti61948ee2010-12-07 17:54:01 +05302686 udc->gadget.dev.coherent_dma_mask = dev->coherent_dma_mask;
David Lopoaa69a802008-11-17 14:14:51 -08002687 udc->gadget.dev.parent = dev;
2688 udc->gadget.dev.release = udc_release;
2689
Pavankumar Kondetif01ef572010-12-07 17:54:02 +05302690 retval = hw_device_init(regs);
2691 if (retval < 0)
2692 goto free_udc;
2693
2694 udc->transceiver = otg_get_transceiver();
2695
2696 if (udc->udc_driver->flags & CI13XXX_REQUIRE_TRANSCEIVER) {
2697 if (udc->transceiver == NULL) {
2698 retval = -ENODEV;
2699 goto free_udc;
2700 }
2701 }
2702
2703 if (!(udc->udc_driver->flags & CI13XXX_REGS_SHARED)) {
2704 retval = hw_device_reset(udc);
2705 if (retval)
2706 goto put_transceiver;
2707 }
2708
David Lopoaa69a802008-11-17 14:14:51 -08002709 retval = device_register(&udc->gadget.dev);
Pavankumar Kondetif01ef572010-12-07 17:54:02 +05302710 if (retval) {
2711 put_device(&udc->gadget.dev);
2712 goto put_transceiver;
2713 }
David Lopoaa69a802008-11-17 14:14:51 -08002714
2715#ifdef CONFIG_USB_GADGET_DEBUG_FILES
2716 retval = dbg_create_files(&udc->gadget.dev);
2717#endif
Pavankumar Kondetif01ef572010-12-07 17:54:02 +05302718 if (retval)
2719 goto unreg_device;
2720
2721 if (udc->transceiver) {
2722 retval = otg_set_peripheral(udc->transceiver, &udc->gadget);
2723 if (retval)
2724 goto remove_dbg;
David Lopoaa69a802008-11-17 14:14:51 -08002725 }
2726
2727 _udc = udc;
2728 return retval;
2729
David Lopoaa69a802008-11-17 14:14:51 -08002730 err("error = %i", retval);
Pavankumar Kondetif01ef572010-12-07 17:54:02 +05302731remove_dbg:
2732#ifdef CONFIG_USB_GADGET_DEBUG_FILES
2733 dbg_remove_files(&udc->gadget.dev);
2734#endif
2735unreg_device:
2736 device_unregister(&udc->gadget.dev);
2737put_transceiver:
2738 if (udc->transceiver)
2739 otg_put_transceiver(udc->transceiver);
2740free_udc:
David Lopoaa69a802008-11-17 14:14:51 -08002741 kfree(udc);
2742 _udc = NULL;
2743 return retval;
2744}
2745
2746/**
2747 * udc_remove: parent remove must call this to remove UDC
2748 *
2749 * No interrupts active, the IRQ has been released
2750 */
2751static void udc_remove(void)
2752{
2753 struct ci13xxx *udc = _udc;
2754
2755 if (udc == NULL) {
2756 err("EINVAL");
2757 return;
2758 }
2759
Pavankumar Kondetif01ef572010-12-07 17:54:02 +05302760 if (udc->transceiver) {
2761 otg_set_peripheral(udc->transceiver, &udc->gadget);
2762 otg_put_transceiver(udc->transceiver);
2763 }
David Lopoaa69a802008-11-17 14:14:51 -08002764#ifdef CONFIG_USB_GADGET_DEBUG_FILES
2765 dbg_remove_files(&udc->gadget.dev);
2766#endif
2767 device_unregister(&udc->gadget.dev);
2768
2769 kfree(udc);
2770 _udc = NULL;
2771}