Jitendra Kalsaria | 577ae39 | 2013-02-04 12:33:07 +0000 | [diff] [blame] | 1 | /* |
| 2 | * QLogic qlcnic NIC Driver |
| 3 | * Copyright (c) 2009-2013 QLogic Corporation |
| 4 | * |
| 5 | * See LICENSE.qlcnic for copyright and licensing details. |
| 6 | */ |
| 7 | |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 8 | #ifndef __QLCNIC_83XX_HW_H |
| 9 | #define __QLCNIC_83XX_HW_H |
| 10 | |
| 11 | #include <linux/types.h> |
| 12 | #include <linux/etherdevice.h> |
| 13 | #include "qlcnic_hw.h" |
| 14 | |
Himanshu Madhani | a520030 | 2013-03-12 09:02:16 +0000 | [diff] [blame] | 15 | #define QLCNIC_83XX_BAR0_LENGTH 0x4000 |
| 16 | |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 17 | /* Directly mapped registers */ |
| 18 | #define QLC_83XX_CRB_WIN_BASE 0x3800 |
| 19 | #define QLC_83XX_CRB_WIN_FUNC(f) (QLC_83XX_CRB_WIN_BASE+((f)*4)) |
| 20 | #define QLC_83XX_SEM_LOCK_BASE 0x3840 |
| 21 | #define QLC_83XX_SEM_UNLOCK_BASE 0x3844 |
| 22 | #define QLC_83XX_SEM_LOCK_FUNC(f) (QLC_83XX_SEM_LOCK_BASE+((f)*8)) |
| 23 | #define QLC_83XX_SEM_UNLOCK_FUNC(f) (QLC_83XX_SEM_UNLOCK_BASE+((f)*8)) |
| 24 | #define QLC_83XX_LINK_STATE(f) (0x3698+((f) > 7 ? 4 : 0)) |
| 25 | #define QLC_83XX_LINK_SPEED(f) (0x36E0+(((f) >> 2) * 4)) |
| 26 | #define QLC_83XX_LINK_SPEED_FACTOR 10 |
| 27 | #define QLC_83xx_FUNC_VAL(v, f) ((v) & (1 << (f * 4))) |
| 28 | #define QLC_83XX_INTX_PTR 0x38C0 |
| 29 | #define QLC_83XX_INTX_TRGR 0x38C4 |
| 30 | #define QLC_83XX_INTX_MASK 0x38C8 |
| 31 | |
| 32 | #define QLC_83XX_DRV_LOCK_WAIT_COUNTER 100 |
| 33 | #define QLC_83XX_DRV_LOCK_WAIT_DELAY 20 |
| 34 | #define QLC_83XX_NEED_DRV_LOCK_RECOVERY 1 |
| 35 | #define QLC_83XX_DRV_LOCK_RECOVERY_IN_PROGRESS 2 |
| 36 | #define QLC_83XX_MAX_DRV_LOCK_RECOVERY_ATTEMPT 3 |
| 37 | #define QLC_83XX_DRV_LOCK_RECOVERY_DELAY 200 |
| 38 | #define QLC_83XX_DRV_LOCK_RECOVERY_STATUS_MASK 0x3 |
| 39 | |
| 40 | #define QLC_83XX_NO_NIC_RESOURCE 0x5 |
| 41 | #define QLC_83XX_MAC_PRESENT 0xC |
| 42 | #define QLC_83XX_MAC_ABSENT 0xD |
| 43 | |
| 44 | |
| 45 | #define QLC_83XX_FLASH_SECTOR_SIZE (64 * 1024) |
| 46 | |
| 47 | /* PEG status definitions */ |
| 48 | #define QLC_83XX_CMDPEG_COMPLETE 0xff01 |
| 49 | #define QLC_83XX_VALID_INTX_BIT30(val) ((val) & BIT_30) |
| 50 | #define QLC_83XX_VALID_INTX_BIT31(val) ((val) & BIT_31) |
| 51 | #define QLC_83XX_INTX_FUNC(val) ((val) & 0xFF) |
| 52 | #define QLC_83XX_LEGACY_INTX_MAX_RETRY 100 |
| 53 | #define QLC_83XX_LEGACY_INTX_DELAY 4 |
| 54 | #define QLC_83XX_REG_DESC 1 |
| 55 | #define QLC_83XX_LRO_DESC 2 |
| 56 | #define QLC_83XX_CTRL_DESC 3 |
| 57 | #define QLC_83XX_FW_CAPABILITY_TSO BIT_6 |
| 58 | #define QLC_83XX_FW_CAP_LRO_MSS BIT_17 |
| 59 | #define QLC_83XX_HOST_RDS_MODE_UNIQUE 0 |
| 60 | #define QLC_83XX_HOST_SDS_MBX_IDX 8 |
| 61 | |
| 62 | #define QLCNIC_HOST_RDS_MBX_IDX 88 |
| 63 | #define QLCNIC_MAX_RING_SETS 8 |
| 64 | |
Sony Chacko | 629263a | 2013-01-01 04:11:55 +0000 | [diff] [blame] | 65 | /* Pause control registers */ |
| 66 | #define QLC_83XX_SRE_SHIM_REG 0x0D200284 |
| 67 | #define QLC_83XX_PORT0_THRESHOLD 0x0B2003A4 |
| 68 | #define QLC_83XX_PORT1_THRESHOLD 0x0B2013A4 |
| 69 | #define QLC_83XX_PORT0_TC_MC_REG 0x0B200388 |
| 70 | #define QLC_83XX_PORT1_TC_MC_REG 0x0B201388 |
| 71 | #define QLC_83XX_PORT0_TC_STATS 0x0B20039C |
| 72 | #define QLC_83XX_PORT1_TC_STATS 0x0B20139C |
| 73 | #define QLC_83XX_PORT2_IFB_THRESHOLD 0x0B200704 |
| 74 | #define QLC_83XX_PORT3_IFB_THRESHOLD 0x0B201704 |
| 75 | |
| 76 | /* Peg PC status registers */ |
| 77 | #define QLC_83XX_CRB_PEG_NET_0 0x3400003c |
| 78 | #define QLC_83XX_CRB_PEG_NET_1 0x3410003c |
| 79 | #define QLC_83XX_CRB_PEG_NET_2 0x3420003c |
| 80 | #define QLC_83XX_CRB_PEG_NET_3 0x3430003c |
| 81 | #define QLC_83XX_CRB_PEG_NET_4 0x34b0003c |
| 82 | |
| 83 | /* Firmware image definitions */ |
| 84 | #define QLC_83XX_BOOTLOADER_FLASH_ADDR 0x10000 |
| 85 | #define QLC_83XX_FW_FILE_NAME "83xx_fw.bin" |
| 86 | #define QLC_83XX_BOOT_FROM_FLASH 0 |
| 87 | #define QLC_83XX_BOOT_FROM_FILE 0x12345678 |
| 88 | |
Sony Chacko | 81d0aeb | 2013-01-01 03:20:25 +0000 | [diff] [blame] | 89 | #define QLC_83XX_MAX_RESET_SEQ_ENTRIES 16 |
| 90 | |
Rajesh Borundia | 7cb03b2 | 2013-03-29 05:46:37 +0000 | [diff] [blame] | 91 | /* status descriptor mailbox data |
| 92 | * @phy_addr_{low|high}: physical address of buffer |
| 93 | * @sds_ring_size: buffer size |
| 94 | * @intrpt_id: interrupt id |
| 95 | * @intrpt_val: source of interrupt |
| 96 | */ |
| 97 | struct qlcnic_sds_mbx { |
| 98 | u32 phy_addr_low; |
| 99 | u32 phy_addr_high; |
| 100 | u32 rsvd1[4]; |
| 101 | #if defined(__LITTLE_ENDIAN) |
| 102 | u16 sds_ring_size; |
| 103 | u16 rsvd2; |
| 104 | u16 rsvd3[2]; |
| 105 | u16 intrpt_id; |
| 106 | u8 intrpt_val; |
| 107 | u8 rsvd4; |
| 108 | #elif defined(__BIG_ENDIAN) |
| 109 | u16 rsvd2; |
| 110 | u16 sds_ring_size; |
| 111 | u16 rsvd3[2]; |
| 112 | u8 rsvd4; |
| 113 | u8 intrpt_val; |
| 114 | u16 intrpt_id; |
| 115 | #endif |
| 116 | u32 rsvd5; |
| 117 | } __packed; |
| 118 | |
| 119 | /* receive descriptor buffer data |
| 120 | * phy_addr_reg_{low|high}: physical address of regular buffer |
| 121 | * phy_addr_jmb_{low|high}: physical address of jumbo buffer |
| 122 | * reg_ring_sz: size of regular buffer |
| 123 | * reg_ring_len: no. of entries in regular buffer |
| 124 | * jmb_ring_len: no. of entries in jumbo buffer |
| 125 | * jmb_ring_sz: size of jumbo buffer |
| 126 | */ |
| 127 | struct qlcnic_rds_mbx { |
| 128 | u32 phy_addr_reg_low; |
| 129 | u32 phy_addr_reg_high; |
| 130 | u32 phy_addr_jmb_low; |
| 131 | u32 phy_addr_jmb_high; |
| 132 | #if defined(__LITTLE_ENDIAN) |
| 133 | u16 reg_ring_sz; |
| 134 | u16 reg_ring_len; |
| 135 | u16 jmb_ring_sz; |
| 136 | u16 jmb_ring_len; |
| 137 | #elif defined(__BIG_ENDIAN) |
| 138 | u16 reg_ring_len; |
| 139 | u16 reg_ring_sz; |
| 140 | u16 jmb_ring_len; |
| 141 | u16 jmb_ring_sz; |
| 142 | #endif |
| 143 | } __packed; |
| 144 | |
| 145 | /* host producers for regular and jumbo rings */ |
| 146 | struct __host_producer_mbx { |
| 147 | u32 reg_buf; |
| 148 | u32 jmb_buf; |
| 149 | } __packed; |
| 150 | |
| 151 | /* Receive context mailbox data outbox registers |
| 152 | * @state: state of the context |
| 153 | * @vport_id: virtual port id |
| 154 | * @context_id: receive context id |
| 155 | * @num_pci_func: number of pci functions of the port |
| 156 | * @phy_port: physical port id |
| 157 | */ |
| 158 | struct qlcnic_rcv_mbx_out { |
| 159 | #if defined(__LITTLE_ENDIAN) |
| 160 | u8 rcv_num; |
| 161 | u8 sts_num; |
| 162 | u16 ctx_id; |
| 163 | u8 state; |
| 164 | u8 num_pci_func; |
| 165 | u8 phy_port; |
| 166 | u8 vport_id; |
| 167 | #elif defined(__BIG_ENDIAN) |
| 168 | u16 ctx_id; |
| 169 | u8 sts_num; |
| 170 | u8 rcv_num; |
| 171 | u8 vport_id; |
| 172 | u8 phy_port; |
| 173 | u8 num_pci_func; |
| 174 | u8 state; |
| 175 | #endif |
| 176 | u32 host_csmr[QLCNIC_MAX_RING_SETS]; |
| 177 | struct __host_producer_mbx host_prod[QLCNIC_MAX_RING_SETS]; |
| 178 | } __packed; |
| 179 | |
| 180 | struct qlcnic_add_rings_mbx_out { |
| 181 | #if defined(__LITTLE_ENDIAN) |
| 182 | u8 rcv_num; |
| 183 | u8 sts_num; |
| 184 | u16 ctx_id; |
| 185 | #elif defined(__BIG_ENDIAN) |
| 186 | u16 ctx_id; |
| 187 | u8 sts_num; |
| 188 | u8 rcv_num; |
| 189 | #endif |
| 190 | u32 host_csmr[QLCNIC_MAX_RING_SETS]; |
| 191 | struct __host_producer_mbx host_prod[QLCNIC_MAX_RING_SETS]; |
| 192 | } __packed; |
| 193 | |
| 194 | /* Transmit context mailbox inbox registers |
| 195 | * @phys_addr_{low|high}: DMA address of the transmit buffer |
| 196 | * @cnsmr_index_{low|high}: host consumer index |
| 197 | * @size: legth of transmit buffer ring |
| 198 | * @intr_id: interrput id |
| 199 | * @src: src of interrupt |
| 200 | */ |
| 201 | struct qlcnic_tx_mbx { |
| 202 | u32 phys_addr_low; |
| 203 | u32 phys_addr_high; |
| 204 | u32 cnsmr_index_low; |
| 205 | u32 cnsmr_index_high; |
| 206 | #if defined(__LITTLE_ENDIAN) |
| 207 | u16 size; |
| 208 | u16 intr_id; |
| 209 | u8 src; |
| 210 | u8 rsvd[3]; |
| 211 | #elif defined(__BIG_ENDIAN) |
| 212 | u16 intr_id; |
| 213 | u16 size; |
| 214 | u8 rsvd[3]; |
| 215 | u8 src; |
| 216 | #endif |
| 217 | } __packed; |
| 218 | |
| 219 | /* Transmit context mailbox outbox registers |
| 220 | * @host_prod: host producer index |
| 221 | * @ctx_id: transmit context id |
| 222 | * @state: state of the transmit context |
| 223 | */ |
| 224 | |
| 225 | struct qlcnic_tx_mbx_out { |
| 226 | u32 host_prod; |
| 227 | #if defined(__LITTLE_ENDIAN) |
| 228 | u16 ctx_id; |
| 229 | u8 state; |
| 230 | u8 rsvd; |
| 231 | #elif defined(__BIG_ENDIAN) |
| 232 | u8 rsvd; |
| 233 | u8 state; |
| 234 | u16 ctx_id; |
| 235 | #endif |
| 236 | } __packed; |
| 237 | |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 238 | struct qlcnic_intrpt_config { |
| 239 | u8 type; |
| 240 | u8 enabled; |
| 241 | u16 id; |
| 242 | u32 src; |
| 243 | }; |
| 244 | |
| 245 | struct qlcnic_macvlan_mbx { |
Shahed Shaikh | a96227e | 2013-03-08 09:53:49 +0000 | [diff] [blame] | 246 | #if defined(__LITTLE_ENDIAN) |
| 247 | u8 mac_addr0; |
| 248 | u8 mac_addr1; |
| 249 | u8 mac_addr2; |
| 250 | u8 mac_addr3; |
| 251 | u8 mac_addr4; |
| 252 | u8 mac_addr5; |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 253 | u16 vlan; |
Shahed Shaikh | a96227e | 2013-03-08 09:53:49 +0000 | [diff] [blame] | 254 | #elif defined(__BIG_ENDIAN) |
| 255 | u8 mac_addr3; |
| 256 | u8 mac_addr2; |
| 257 | u8 mac_addr1; |
| 258 | u8 mac_addr0; |
| 259 | u16 vlan; |
| 260 | u8 mac_addr5; |
| 261 | u8 mac_addr4; |
| 262 | #endif |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 263 | }; |
| 264 | |
Sony Chacko | 629263a | 2013-01-01 04:11:55 +0000 | [diff] [blame] | 265 | struct qlc_83xx_fw_info { |
| 266 | const struct firmware *fw; |
| 267 | u16 major_fw_version; |
| 268 | u8 minor_fw_version; |
| 269 | u8 sub_fw_version; |
| 270 | u8 fw_build_num; |
| 271 | u8 load_from_file; |
| 272 | }; |
| 273 | |
Sony Chacko | 81d0aeb | 2013-01-01 03:20:25 +0000 | [diff] [blame] | 274 | struct qlc_83xx_reset { |
| 275 | struct qlc_83xx_reset_hdr *hdr; |
| 276 | int seq_index; |
| 277 | int seq_error; |
| 278 | int array_index; |
| 279 | u32 array[QLC_83XX_MAX_RESET_SEQ_ENTRIES]; |
| 280 | u8 *buff; |
| 281 | u8 *stop_offset; |
| 282 | u8 *start_offset; |
| 283 | u8 *init_offset; |
| 284 | u8 seq_end; |
| 285 | u8 template_end; |
| 286 | }; |
| 287 | |
Sony Chacko | 629263a | 2013-01-01 04:11:55 +0000 | [diff] [blame] | 288 | #define QLC_83XX_IDC_DISABLE_FW_RESET_RECOVERY 0x1 |
| 289 | #define QLC_83XX_IDC_GRACEFULL_RESET 0x2 |
| 290 | #define QLC_83XX_IDC_TIMESTAMP 0 |
| 291 | #define QLC_83XX_IDC_DURATION 1 |
| 292 | #define QLC_83XX_IDC_INIT_TIMEOUT_SECS 30 |
| 293 | #define QLC_83XX_IDC_RESET_ACK_TIMEOUT_SECS 10 |
| 294 | #define QLC_83XX_IDC_RESET_TIMEOUT_SECS 10 |
| 295 | #define QLC_83XX_IDC_QUIESCE_ACK_TIMEOUT_SECS 20 |
| 296 | #define QLC_83XX_IDC_FW_POLL_DELAY (1 * HZ) |
| 297 | #define QLC_83XX_IDC_FW_FAIL_THRESH 2 |
| 298 | #define QLC_83XX_IDC_MAX_FUNC_PER_PARTITION_INFO 8 |
| 299 | #define QLC_83XX_IDC_MAX_CNA_FUNCTIONS 16 |
| 300 | #define QLC_83XX_IDC_MAJOR_VERSION 1 |
| 301 | #define QLC_83XX_IDC_MINOR_VERSION 0 |
| 302 | #define QLC_83XX_IDC_FLASH_PARAM_ADDR 0x3e8020 |
| 303 | |
Sony Chacko | 629263a | 2013-01-01 04:11:55 +0000 | [diff] [blame] | 304 | struct qlcnic_adapter; |
| 305 | struct qlc_83xx_idc { |
| 306 | int (*state_entry) (struct qlcnic_adapter *); |
| 307 | u64 sec_counter; |
| 308 | u64 delay; |
| 309 | unsigned long status; |
| 310 | int err_code; |
| 311 | int collect_dump; |
| 312 | u8 curr_state; |
| 313 | u8 prev_state; |
| 314 | u8 vnic_state; |
| 315 | u8 vnic_wait_limit; |
| 316 | u8 quiesce_req; |
| 317 | char **name; |
| 318 | }; |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 319 | |
Rajesh Borundia | f036e4f | 2013-04-19 07:01:10 +0000 | [diff] [blame^] | 320 | /* Device States */ |
| 321 | enum qlcnic_83xx_states { |
| 322 | QLC_83XX_IDC_DEV_UNKNOWN, |
| 323 | QLC_83XX_IDC_DEV_COLD, |
| 324 | QLC_83XX_IDC_DEV_INIT, |
| 325 | QLC_83XX_IDC_DEV_READY, |
| 326 | QLC_83XX_IDC_DEV_NEED_RESET, |
| 327 | QLC_83XX_IDC_DEV_NEED_QUISCENT, |
| 328 | QLC_83XX_IDC_DEV_FAILED, |
| 329 | QLC_83XX_IDC_DEV_QUISCENT |
| 330 | }; |
| 331 | |
Jitendra Kalsaria | 483202d | 2013-02-09 09:29:50 +0000 | [diff] [blame] | 332 | #define QLCNIC_MBX_RSP(reg) LSW(reg) |
| 333 | #define QLCNIC_MBX_NUM_REGS(reg) (MSW(reg) & 0x1FF) |
| 334 | #define QLCNIC_MBX_STATUS(reg) (((reg) >> 25) & 0x7F) |
| 335 | #define QLCNIC_MBX_HOST(ahw, i) ((ahw)->pci_base0 + ((i) * 4)) |
| 336 | #define QLCNIC_MBX_FW(ahw, i) ((ahw)->pci_base0 + 0x800 + ((i) * 4)) |
| 337 | |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 338 | /* Mailbox process AEN count */ |
| 339 | #define QLC_83XX_IDC_COMP_AEN 3 |
| 340 | #define QLC_83XX_MBX_AEN_CNT 5 |
| 341 | #define QLC_83XX_MODULE_LOADED 1 |
| 342 | #define QLC_83XX_MBX_READY 2 |
| 343 | #define QLC_83XX_MBX_AEN_ACK 3 |
| 344 | #define QLC_83XX_SFP_PRESENT(data) ((data) & 3) |
| 345 | #define QLC_83XX_SFP_ERR(data) (((data) >> 2) & 3) |
| 346 | #define QLC_83XX_SFP_MODULE_TYPE(data) (((data) >> 4) & 0x1F) |
| 347 | #define QLC_83XX_SFP_CU_LENGTH(data) (LSB((data) >> 16)) |
| 348 | #define QLC_83XX_SFP_TX_FAULT(data) ((data) & BIT_10) |
| 349 | #define QLC_83XX_SFP_10G_CAPABLE(data) ((data) & BIT_11) |
| 350 | #define QLC_83XX_LINK_STATS(data) ((data) & BIT_0) |
| 351 | #define QLC_83XX_CURRENT_LINK_SPEED(data) (((data) >> 3) & 7) |
| 352 | #define QLC_83XX_LINK_PAUSE(data) (((data) >> 6) & 3) |
| 353 | #define QLC_83XX_LINK_LB(data) (((data) >> 8) & 7) |
| 354 | #define QLC_83XX_LINK_FEC(data) ((data) & BIT_12) |
| 355 | #define QLC_83XX_LINK_EEE(data) ((data) & BIT_13) |
| 356 | #define QLC_83XX_DCBX(data) (((data) >> 28) & 7) |
| 357 | #define QLC_83XX_AUTONEG(data) ((data) & BIT_15) |
| 358 | #define QLC_83XX_CFG_STD_PAUSE (1 << 5) |
| 359 | #define QLC_83XX_CFG_STD_TX_PAUSE (1 << 20) |
| 360 | #define QLC_83XX_CFG_STD_RX_PAUSE (2 << 20) |
| 361 | #define QLC_83XX_CFG_STD_TX_RX_PAUSE (3 << 20) |
| 362 | #define QLC_83XX_ENABLE_AUTONEG (1 << 15) |
| 363 | #define QLC_83XX_CFG_LOOPBACK_HSS (2 << 1) |
| 364 | #define QLC_83XX_CFG_LOOPBACK_PHY (3 << 1) |
| 365 | #define QLC_83XX_CFG_LOOPBACK_EXT (4 << 1) |
| 366 | |
| 367 | /* LED configuration settings */ |
| 368 | #define QLC_83XX_ENABLE_BEACON 0xe |
| 369 | #define QLC_83XX_LED_RATE 0xff |
| 370 | #define QLC_83XX_LED_ACT (1 << 10) |
| 371 | #define QLC_83XX_LED_MOD (0 << 13) |
| 372 | #define QLC_83XX_LED_CONFIG (QLC_83XX_LED_RATE | QLC_83XX_LED_ACT | \ |
| 373 | QLC_83XX_LED_MOD) |
| 374 | |
| 375 | #define QLC_83XX_10M_LINK 1 |
| 376 | #define QLC_83XX_100M_LINK 2 |
| 377 | #define QLC_83XX_1G_LINK 3 |
| 378 | #define QLC_83XX_10G_LINK 4 |
| 379 | #define QLC_83XX_STAT_TX 3 |
| 380 | #define QLC_83XX_STAT_RX 2 |
| 381 | #define QLC_83XX_STAT_MAC 1 |
| 382 | #define QLC_83XX_TX_STAT_REGS 14 |
| 383 | #define QLC_83XX_RX_STAT_REGS 40 |
| 384 | #define QLC_83XX_MAC_STAT_REGS 80 |
| 385 | |
| 386 | #define QLC_83XX_GET_FUNC_PRIVILEGE(VAL, FN) (0x3 & ((VAL) >> (FN * 2))) |
| 387 | #define QLC_83XX_SET_FUNC_OPMODE(VAL, FN) ((VAL) << (FN * 2)) |
| 388 | #define QLC_83XX_DEFAULT_OPMODE 0x55555555 |
| 389 | #define QLC_83XX_PRIVLEGED_FUNC 0x1 |
| 390 | #define QLC_83XX_VIRTUAL_FUNC 0x2 |
| 391 | |
| 392 | #define QLC_83XX_LB_MAX_FILTERS 2048 |
| 393 | #define QLC_83XX_LB_BUCKET_SIZE 256 |
| 394 | #define QLC_83XX_MINIMUM_VECTOR 3 |
| 395 | |
| 396 | #define QLC_83XX_GET_FUNC_MODE_FROM_NPAR_INFO(val) (val & 0x80000000) |
| 397 | #define QLC_83XX_GET_LRO_CAPABILITY(val) (val & 0x20) |
| 398 | #define QLC_83XX_GET_LSO_CAPABILITY(val) (val & 0x40) |
| 399 | #define QLC_83XX_GET_LSO_CAPABILITY(val) (val & 0x40) |
| 400 | #define QLC_83XX_GET_HW_LRO_CAPABILITY(val) (val & 0x400) |
| 401 | #define QLC_83XX_GET_VLAN_ALIGN_CAPABILITY(val) (val & 0x4000) |
Shahed Shaikh | 99e8587 | 2013-02-18 12:06:16 +0000 | [diff] [blame] | 402 | #define QLC_83XX_GET_FW_LRO_MSS_CAPABILITY(val) (val & 0x20000) |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 403 | #define QLC_83XX_VIRTUAL_NIC_MODE 0xFF |
| 404 | #define QLC_83XX_DEFAULT_MODE 0x0 |
Rajesh Borundia | 02feda1 | 2013-03-29 05:46:33 +0000 | [diff] [blame] | 405 | #define QLC_83XX_SRIOV_MODE 0x1 |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 406 | #define QLCNIC_BRDTYPE_83XX_10G 0x0083 |
| 407 | |
Sony Chacko | d865ebb | 2013-01-01 03:20:23 +0000 | [diff] [blame] | 408 | #define QLC_83XX_FLASH_SPI_STATUS 0x2808E010 |
| 409 | #define QLC_83XX_FLASH_SPI_CONTROL 0x2808E014 |
| 410 | #define QLC_83XX_FLASH_STATUS 0x42100004 |
| 411 | #define QLC_83XX_FLASH_CONTROL 0x42110004 |
| 412 | #define QLC_83XX_FLASH_ADDR 0x42110008 |
| 413 | #define QLC_83XX_FLASH_WRDATA 0x4211000C |
| 414 | #define QLC_83XX_FLASH_RDDATA 0x42110018 |
| 415 | #define QLC_83XX_FLASH_DIRECT_WINDOW 0x42110030 |
| 416 | #define QLC_83XX_FLASH_DIRECT_DATA(DATA) (0x42150000 | (0x0000FFFF&DATA)) |
| 417 | #define QLC_83XX_FLASH_SECTOR_ERASE_CMD 0xdeadbeef |
| 418 | #define QLC_83XX_FLASH_WRITE_CMD 0xdacdacda |
| 419 | #define QLC_83XX_FLASH_BULK_WRITE_CMD 0xcadcadca |
| 420 | #define QLC_83XX_FLASH_READ_RETRY_COUNT 5000 |
| 421 | #define QLC_83XX_FLASH_STATUS_READY 0x6 |
Himanshu Madhani | a520030 | 2013-03-12 09:02:16 +0000 | [diff] [blame] | 422 | #define QLC_83XX_FLASH_WRITE_MIN 2 |
| 423 | #define QLC_83XX_FLASH_WRITE_MAX 64 |
Sony Chacko | d865ebb | 2013-01-01 03:20:23 +0000 | [diff] [blame] | 424 | #define QLC_83XX_FLASH_STATUS_REG_POLL_DELAY 1 |
| 425 | #define QLC_83XX_ERASE_MODE 1 |
| 426 | #define QLC_83XX_WRITE_MODE 2 |
| 427 | #define QLC_83XX_BULK_WRITE_MODE 3 |
| 428 | #define QLC_83XX_FLASH_FDT_WRITE_DEF_SIG 0xFD0100 |
| 429 | #define QLC_83XX_FLASH_FDT_ERASE_DEF_SIG 0xFD0300 |
| 430 | #define QLC_83XX_FLASH_FDT_READ_MFG_ID_VAL 0xFD009F |
| 431 | #define QLC_83XX_FLASH_OEM_ERASE_SIG 0xFD03D8 |
| 432 | #define QLC_83XX_FLASH_OEM_WRITE_SIG 0xFD0101 |
| 433 | #define QLC_83XX_FLASH_OEM_READ_SIG 0xFD0005 |
| 434 | #define QLC_83XX_FLASH_ADDR_TEMP_VAL 0x00800000 |
| 435 | #define QLC_83XX_FLASH_ADDR_SECOND_TEMP_VAL 0x00800001 |
| 436 | #define QLC_83XX_FLASH_WRDATA_DEF 0x0 |
| 437 | #define QLC_83XX_FLASH_READ_CTRL 0x3F |
| 438 | #define QLC_83XX_FLASH_SPI_CTRL 0x4 |
| 439 | #define QLC_83XX_FLASH_FIRST_ERASE_MS_VAL 0x2 |
| 440 | #define QLC_83XX_FLASH_SECOND_ERASE_MS_VAL 0x5 |
| 441 | #define QLC_83XX_FLASH_LAST_ERASE_MS_VAL 0x3D |
| 442 | #define QLC_83XX_FLASH_FIRST_MS_PATTERN 0x43 |
| 443 | #define QLC_83XX_FLASH_SECOND_MS_PATTERN 0x7F |
| 444 | #define QLC_83XX_FLASH_LAST_MS_PATTERN 0x7D |
| 445 | #define QLC_83xx_FLASH_MAX_WAIT_USEC 100 |
| 446 | #define QLC_83XX_FLASH_LOCK_TIMEOUT 10000 |
| 447 | |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 448 | /* Additional registers in 83xx */ |
| 449 | enum qlc_83xx_ext_regs { |
| 450 | QLCNIC_GLOBAL_RESET = 0, |
| 451 | QLCNIC_WILDCARD, |
| 452 | QLCNIC_INFORMANT, |
| 453 | QLCNIC_HOST_MBX_CTRL, |
| 454 | QLCNIC_FW_MBX_CTRL, |
| 455 | QLCNIC_BOOTLOADER_ADDR, |
| 456 | QLCNIC_BOOTLOADER_SIZE, |
| 457 | QLCNIC_FW_IMAGE_ADDR, |
| 458 | QLCNIC_MBX_INTR_ENBL, |
| 459 | QLCNIC_DEF_INT_MASK, |
| 460 | QLCNIC_DEF_INT_ID, |
| 461 | QLC_83XX_IDC_MAJ_VERSION, |
| 462 | QLC_83XX_IDC_DEV_STATE, |
| 463 | QLC_83XX_IDC_DRV_PRESENCE, |
| 464 | QLC_83XX_IDC_DRV_ACK, |
| 465 | QLC_83XX_IDC_CTRL, |
| 466 | QLC_83XX_IDC_DRV_AUDIT, |
| 467 | QLC_83XX_IDC_MIN_VERSION, |
| 468 | QLC_83XX_RECOVER_DRV_LOCK, |
| 469 | QLC_83XX_IDC_PF_0, |
| 470 | QLC_83XX_IDC_PF_1, |
| 471 | QLC_83XX_IDC_PF_2, |
| 472 | QLC_83XX_IDC_PF_3, |
| 473 | QLC_83XX_IDC_PF_4, |
| 474 | QLC_83XX_IDC_PF_5, |
| 475 | QLC_83XX_IDC_PF_6, |
| 476 | QLC_83XX_IDC_PF_7, |
| 477 | QLC_83XX_IDC_PF_8, |
| 478 | QLC_83XX_IDC_PF_9, |
| 479 | QLC_83XX_IDC_PF_10, |
| 480 | QLC_83XX_IDC_PF_11, |
| 481 | QLC_83XX_IDC_PF_12, |
| 482 | QLC_83XX_IDC_PF_13, |
| 483 | QLC_83XX_IDC_PF_14, |
| 484 | QLC_83XX_IDC_PF_15, |
| 485 | QLC_83XX_IDC_DEV_PARTITION_INFO_1, |
| 486 | QLC_83XX_IDC_DEV_PARTITION_INFO_2, |
| 487 | QLC_83XX_DRV_OP_MODE, |
| 488 | QLC_83XX_VNIC_STATE, |
| 489 | QLC_83XX_DRV_LOCK, |
| 490 | QLC_83XX_DRV_UNLOCK, |
| 491 | QLC_83XX_DRV_LOCK_ID, |
| 492 | QLC_83XX_ASIC_TEMP, |
| 493 | }; |
| 494 | |
| 495 | /* 83xx funcitons */ |
| 496 | int qlcnic_83xx_get_fw_version(struct qlcnic_adapter *); |
| 497 | int qlcnic_83xx_mbx_op(struct qlcnic_adapter *, struct qlcnic_cmd_args *); |
| 498 | int qlcnic_83xx_setup_intr(struct qlcnic_adapter *, u8); |
| 499 | void qlcnic_83xx_get_func_no(struct qlcnic_adapter *); |
| 500 | int qlcnic_83xx_cam_lock(struct qlcnic_adapter *); |
| 501 | void qlcnic_83xx_cam_unlock(struct qlcnic_adapter *); |
| 502 | int qlcnic_send_ctrl_op(struct qlcnic_adapter *, struct qlcnic_cmd_args *, u32); |
Sony Chacko | 319ecf1 | 2013-01-01 03:20:22 +0000 | [diff] [blame] | 503 | void qlcnic_83xx_add_sysfs(struct qlcnic_adapter *); |
| 504 | void qlcnic_83xx_remove_sysfs(struct qlcnic_adapter *); |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 505 | void qlcnic_83xx_write_crb(struct qlcnic_adapter *, char *, loff_t, size_t); |
| 506 | void qlcnic_83xx_read_crb(struct qlcnic_adapter *, char *, loff_t, size_t); |
| 507 | int qlcnic_83xx_rd_reg_indirect(struct qlcnic_adapter *, ulong); |
| 508 | int qlcnic_83xx_wrt_reg_indirect(struct qlcnic_adapter *, ulong, u32); |
Sony Chacko | 4be41e9 | 2013-01-01 03:20:20 +0000 | [diff] [blame] | 509 | void qlcnic_83xx_process_rcv_diag(struct qlcnic_adapter *, int, u64 []); |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 510 | int qlcnic_83xx_nic_set_promisc(struct qlcnic_adapter *, u32); |
| 511 | int qlcnic_83xx_set_lb_mode(struct qlcnic_adapter *, u8); |
| 512 | int qlcnic_83xx_clear_lb_mode(struct qlcnic_adapter *, u8); |
| 513 | int qlcnic_83xx_config_hw_lro(struct qlcnic_adapter *, int); |
| 514 | int qlcnic_83xx_config_rss(struct qlcnic_adapter *, int); |
| 515 | int qlcnic_83xx_config_intr_coalesce(struct qlcnic_adapter *); |
Rajesh Borundia | f80bc8f | 2013-04-19 07:01:08 +0000 | [diff] [blame] | 516 | void qlcnic_83xx_change_l2_filter(struct qlcnic_adapter *, u64 *, u16); |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 517 | int qlcnic_83xx_get_pci_info(struct qlcnic_adapter *, struct qlcnic_pci_info *); |
| 518 | int qlcnic_83xx_set_nic_info(struct qlcnic_adapter *, struct qlcnic_info *); |
| 519 | void qlcnic_83xx_register_nic_idc_func(struct qlcnic_adapter *, int); |
| 520 | |
Sony Chacko | 4be41e9 | 2013-01-01 03:20:20 +0000 | [diff] [blame] | 521 | int qlcnic_83xx_napi_add(struct qlcnic_adapter *, struct net_device *); |
| 522 | void qlcnic_83xx_napi_del(struct qlcnic_adapter *); |
| 523 | void qlcnic_83xx_napi_enable(struct qlcnic_adapter *); |
| 524 | void qlcnic_83xx_napi_disable(struct qlcnic_adapter *); |
Sony Chacko | 319ecf1 | 2013-01-01 03:20:22 +0000 | [diff] [blame] | 525 | int qlcnic_83xx_config_led(struct qlcnic_adapter *, u32, u32); |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 526 | void qlcnic_ind_wr(struct qlcnic_adapter *, u32, u32); |
| 527 | int qlcnic_ind_rd(struct qlcnic_adapter *, u32); |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 528 | int qlcnic_83xx_create_rx_ctx(struct qlcnic_adapter *); |
| 529 | int qlcnic_83xx_create_tx_ctx(struct qlcnic_adapter *, |
| 530 | struct qlcnic_host_tx_ring *, int); |
Rajesh Borundia | 7cb03b2 | 2013-03-29 05:46:37 +0000 | [diff] [blame] | 531 | void qlcnic_83xx_del_rx_ctx(struct qlcnic_adapter *); |
| 532 | void qlcnic_83xx_del_tx_ctx(struct qlcnic_adapter *, |
| 533 | struct qlcnic_host_tx_ring *); |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 534 | int qlcnic_83xx_get_nic_info(struct qlcnic_adapter *, struct qlcnic_info *, u8); |
| 535 | int qlcnic_83xx_setup_link_event(struct qlcnic_adapter *, int); |
| 536 | void qlcnic_83xx_process_rcv_ring_diag(struct qlcnic_host_sds_ring *); |
| 537 | int qlcnic_83xx_config_intrpt(struct qlcnic_adapter *, bool); |
Rajesh Borundia | f80bc8f | 2013-04-19 07:01:08 +0000 | [diff] [blame] | 538 | int qlcnic_83xx_sre_macaddr_change(struct qlcnic_adapter *, u8 *, u16, u8); |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 539 | int qlcnic_83xx_get_mac_address(struct qlcnic_adapter *, u8 *); |
| 540 | void qlcnic_83xx_configure_mac(struct qlcnic_adapter *, u8 *, u8, |
| 541 | struct qlcnic_cmd_args *); |
| 542 | int qlcnic_83xx_alloc_mbx_args(struct qlcnic_cmd_args *, |
| 543 | struct qlcnic_adapter *, u32); |
| 544 | void qlcnic_free_mbx_args(struct qlcnic_cmd_args *); |
| 545 | void qlcnic_set_npar_data(struct qlcnic_adapter *, const struct qlcnic_info *, |
| 546 | struct qlcnic_info *); |
| 547 | void qlcnic_83xx_config_intr_coal(struct qlcnic_adapter *); |
| 548 | irqreturn_t qlcnic_83xx_handle_aen(int, void *); |
| 549 | int qlcnic_83xx_get_port_info(struct qlcnic_adapter *); |
| 550 | void qlcnic_83xx_enable_mbx_intrpt(struct qlcnic_adapter *); |
Rajesh Borundia | f036e4f | 2013-04-19 07:01:10 +0000 | [diff] [blame^] | 551 | void qlcnic_83xx_disable_mbx_intr(struct qlcnic_adapter *); |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 552 | irqreturn_t qlcnic_83xx_clear_legacy_intr(struct qlcnic_adapter *); |
Himanshu Madhani | ac16670 | 2013-02-18 12:06:15 +0000 | [diff] [blame] | 553 | irqreturn_t qlcnic_83xx_intr(int, void *); |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 554 | irqreturn_t qlcnic_83xx_tmp_intr(int, void *); |
| 555 | void qlcnic_83xx_enable_intr(struct qlcnic_adapter *, |
| 556 | struct qlcnic_host_sds_ring *); |
Himanshu Madhani | ac16670 | 2013-02-18 12:06:15 +0000 | [diff] [blame] | 557 | void qlcnic_83xx_disable_intr(struct qlcnic_adapter *, |
| 558 | struct qlcnic_host_sds_ring *); |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 559 | void qlcnic_83xx_check_vf(struct qlcnic_adapter *, |
| 560 | const struct pci_device_id *); |
| 561 | void qlcnic_83xx_process_aen(struct qlcnic_adapter *); |
| 562 | int qlcnic_83xx_get_port_config(struct qlcnic_adapter *); |
| 563 | int qlcnic_83xx_set_port_config(struct qlcnic_adapter *); |
| 564 | int qlcnic_enable_eswitch(struct qlcnic_adapter *, u8, u8); |
| 565 | int qlcnic_83xx_get_nic_configuration(struct qlcnic_adapter *); |
| 566 | int qlcnic_83xx_config_default_opmode(struct qlcnic_adapter *); |
| 567 | int qlcnic_83xx_setup_mbx_intr(struct qlcnic_adapter *); |
| 568 | void qlcnic_83xx_free_mbx_intr(struct qlcnic_adapter *); |
| 569 | void qlcnic_83xx_register_map(struct qlcnic_hardware_context *); |
| 570 | void qlcnic_83xx_idc_aen_work(struct work_struct *); |
| 571 | void qlcnic_83xx_config_ipaddr(struct qlcnic_adapter *, __be32, int); |
Sony Chacko | d865ebb | 2013-01-01 03:20:23 +0000 | [diff] [blame] | 572 | |
| 573 | int qlcnic_83xx_erase_flash_sector(struct qlcnic_adapter *, u32); |
| 574 | int qlcnic_83xx_flash_bulk_write(struct qlcnic_adapter *, u32, u32 *, int); |
| 575 | int qlcnic_83xx_flash_write32(struct qlcnic_adapter *, u32, u32 *); |
| 576 | int qlcnic_83xx_lock_flash(struct qlcnic_adapter *); |
| 577 | void qlcnic_83xx_unlock_flash(struct qlcnic_adapter *); |
| 578 | int qlcnic_83xx_save_flash_status(struct qlcnic_adapter *); |
| 579 | int qlcnic_83xx_restore_flash_status(struct qlcnic_adapter *, int); |
| 580 | int qlcnic_83xx_read_flash_mfg_id(struct qlcnic_adapter *); |
| 581 | int qlcnic_83xx_read_flash_descriptor_table(struct qlcnic_adapter *); |
Sony Chacko | 629263a | 2013-01-01 04:11:55 +0000 | [diff] [blame] | 582 | int qlcnic_83xx_flash_read32(struct qlcnic_adapter *, u32, u8 *, int); |
| 583 | int qlcnic_83xx_lockless_flash_read32(struct qlcnic_adapter *, |
| 584 | u32, u8 *, int); |
Rajesh Borundia | f846833 | 2013-03-29 05:46:34 +0000 | [diff] [blame] | 585 | int qlcnic_83xx_init(struct qlcnic_adapter *, int); |
Sony Chacko | 629263a | 2013-01-01 04:11:55 +0000 | [diff] [blame] | 586 | int qlcnic_83xx_idc_ready_state_entry(struct qlcnic_adapter *); |
| 587 | int qlcnic_83xx_check_hw_status(struct qlcnic_adapter *p_dev); |
| 588 | void qlcnic_83xx_idc_poll_dev_state(struct work_struct *); |
Sony Chacko | 81d0aeb | 2013-01-01 03:20:25 +0000 | [diff] [blame] | 589 | int qlcnic_83xx_get_reset_instruction_template(struct qlcnic_adapter *); |
Sony Chacko | 629263a | 2013-01-01 04:11:55 +0000 | [diff] [blame] | 590 | void qlcnic_83xx_idc_exit(struct qlcnic_adapter *); |
| 591 | void qlcnic_83xx_idc_request_reset(struct qlcnic_adapter *, u32); |
| 592 | int qlcnic_83xx_lock_driver(struct qlcnic_adapter *); |
| 593 | void qlcnic_83xx_unlock_driver(struct qlcnic_adapter *); |
| 594 | int qlcnic_83xx_set_default_offload_settings(struct qlcnic_adapter *); |
| 595 | int qlcnic_83xx_ms_mem_write128(struct qlcnic_adapter *, u64, u32 *, u32); |
Sony Chacko | d71170f | 2013-01-01 03:20:26 +0000 | [diff] [blame] | 596 | int qlcnic_83xx_idc_vnic_pf_entry(struct qlcnic_adapter *); |
| 597 | int qlcnic_83xx_enable_vnic_mode(struct qlcnic_adapter *, int); |
| 598 | int qlcnic_83xx_disable_vnic_mode(struct qlcnic_adapter *, int); |
| 599 | int qlcnic_83xx_config_vnic_opmode(struct qlcnic_adapter *); |
| 600 | int qlcnic_83xx_get_vnic_vport_info(struct qlcnic_adapter *, |
| 601 | struct qlcnic_info *, u8); |
| 602 | int qlcnic_83xx_get_vnic_pf_info(struct qlcnic_adapter *, struct qlcnic_info *); |
Sony Chacko | 4e60ac4 | 2013-01-01 03:20:27 +0000 | [diff] [blame] | 603 | |
| 604 | void qlcnic_83xx_get_minidump_template(struct qlcnic_adapter *); |
Sony Chacko | 7e38d04 | 2013-01-01 03:20:28 +0000 | [diff] [blame] | 605 | void qlcnic_83xx_get_stats(struct qlcnic_adapter *adapter, u64 *data); |
| 606 | int qlcnic_83xx_get_settings(struct qlcnic_adapter *); |
| 607 | int qlcnic_83xx_set_settings(struct qlcnic_adapter *, struct ethtool_cmd *); |
| 608 | void qlcnic_83xx_get_pauseparam(struct qlcnic_adapter *, |
| 609 | struct ethtool_pauseparam *); |
| 610 | int qlcnic_83xx_set_pauseparam(struct qlcnic_adapter *, |
| 611 | struct ethtool_pauseparam *); |
| 612 | int qlcnic_83xx_test_link(struct qlcnic_adapter *); |
| 613 | int qlcnic_83xx_reg_test(struct qlcnic_adapter *); |
| 614 | int qlcnic_83xx_get_regs_len(struct qlcnic_adapter *); |
| 615 | int qlcnic_83xx_get_registers(struct qlcnic_adapter *, u32 *); |
Jitendra Kalsaria | ba4468db | 2013-02-09 09:29:51 +0000 | [diff] [blame] | 616 | int qlcnic_83xx_loopback_test(struct net_device *, u8); |
Jitendra Kalsaria | 58ead41 | 2013-02-09 09:29:52 +0000 | [diff] [blame] | 617 | int qlcnic_83xx_interrupt_test(struct net_device *); |
Himanshu Madhani | d16951d | 2013-03-08 09:53:50 +0000 | [diff] [blame] | 618 | int qlcnic_83xx_set_led(struct net_device *, enum ethtool_phys_id_state); |
Sony Chacko | 7e38d04 | 2013-01-01 03:20:28 +0000 | [diff] [blame] | 619 | int qlcnic_83xx_flash_test(struct qlcnic_adapter *); |
Himanshu Madhani | a520030 | 2013-03-12 09:02:16 +0000 | [diff] [blame] | 620 | int qlcnic_83xx_enable_flash_write(struct qlcnic_adapter *); |
| 621 | int qlcnic_83xx_disable_flash_write(struct qlcnic_adapter *); |
Rajesh Borundia | f197a7a | 2013-03-29 05:46:36 +0000 | [diff] [blame] | 622 | u32 qlcnic_83xx_mac_rcode(struct qlcnic_adapter *); |
| 623 | u32 qlcnic_83xx_mbx_poll(struct qlcnic_adapter *); |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 624 | #endif |