Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm-4.9 / f066f0dcdcb7441b89c6d4264e9cc8c517373726 / . / Documentation / devicetree / bindings / power / supply / qcom / qpnp-qg.txt
blob: 3481b804bbdbc3762a02dd4155aff00d58021626 [file] [log] [blame]
Anirudh Ghayale6b2f4a2018-01-02 19:35:40 +0530[diff] [blame]1Qualcomm Techonologies, Inc. QPNP PMIC QGAUGE (QG) Device
2
3QPNP PMIC QGAUGE device provides the ability to gauge the State-of-Charge
4of the battery. It provides an interface to the clients to read various
5battery related parameters.
6
7=======================
8Required Node Structure
9=======================
10
11Qgauge device must be described in two level of nodes. The first level
12describes the properties of the Qgauge device and the second level
13describes the peripherals managed/used of the module.
14
15====================================
16First Level Node - QGAUGE device
17====================================
18
19- compatible
20 Usage: required
21 Value type: <string>
22 Definition: Should be "qcom,qpnp-qg".
23
24- qcom,pmic-revid
25 Usage: required
26 Value type: <phandle>
27 Definition: Should specify the phandle of PMIC revid module. This is
28 used to identify the PMIC subtype.
29
30- qcom,qg-vadc
31 Usage: required
32 Value type: <phandle>
33 Definition: Phandle for the VADC node, it is used for BATT_ID and
34 BATT_THERM readings.
35
36- qcom,vbatt-empty-mv
37 Usage: optional
38 Value type: <u32>
39 Definition: The battery voltage threshold (in mV) at which the
40 vbatt-empty interrupt fires. The SOC is forced to 0
41 when this interrupt fires. If not specified, the
42 default value is 3200 mV.
43
44- qcom,vbatt-cutoff-mv
45 Usage: optional
46 Value type: <u32>
47 Definition: The battery voltage threshold (in mV) at which the
48 the Qgauge algorithm converges to 0 SOC. If not specified
49 the default value is 3400 mV.
50
51- qcom,vbatt-low-mv
52 Usage: optional
53 Value type: <u32>
54 Definition: The battery voltage threshold (in mV) at which the
55 the VBAT_LOW interrupt fires. Software can take necessary
56 the action when this interrupt fires. If not specified
57 the default value is 3500 mV.
58
59- qcom,qg-iterm-ma
60 Usage: optional
61 Value type: <u32>
62 Definition: The battery current (in mA) at which the the QG algorithm
63 converges the SOC to 100% during charging and can be used to
64 terminate charging. If not specified, the default value is
65 100mA.
66
67- qcom,delta-soc
68 Usage: optional
69 Value type: <u32>
70 Definition: The SOC percentage increase at which the SOC is
71 periodically reported to the userspace. If not specified,
72 the value defaults to 1%.
73
74- qcom,s2-fifo-length
75 Usage: optional
76 Value type: <u32>
77 Definition: The total number if FIFO samples which need to be filled up
78 in S2 state of QG to fire the FIFO DONE interrupt.
79 Minimum value = 1 Maximum Value = 8. If not specified,
80 the default value is 5.
81
82- qcom,s2-acc-length
83 Usage: optional
84 Value type: <u32>
85 Definition: The number of distinct V & I samples to be accumulated
86 in each FIFO in the S2 state of QG.
87 Minimum Value = 0 Maximum Value = 256. If not specified,
88 the default value is 128.
89
90- qcom,s2-acc-interval-ms
91 Usage: optional
92 Value type: <u32>
93 Definition: The time (in ms) between each of the V & I samples being
94 accumulated in FIFO.
95 Minimum Value = 0 ms Maximum Value = 2550 ms. If not
96 specified the default value is 100 ms.
97
98- qcom,ocv-timer-expiry-min
99 Usage: optional
100 Value type: <u32>
101 Definition: The maximum time (in minutes) for the QG to transition from
102 S3 to S2 state.
103 Minimum Value = 2 min Maximum Value = 30 min. If not
104 specified the hardware default is set to 14 min.
105
106- qcom,ocv-tol-threshold-uv
107 Usage: optional
108 Value type: <u32>
109 Definition: The OCV detection error tolerance (in uV). The maximum
110 voltage allowed between 2 VBATT readings in the S3 state
111 to qualify for a valid OCV.
112 Minimum Value = 0 uV Maximum Value = 12262 uV Step = 195 uV
113
114- qcom,s3-entry-fifo-length
115 Usage: optional
116 Value type: <u32>
117 Definition: The minimum number if FIFO samples which have to qualify the
118 S3 IBAT entry threshold (qcom,s3-entry-ibat-ua) for QG
119 to enter into S3 state.
120 Minimum Value = 1 Maximum Value = 8. The hardware default
121 is configured to 3.
122
123- qcom,s3-entry-ibat-ua
124 Usage: optional
125 Value type: <u32>
126 Definition: The battery current (in uA) for the QG to enter into the S3
127 state. The QG algorithm enters into S3 if the battery
128 current is lower than this threshold consecutive for
129 the FIFO length specified in 'qcom,s3-entry-fifo-length'.
130 Minimum Value = 0 uA Maximum Value = 155550 uA
131 Step = 610 uA.
132
133- qcom,s3-exit-ibat-ua
134 Usage: optional
135 Value type: <u32>
136 Definition: The battery current (in uA) for the QG to exit S3 state.
137 If the battery current is higher than this threshold QG
138 exists S3 state.
139 Minimum Value = 0 uA Maximum Value = 155550 uA
140 Step = 610 uA.
141
142- qcom,rbat-conn-mohm
143 Usage: optional
144 Value type: <u32>
145 Definition: Resistance of the battery connectors in mOhms.
146
147==========================================================
148Second Level Nodes - Peripherals managed by QGAUGE driver
149==========================================================
150- reg
151 Usage: required
152 Value type: <prop-encoded-array>
153 Definition: Addresses and sizes for the specified peripheral
154
155- interrupts
156 Usage: optional
157 Value type: <prop-encoded-array>
158 Definition: Interrupt mapping as per the interrupt encoding
159
160- interrupt-names
161 Usage: optional
162 Value type: <stringlist>
163 Definition: Interrupt names. This list must match up 1-to-1 with the
164 interrupts specified in the 'interrupts' property.
165
166========
167Example
168========
169
170pmi632_qg: qpnp,qg {
171 compatible = "qcom,qpnp-qg";
172 qcom,pmic-revid = <&pmi632_revid>;
173 qcom,qg-vadc = <&pmi632_vadc>;
174 qcom,vbatt-empty-mv = <3200>;
175 qcom,vbatt-low-mv = <3500>;
176 qcom,vbatt-cutoff-mv = <3400>;
177 qcom,qg-iterm-ma = <100>;
178
179 qcom,qgauge@4800 {
180 status = "okay";
181 reg = <0x4800 0x100>;
182 interrupts = <0x2 0x48 0x0 IRQ_TYPE_EDGE_BOTH>,
183 <0x2 0x48 0x1 IRQ_TYPE_EDGE_BOTH>,
184 <0x2 0x48 0x2 IRQ_TYPE_EDGE_BOTH>,
185 <0x2 0x48 0x4 IRQ_TYPE_EDGE_BOTH>,
186 <0x2 0x48 0x5 IRQ_TYPE_EDGE_BOTH>,
187 <0x2 0x48 0x6 IRQ_TYPE_EDGE_BOTH>;
188 interrupt-names = "qg-batt-missing",
189 "qg-vbat-low",
190 "qg-vbat-empty",
191 "qg-fifo-done",
192 "qg-good-ocv",
193 "qg-fsm-state-chg",
194 "qg-event";
195 };
196
197 qcom,qg-sdam@b000 {
198 status = "okay";
199 reg = <0xb000 0x100>;
200 };
201};