blob: 2044b5936b7fce0511d571823ec98d6ad706cd3d [file] [log] [blame]
Larry Fingerc592e632012-10-25 13:46:32 -05001/******************************************************************************
2 *
3 * Copyright(c) 2009-2012 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
25 *
26 * Larry Finger <Larry.Finger@lwfinger.net>
27 *
28 *****************************************************************************/
29
30#include "pwrseq.h"
31
32/* Description:
33 * This routine deals with the Power Configuration CMD
34 * parsing for RTL8723/RTL8188E Series IC.
35 * Assumption:
36 * We should follow specific format that was released from HW SD.
37 */
38bool rtl_hal_pwrseqcmdparsing(struct rtl_priv *rtlpriv, u8 cut_version,
39 u8 faversion, u8 interface_type,
40 struct wlan_pwr_cfg pwrcfgcmd[])
41{
42 struct wlan_pwr_cfg cfg_cmd = {0};
43 bool polling_bit = false;
44 u32 ary_idx = 0;
45 u8 value = 0;
46 u32 offset = 0;
47 u32 polling_count = 0;
48 u32 max_polling_cnt = 5000;
49
50 do {
51 cfg_cmd = pwrcfgcmd[ary_idx];
52 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
53 "rtl_hal_pwrseqcmdparsing(): offset(%#x),cut_msk(%#x), famsk(%#x),"
54 "interface_msk(%#x), base(%#x), cmd(%#x), msk(%#x), value(%#x)\n",
55 GET_PWR_CFG_OFFSET(cfg_cmd),
56 GET_PWR_CFG_CUT_MASK(cfg_cmd),
57 GET_PWR_CFG_FAB_MASK(cfg_cmd),
58 GET_PWR_CFG_INTF_MASK(cfg_cmd),
59 GET_PWR_CFG_BASE(cfg_cmd), GET_PWR_CFG_CMD(cfg_cmd),
60 GET_PWR_CFG_MASK(cfg_cmd), GET_PWR_CFG_VALUE(cfg_cmd));
61
62 if ((GET_PWR_CFG_FAB_MASK(cfg_cmd)&faversion) &&
63 (GET_PWR_CFG_CUT_MASK(cfg_cmd)&cut_version) &&
64 (GET_PWR_CFG_INTF_MASK(cfg_cmd)&interface_type)) {
65 switch (GET_PWR_CFG_CMD(cfg_cmd)) {
66 case PWR_CMD_READ:
67 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
68 "rtl_hal_pwrseqcmdparsing(): PWR_CMD_READ\n");
69 break;
70 case PWR_CMD_WRITE:
71 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
72 "rtl_hal_pwrseqcmdparsing(): PWR_CMD_WRITE\n");
73 offset = GET_PWR_CFG_OFFSET(cfg_cmd);
74
75 /*Read the value from system register*/
76 value = rtl_read_byte(rtlpriv, offset);
77 value &= (~(GET_PWR_CFG_MASK(cfg_cmd)));
78 value |= (GET_PWR_CFG_VALUE(cfg_cmd) &
79 GET_PWR_CFG_MASK(cfg_cmd));
80
81 /*Write the value back to sytem register*/
82 rtl_write_byte(rtlpriv, offset, value);
83 break;
84 case PWR_CMD_POLLING:
85 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
86 "rtl_hal_pwrseqcmdparsing(): PWR_CMD_POLLING\n");
87 polling_bit = false;
88 offset = GET_PWR_CFG_OFFSET(cfg_cmd);
89
90 do {
91 value = rtl_read_byte(rtlpriv, offset);
92
93 value &= GET_PWR_CFG_MASK(cfg_cmd);
94 if (value ==
95 (GET_PWR_CFG_VALUE(cfg_cmd)
96 & GET_PWR_CFG_MASK(cfg_cmd)))
97 polling_bit = true;
98 else
99 udelay(10);
100
101 if (polling_count++ > max_polling_cnt)
102 return false;
103 } while (!polling_bit);
104 break;
105 case PWR_CMD_DELAY:
106 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
107 "rtl_hal_pwrseqcmdparsing(): PWR_CMD_DELAY\n");
108 if (GET_PWR_CFG_VALUE(cfg_cmd) ==
109 PWRSEQ_DELAY_US)
110 udelay(GET_PWR_CFG_OFFSET(cfg_cmd));
111 else
112 mdelay(GET_PWR_CFG_OFFSET(cfg_cmd));
113 break;
114 case PWR_CMD_END:
115 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
116 "rtl_hal_pwrseqcmdparsing(): PWR_CMD_END\n");
117 return true;
118 default:
119 RT_ASSERT(false,
120 "rtl_hal_pwrseqcmdparsing(): Unknown CMD!!\n");
121 break;
122 }
123
124 }
125 ary_idx++;
126 } while (1);
127
128 return true;
129}