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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*******************************************************************************
2 *
3 * Linux ThunderLAN Driver
4 *
5 * tlan.c
6 * by James Banks
7 *
8 * (C) 1997-1998 Caldera, Inc.
9 * (C) 1998 James Banks
10 * (C) 1999-2001 Torben Mathiasen
11 * (C) 2002 Samuel Chessman
12 *
13 * This software may be used and distributed according to the terms
14 * of the GNU General Public License, incorporated herein by reference.
15 *
16 ** This file is best viewed/edited with columns>=132.
17 *
18 ** Useful (if not required) reading:
19 *
20 * Texas Instruments, ThunderLAN Programmer's Guide,
21 * TI Literature Number SPWU013A
22 * available in PDF format from www.ti.com
23 * Level One, LXT901 and LXT970 Data Sheets
24 * available in PDF format from www.level1.com
25 * National Semiconductor, DP83840A Data Sheet
26 * available in PDF format from www.national.com
27 * Microchip Technology, 24C01A/02A/04A Data Sheet
28 * available in PDF format from www.microchip.com
29 *
30 * Change History
31 *
32 * Tigran Aivazian <tigran@sco.com>: TLan_PciProbe() now uses
33 * new PCI BIOS interface.
34 * Alan Cox <alan@redhat.com>: Fixed the out of memory
35 * handling.
36 *
37 * Torben Mathiasen <torben.mathiasen@compaq.com> New Maintainer!
38 *
39 * v1.1 Dec 20, 1999 - Removed linux version checking
40 * Patch from Tigran Aivazian.
41 * - v1.1 includes Alan's SMP updates.
42 * - We still have problems on SMP though,
43 * but I'm looking into that.
44 *
45 * v1.2 Jan 02, 2000 - Hopefully fixed the SMP deadlock.
46 * - Removed dependency of HZ being 100.
47 * - We now allow higher priority timers to
48 * overwrite timers like TLAN_TIMER_ACTIVITY
49 * Patch from John Cagle <john.cagle@compaq.com>.
50 * - Fixed a few compiler warnings.
51 *
52 * v1.3 Feb 04, 2000 - Fixed the remaining HZ issues.
53 * - Removed call to pci_present().
54 * - Removed SA_INTERRUPT flag from irq handler.
55 * - Added __init and __initdata to reduce resisdent
56 * code size.
57 * - Driver now uses module_init/module_exit.
58 * - Rewrote init_module and tlan_probe to
59 * share a lot more code. We now use tlan_probe
60 * with builtin and module driver.
61 * - Driver ported to new net API.
62 * - tlan.txt has been reworked to reflect current
63 * driver (almost)
64 * - Other minor stuff
65 *
66 * v1.4 Feb 10, 2000 - Updated with more changes required after Dave's
67 * network cleanup in 2.3.43pre7 (Tigran & myself)
68 * - Minor stuff.
69 *
70 * v1.5 March 22, 2000 - Fixed another timer bug that would hang the driver
71 * if no cable/link were present.
72 * - Cosmetic changes.
73 * - TODO: Port completely to new PCI/DMA API
74 * Auto-Neg fallback.
75 *
76 * v1.6 April 04, 2000 - Fixed driver support for kernel-parameters. Haven't
77 * tested it though, as the kernel support is currently
78 * broken (2.3.99p4p3).
79 * - Updated tlan.txt accordingly.
80 * - Adjusted minimum/maximum frame length.
81 * - There is now a TLAN website up at
82 * http://tlan.kernel.dk
83 *
84 * v1.7 April 07, 2000 - Started to implement custom ioctls. Driver now
85 * reports PHY information when used with Donald
86 * Beckers userspace MII diagnostics utility.
87 *
88 * v1.8 April 23, 2000 - Fixed support for forced speed/duplex settings.
89 * - Added link information to Auto-Neg and forced
90 * modes. When NIC operates with auto-neg the driver
91 * will report Link speed & duplex modes as well as
92 * link partner abilities. When forced link is used,
93 * the driver will report status of the established
94 * link.
95 * Please read tlan.txt for additional information.
96 * - Removed call to check_region(), and used
97 * return value of request_region() instead.
98 *
99 * v1.8a May 28, 2000 - Minor updates.
100 *
101 * v1.9 July 25, 2000 - Fixed a few remaining Full-Duplex issues.
102 * - Updated with timer fixes from Andrew Morton.
103 * - Fixed module race in TLan_Open.
104 * - Added routine to monitor PHY status.
105 * - Added activity led support for Proliant devices.
106 *
107 * v1.10 Aug 30, 2000 - Added support for EISA based tlan controllers
108 * like the Compaq NetFlex3/E.
109 * - Rewrote tlan_probe to better handle multiple
110 * bus probes. Probing and device setup is now
111 * done through TLan_Probe and TLan_init_one. Actual
112 * hardware probe is done with kernel API and
113 * TLan_EisaProbe.
114 * - Adjusted debug information for probing.
115 * - Fixed bug that would cause general debug information
116 * to be printed after driver removal.
117 * - Added transmit timeout handling.
118 * - Fixed OOM return values in tlan_probe.
119 * - Fixed possible mem leak in tlan_exit
120 * (now tlan_remove_one).
121 * - Fixed timer bug in TLan_phyMonitor.
122 * - This driver version is alpha quality, please
123 * send me any bug issues you may encounter.
124 *
125 * v1.11 Aug 31, 2000 - Do not try to register irq 0 if no irq line was
126 * set for EISA cards.
127 * - Added support for NetFlex3/E with nibble-rate
128 * 10Base-T PHY. This is untestet as I haven't got
129 * one of these cards.
130 * - Fixed timer being added twice.
131 * - Disabled PhyMonitoring by default as this is
132 * work in progress. Define MONITOR to enable it.
133 * - Now we don't display link info with PHYs that
134 * doesn't support it (level1).
135 * - Incresed tx_timeout beacuse of auto-neg.
136 * - Adjusted timers for forced speeds.
137 *
138 * v1.12 Oct 12, 2000 - Minor fixes (memleak, init, etc.)
139 *
140 * v1.13 Nov 28, 2000 - Stop flooding console with auto-neg issues
141 * when link can't be established.
142 * - Added the bbuf option as a kernel parameter.
143 * - Fixed ioaddr probe bug.
144 * - Fixed stupid deadlock with MII interrupts.
145 * - Added support for speed/duplex selection with
146 * multiple nics.
147 * - Added partly fix for TX Channel lockup with
148 * TLAN v1.0 silicon. This needs to be investigated
149 * further.
150 *
151 * v1.14 Dec 16, 2000 - Added support for servicing multiple frames per.
152 * interrupt. Thanks goes to
153 * Adam Keys <adam@ti.com>
154 * Denis Beaudoin <dbeaudoin@ti.com>
155 * for providing the patch.
156 * - Fixed auto-neg output when using multiple
157 * adapters.
158 * - Converted to use new taskq interface.
159 *
160 * v1.14a Jan 6, 2001 - Minor adjustments (spinlocks, etc.)
161 *
162 * Samuel Chessman <chessman@tux.org> New Maintainer!
163 *
164 * v1.15 Apr 4, 2002 - Correct operation when aui=1 to be
165 * 10T half duplex no loopback
166 * Thanks to Gunnar Eikman
167 *******************************************************************************/
168
169#include <linux/module.h>
170#include <linux/init.h>
171#include <linux/ioport.h>
172#include <linux/eisa.h>
173#include <linux/pci.h>
Domen Puncer1e7f0bd2005-06-26 18:22:14 -0400174#include <linux/dma-mapping.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -0700175#include <linux/netdevice.h>
176#include <linux/etherdevice.h>
177#include <linux/delay.h>
178#include <linux/spinlock.h>
179#include <linux/workqueue.h>
180#include <linux/mii.h>
181
182#include "tlan.h"
183
184typedef u32 (TLanIntVectorFunc)( struct net_device *, u16 );
185
186
187/* For removing EISA devices */
188static struct net_device *TLan_Eisa_Devices;
189
190static int TLanDevicesInstalled;
191
192/* Set speed, duplex and aui settings */
193static int aui[MAX_TLAN_BOARDS];
194static int duplex[MAX_TLAN_BOARDS];
195static int speed[MAX_TLAN_BOARDS];
196static int boards_found;
Stephen Hemminger15efa9b2005-05-04 15:33:11 -0700197module_param_array(aui, int, NULL, 0);
198module_param_array(duplex, int, NULL, 0);
199module_param_array(speed, int, NULL, 0);
200MODULE_PARM_DESC(aui, "ThunderLAN use AUI port(s) (0-1)");
201MODULE_PARM_DESC(duplex, "ThunderLAN duplex setting(s) (0-default, 1-half, 2-full)");
202MODULE_PARM_DESC(speed, "ThunderLAN port speen setting(s) (0,10,100)");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700203
204MODULE_AUTHOR("Maintainer: Samuel Chessman <chessman@tux.org>");
205MODULE_DESCRIPTION("Driver for TI ThunderLAN based ethernet PCI adapters");
206MODULE_LICENSE("GPL");
207
208
209/* Define this to enable Link beat monitoring */
210#undef MONITOR
211
212/* Turn on debugging. See Documentation/networking/tlan.txt for details */
213static int debug;
Stephen Hemminger15efa9b2005-05-04 15:33:11 -0700214module_param(debug, int, 0);
215MODULE_PARM_DESC(debug, "ThunderLAN debug mask");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700216
217static int bbuf;
Stephen Hemminger15efa9b2005-05-04 15:33:11 -0700218module_param(bbuf, int, 0);
219MODULE_PARM_DESC(bbuf, "ThunderLAN use big buffer (0-1)");
220
Linus Torvalds1da177e2005-04-16 15:20:36 -0700221static u8 *TLanPadBuffer;
222static dma_addr_t TLanPadBufferDMA;
223static char TLanSignature[] = "TLAN";
224static const char tlan_banner[] = "ThunderLAN driver v1.15\n";
225static int tlan_have_pci;
226static int tlan_have_eisa;
227
228static const char *media[] = {
229 "10BaseT-HD ", "10BaseT-FD ","100baseTx-HD ",
230 "100baseTx-FD", "100baseT4", NULL
231};
232
233static struct board {
234 const char *deviceLabel;
235 u32 flags;
236 u16 addrOfs;
237} board_info[] = {
238 { "Compaq Netelligent 10 T PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
239 { "Compaq Netelligent 10/100 TX PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
240 { "Compaq Integrated NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
241 { "Compaq NetFlex-3/P", TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
242 { "Compaq NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
243 { "Compaq Netelligent Integrated 10/100 TX UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
244 { "Compaq Netelligent Dual 10/100 TX PCI UTP", TLAN_ADAPTER_NONE, 0x83 },
245 { "Compaq Netelligent 10/100 TX Embedded UTP", TLAN_ADAPTER_NONE, 0x83 },
246 { "Olicom OC-2183/2185", TLAN_ADAPTER_USE_INTERN_10, 0x83 },
247 { "Olicom OC-2325", TLAN_ADAPTER_UNMANAGED_PHY, 0xF8 },
248 { "Olicom OC-2326", TLAN_ADAPTER_USE_INTERN_10, 0xF8 },
249 { "Compaq Netelligent 10/100 TX UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
250 { "Compaq Netelligent 10 T/2 PCI UTP/Coax", TLAN_ADAPTER_NONE, 0x83 },
251 { "Compaq NetFlex-3/E", TLAN_ADAPTER_ACTIVITY_LED | /* EISA card */
252 TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
253 { "Compaq NetFlex-3/E", TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, /* EISA card */
254};
255
256static struct pci_device_id tlan_pci_tbl[] = {
257 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL10,
258 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
259 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100,
260 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
261 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3I,
262 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
263 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_THUNDER,
264 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 },
265 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3B,
266 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
267 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100PI,
268 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 },
269 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100D,
270 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6 },
271 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100I,
272 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7 },
273 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2183,
274 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8 },
275 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2325,
276 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9 },
277 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2326,
278 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10 },
279 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_100_WS_5100,
280 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11 },
281 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_T2,
282 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12 },
283 { 0,}
284};
285MODULE_DEVICE_TABLE(pci, tlan_pci_tbl);
286
287static void TLan_EisaProbe( void );
288static void TLan_Eisa_Cleanup( void );
289static int TLan_Init( struct net_device * );
290static int TLan_Open( struct net_device *dev );
291static int TLan_StartTx( struct sk_buff *, struct net_device *);
292static irqreturn_t TLan_HandleInterrupt( int, void *, struct pt_regs *);
293static int TLan_Close( struct net_device *);
294static struct net_device_stats *TLan_GetStats( struct net_device *);
295static void TLan_SetMulticastList( struct net_device *);
296static int TLan_ioctl( struct net_device *dev, struct ifreq *rq, int cmd);
297static int TLan_probe1( struct pci_dev *pdev, long ioaddr, int irq, int rev, const struct pci_device_id *ent);
298static void TLan_tx_timeout( struct net_device *dev);
299static int tlan_init_one( struct pci_dev *pdev, const struct pci_device_id *ent);
300
301static u32 TLan_HandleInvalid( struct net_device *, u16 );
302static u32 TLan_HandleTxEOF( struct net_device *, u16 );
303static u32 TLan_HandleStatOverflow( struct net_device *, u16 );
304static u32 TLan_HandleRxEOF( struct net_device *, u16 );
305static u32 TLan_HandleDummy( struct net_device *, u16 );
306static u32 TLan_HandleTxEOC( struct net_device *, u16 );
307static u32 TLan_HandleStatusCheck( struct net_device *, u16 );
308static u32 TLan_HandleRxEOC( struct net_device *, u16 );
309
310static void TLan_Timer( unsigned long );
311
312static void TLan_ResetLists( struct net_device * );
313static void TLan_FreeLists( struct net_device * );
314static void TLan_PrintDio( u16 );
315static void TLan_PrintList( TLanList *, char *, int );
316static void TLan_ReadAndClearStats( struct net_device *, int );
317static void TLan_ResetAdapter( struct net_device * );
318static void TLan_FinishReset( struct net_device * );
319static void TLan_SetMac( struct net_device *, int areg, char *mac );
320
321static void TLan_PhyPrint( struct net_device * );
322static void TLan_PhyDetect( struct net_device * );
323static void TLan_PhyPowerDown( struct net_device * );
324static void TLan_PhyPowerUp( struct net_device * );
325static void TLan_PhyReset( struct net_device * );
326static void TLan_PhyStartLink( struct net_device * );
327static void TLan_PhyFinishAutoNeg( struct net_device * );
328#ifdef MONITOR
329static void TLan_PhyMonitor( struct net_device * );
330#endif
331
332/*
333static int TLan_PhyNop( struct net_device * );
334static int TLan_PhyInternalCheck( struct net_device * );
335static int TLan_PhyInternalService( struct net_device * );
336static int TLan_PhyDp83840aCheck( struct net_device * );
337*/
338
339static int TLan_MiiReadReg( struct net_device *, u16, u16, u16 * );
340static void TLan_MiiSendData( u16, u32, unsigned );
341static void TLan_MiiSync( u16 );
342static void TLan_MiiWriteReg( struct net_device *, u16, u16, u16 );
343
344static void TLan_EeSendStart( u16 );
345static int TLan_EeSendByte( u16, u8, int );
346static void TLan_EeReceiveByte( u16, u8 *, int );
347static int TLan_EeReadByte( struct net_device *, u8, u8 * );
348
349
350static void
351TLan_StoreSKB( struct tlan_list_tag *tag, struct sk_buff *skb)
352{
353 unsigned long addr = (unsigned long)skb;
354 tag->buffer[9].address = (u32)addr;
355 addr >>= 31; /* >>= 32 is undefined for 32bit arch, stupid C */
356 addr >>= 1;
357 tag->buffer[8].address = (u32)addr;
358}
359
360static struct sk_buff *
361TLan_GetSKB( struct tlan_list_tag *tag)
362{
363 unsigned long addr = tag->buffer[8].address;
364 addr <<= 31;
365 addr <<= 1;
366 addr |= tag->buffer[9].address;
367 return (struct sk_buff *) addr;
368}
369
370
371static TLanIntVectorFunc *TLanIntVector[TLAN_INT_NUMBER_OF_INTS] = {
372 TLan_HandleInvalid,
373 TLan_HandleTxEOF,
374 TLan_HandleStatOverflow,
375 TLan_HandleRxEOF,
376 TLan_HandleDummy,
377 TLan_HandleTxEOC,
378 TLan_HandleStatusCheck,
379 TLan_HandleRxEOC
380};
381
382static inline void
383TLan_SetTimer( struct net_device *dev, u32 ticks, u32 type )
384{
385 TLanPrivateInfo *priv = netdev_priv(dev);
386 unsigned long flags = 0;
387
388 if (!in_irq())
389 spin_lock_irqsave(&priv->lock, flags);
390 if ( priv->timer.function != NULL &&
391 priv->timerType != TLAN_TIMER_ACTIVITY ) {
392 if (!in_irq())
393 spin_unlock_irqrestore(&priv->lock, flags);
394 return;
395 }
396 priv->timer.function = &TLan_Timer;
397 if (!in_irq())
398 spin_unlock_irqrestore(&priv->lock, flags);
399
400 priv->timer.data = (unsigned long) dev;
401 priv->timerSetAt = jiffies;
402 priv->timerType = type;
403 mod_timer(&priv->timer, jiffies + ticks);
404
405} /* TLan_SetTimer */
406
407
408/*****************************************************************************
409******************************************************************************
410
411 ThunderLAN Driver Primary Functions
412
413 These functions are more or less common to all Linux network drivers.
414
415******************************************************************************
416*****************************************************************************/
417
418
419
420
421
422 /***************************************************************
423 * tlan_remove_one
424 *
425 * Returns:
426 * Nothing
427 * Parms:
428 * None
429 *
430 * Goes through the TLanDevices list and frees the device
431 * structs and memory associated with each device (lists
432 * and buffers). It also ureserves the IO port regions
433 * associated with this device.
434 *
435 **************************************************************/
436
437
438static void __devexit tlan_remove_one( struct pci_dev *pdev)
439{
440 struct net_device *dev = pci_get_drvdata( pdev );
441 TLanPrivateInfo *priv = netdev_priv(dev);
442
443 unregister_netdev( dev );
444
445 if ( priv->dmaStorage ) {
446 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage, priv->dmaStorageDMA );
447 }
448
449#ifdef CONFIG_PCI
450 pci_release_regions(pdev);
451#endif
452
453 free_netdev( dev );
454
455 pci_set_drvdata( pdev, NULL );
456}
457
458static struct pci_driver tlan_driver = {
459 .name = "tlan",
460 .id_table = tlan_pci_tbl,
461 .probe = tlan_init_one,
462 .remove = __devexit_p(tlan_remove_one),
463};
464
465static int __init tlan_probe(void)
466{
467 static int pad_allocated;
468
469 printk(KERN_INFO "%s", tlan_banner);
470
471 TLanPadBuffer = (u8 *) pci_alloc_consistent(NULL, TLAN_MIN_FRAME_SIZE, &TLanPadBufferDMA);
472
473 if (TLanPadBuffer == NULL) {
474 printk(KERN_ERR "TLAN: Could not allocate memory for pad buffer.\n");
475 return -ENOMEM;
476 }
477
478 memset(TLanPadBuffer, 0, TLAN_MIN_FRAME_SIZE);
479 pad_allocated = 1;
480
481 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting PCI Probe....\n");
482
483 /* Use new style PCI probing. Now the kernel will
484 do most of this for us */
485 pci_register_driver(&tlan_driver);
486
487 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting EISA Probe....\n");
488 TLan_EisaProbe();
489
490 printk(KERN_INFO "TLAN: %d device%s installed, PCI: %d EISA: %d\n",
491 TLanDevicesInstalled, TLanDevicesInstalled == 1 ? "" : "s",
492 tlan_have_pci, tlan_have_eisa);
493
494 if (TLanDevicesInstalled == 0) {
495 pci_unregister_driver(&tlan_driver);
496 pci_free_consistent(NULL, TLAN_MIN_FRAME_SIZE, TLanPadBuffer, TLanPadBufferDMA);
497 return -ENODEV;
498 }
499 return 0;
500}
501
502
503static int __devinit tlan_init_one( struct pci_dev *pdev,
504 const struct pci_device_id *ent)
505{
506 return TLan_probe1( pdev, -1, -1, 0, ent);
507}
508
509
510/*
511 ***************************************************************
512 * tlan_probe1
513 *
514 * Returns:
515 * 0 on success, error code on error
516 * Parms:
517 * none
518 *
519 * The name is lower case to fit in with all the rest of
520 * the netcard_probe names. This function looks for
521 * another TLan based adapter, setting it up with the
522 * allocated device struct if one is found.
523 * tlan_probe has been ported to the new net API and
524 * now allocates its own device structure. This function
525 * is also used by modules.
526 *
527 **************************************************************/
528
529static int __devinit TLan_probe1(struct pci_dev *pdev,
530 long ioaddr, int irq, int rev, const struct pci_device_id *ent )
531{
532
533 struct net_device *dev;
534 TLanPrivateInfo *priv;
535 u8 pci_rev;
536 u16 device_id;
537 int reg, rc = -ENODEV;
538
Adrian Bunkad9f6712006-02-05 00:37:47 +0100539#ifdef CONFIG_PCI
Linus Torvalds1da177e2005-04-16 15:20:36 -0700540 if (pdev) {
541 rc = pci_enable_device(pdev);
542 if (rc)
543 return rc;
544
545 rc = pci_request_regions(pdev, TLanSignature);
546 if (rc) {
547 printk(KERN_ERR "TLAN: Could not reserve IO regions\n");
548 goto err_out;
549 }
550 }
Adrian Bunkad9f6712006-02-05 00:37:47 +0100551#endif /* CONFIG_PCI */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700552
553 dev = alloc_etherdev(sizeof(TLanPrivateInfo));
554 if (dev == NULL) {
555 printk(KERN_ERR "TLAN: Could not allocate memory for device.\n");
556 rc = -ENOMEM;
557 goto err_out_regions;
558 }
559 SET_MODULE_OWNER(dev);
560 SET_NETDEV_DEV(dev, &pdev->dev);
561
562 priv = netdev_priv(dev);
563
564 priv->pciDev = pdev;
565
566 /* Is this a PCI device? */
567 if (pdev) {
568 u32 pci_io_base = 0;
569
570 priv->adapter = &board_info[ent->driver_data];
571
Domen Puncer1e7f0bd2005-06-26 18:22:14 -0400572 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700573 if (rc) {
574 printk(KERN_ERR "TLAN: No suitable PCI mapping available.\n");
575 goto err_out_free_dev;
576 }
577
578 pci_read_config_byte ( pdev, PCI_REVISION_ID, &pci_rev);
579
580 for ( reg= 0; reg <= 5; reg ++ ) {
581 if (pci_resource_flags(pdev, reg) & IORESOURCE_IO) {
582 pci_io_base = pci_resource_start(pdev, reg);
583 TLAN_DBG( TLAN_DEBUG_GNRL, "IO mapping is available at %x.\n",
584 pci_io_base);
585 break;
586 }
587 }
588 if (!pci_io_base) {
589 printk(KERN_ERR "TLAN: No IO mappings available\n");
590 rc = -EIO;
591 goto err_out_free_dev;
592 }
593
594 dev->base_addr = pci_io_base;
595 dev->irq = pdev->irq;
596 priv->adapterRev = pci_rev;
597 pci_set_master(pdev);
598 pci_set_drvdata(pdev, dev);
599
600 } else { /* EISA card */
601 /* This is a hack. We need to know which board structure
602 * is suited for this adapter */
603 device_id = inw(ioaddr + EISA_ID2);
604 priv->is_eisa = 1;
605 if (device_id == 0x20F1) {
606 priv->adapter = &board_info[13]; /* NetFlex-3/E */
607 priv->adapterRev = 23; /* TLAN 2.3 */
608 } else {
609 priv->adapter = &board_info[14];
610 priv->adapterRev = 10; /* TLAN 1.0 */
611 }
612 dev->base_addr = ioaddr;
613 dev->irq = irq;
614 }
615
616 /* Kernel parameters */
617 if (dev->mem_start) {
618 priv->aui = dev->mem_start & 0x01;
619 priv->duplex = ((dev->mem_start & 0x06) == 0x06) ? 0 : (dev->mem_start & 0x06) >> 1;
620 priv->speed = ((dev->mem_start & 0x18) == 0x18) ? 0 : (dev->mem_start & 0x18) >> 3;
621
622 if (priv->speed == 0x1) {
623 priv->speed = TLAN_SPEED_10;
624 } else if (priv->speed == 0x2) {
625 priv->speed = TLAN_SPEED_100;
626 }
627 debug = priv->debug = dev->mem_end;
628 } else {
629 priv->aui = aui[boards_found];
630 priv->speed = speed[boards_found];
631 priv->duplex = duplex[boards_found];
632 priv->debug = debug;
633 }
634
635 /* This will be used when we get an adapter error from
636 * within our irq handler */
637 INIT_WORK(&priv->tlan_tqueue, (void *)(void*)TLan_tx_timeout, dev);
638
639 spin_lock_init(&priv->lock);
640
641 rc = TLan_Init(dev);
642 if (rc) {
643 printk(KERN_ERR "TLAN: Could not set up device.\n");
644 goto err_out_free_dev;
645 }
646
647 rc = register_netdev(dev);
648 if (rc) {
649 printk(KERN_ERR "TLAN: Could not register device.\n");
650 goto err_out_uninit;
651 }
652
653
654 TLanDevicesInstalled++;
655 boards_found++;
656
657 /* pdev is NULL if this is an EISA device */
658 if (pdev)
659 tlan_have_pci++;
660 else {
661 priv->nextDevice = TLan_Eisa_Devices;
662 TLan_Eisa_Devices = dev;
663 tlan_have_eisa++;
664 }
665
666 printk(KERN_INFO "TLAN: %s irq=%2d, io=%04x, %s, Rev. %d\n",
667 dev->name,
668 (int) dev->irq,
669 (int) dev->base_addr,
670 priv->adapter->deviceLabel,
671 priv->adapterRev);
672 return 0;
673
674err_out_uninit:
675 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage,
676 priv->dmaStorageDMA );
677err_out_free_dev:
678 free_netdev(dev);
679err_out_regions:
680#ifdef CONFIG_PCI
681 if (pdev)
682 pci_release_regions(pdev);
683#endif
684err_out:
685 if (pdev)
686 pci_disable_device(pdev);
687 return rc;
688}
689
690
691static void TLan_Eisa_Cleanup(void)
692{
693 struct net_device *dev;
694 TLanPrivateInfo *priv;
695
696 while( tlan_have_eisa ) {
697 dev = TLan_Eisa_Devices;
698 priv = netdev_priv(dev);
699 if (priv->dmaStorage) {
700 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage, priv->dmaStorageDMA );
701 }
702 release_region( dev->base_addr, 0x10);
703 unregister_netdev( dev );
704 TLan_Eisa_Devices = priv->nextDevice;
705 free_netdev( dev );
706 tlan_have_eisa--;
707 }
708}
709
710
711static void __exit tlan_exit(void)
712{
713 pci_unregister_driver(&tlan_driver);
714
715 if (tlan_have_eisa)
716 TLan_Eisa_Cleanup();
717
718 pci_free_consistent(NULL, TLAN_MIN_FRAME_SIZE, TLanPadBuffer, TLanPadBufferDMA);
719
720}
721
722
723/* Module loading/unloading */
724module_init(tlan_probe);
725module_exit(tlan_exit);
726
727
728
729 /**************************************************************
730 * TLan_EisaProbe
731 *
732 * Returns: 0 on success, 1 otherwise
733 *
734 * Parms: None
735 *
736 *
737 * This functions probes for EISA devices and calls
738 * TLan_probe1 when one is found.
739 *
740 *************************************************************/
741
742static void __init TLan_EisaProbe (void)
743{
744 long ioaddr;
745 int rc = -ENODEV;
746 int irq;
747 u16 device_id;
748
749 if (!EISA_bus) {
750 TLAN_DBG(TLAN_DEBUG_PROBE, "No EISA bus present\n");
751 return;
752 }
753
754 /* Loop through all slots of the EISA bus */
755 for (ioaddr = 0x1000; ioaddr < 0x9000; ioaddr += 0x1000) {
756
757 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n", (int) ioaddr + 0xC80, inw(ioaddr + EISA_ID));
758 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n", (int) ioaddr + 0xC82, inw(ioaddr + EISA_ID2));
759
760
761 TLAN_DBG(TLAN_DEBUG_PROBE, "Probing for EISA adapter at IO: 0x%4x : ",
762 (int) ioaddr);
763 if (request_region(ioaddr, 0x10, TLanSignature) == NULL)
764 goto out;
765
766 if (inw(ioaddr + EISA_ID) != 0x110E) {
767 release_region(ioaddr, 0x10);
768 goto out;
769 }
770
771 device_id = inw(ioaddr + EISA_ID2);
772 if (device_id != 0x20F1 && device_id != 0x40F1) {
773 release_region (ioaddr, 0x10);
774 goto out;
775 }
776
777 if (inb(ioaddr + EISA_CR) != 0x1) { /* Check if adapter is enabled */
778 release_region (ioaddr, 0x10);
779 goto out2;
780 }
781
782 if (debug == 0x10)
783 printk("Found one\n");
784
785
786 /* Get irq from board */
787 switch (inb(ioaddr + 0xCC0)) {
788 case(0x10):
789 irq=5;
790 break;
791 case(0x20):
792 irq=9;
793 break;
794 case(0x40):
795 irq=10;
796 break;
797 case(0x80):
798 irq=11;
799 break;
800 default:
801 goto out;
802 }
803
804
805 /* Setup the newly found eisa adapter */
806 rc = TLan_probe1( NULL, ioaddr, irq,
807 12, NULL);
808 continue;
809
810 out:
811 if (debug == 0x10)
812 printk("None found\n");
813 continue;
814
815 out2: if (debug == 0x10)
816 printk("Card found but it is not enabled, skipping\n");
817 continue;
818
819 }
820
821} /* TLan_EisaProbe */
822
823#ifdef CONFIG_NET_POLL_CONTROLLER
824static void TLan_Poll(struct net_device *dev)
825{
826 disable_irq(dev->irq);
827 TLan_HandleInterrupt(dev->irq, dev, NULL);
828 enable_irq(dev->irq);
829}
830#endif
831
832
833
834
835 /***************************************************************
836 * TLan_Init
837 *
838 * Returns:
839 * 0 on success, error code otherwise.
840 * Parms:
841 * dev The structure of the device to be
842 * init'ed.
843 *
844 * This function completes the initialization of the
845 * device structure and driver. It reserves the IO
846 * addresses, allocates memory for the lists and bounce
847 * buffers, retrieves the MAC address from the eeprom
848 * and assignes the device's methods.
849 *
850 **************************************************************/
851
852static int TLan_Init( struct net_device *dev )
853{
854 int dma_size;
855 int err;
856 int i;
857 TLanPrivateInfo *priv;
858
859 priv = netdev_priv(dev);
860
861 if ( bbuf ) {
862 dma_size = ( TLAN_NUM_RX_LISTS + TLAN_NUM_TX_LISTS )
863 * ( sizeof(TLanList) + TLAN_MAX_FRAME_SIZE );
864 } else {
865 dma_size = ( TLAN_NUM_RX_LISTS + TLAN_NUM_TX_LISTS )
866 * ( sizeof(TLanList) );
867 }
868 priv->dmaStorage = pci_alloc_consistent(priv->pciDev, dma_size, &priv->dmaStorageDMA);
869 priv->dmaSize = dma_size;
870
871 if ( priv->dmaStorage == NULL ) {
872 printk(KERN_ERR "TLAN: Could not allocate lists and buffers for %s.\n",
873 dev->name );
874 return -ENOMEM;
875 }
876 memset( priv->dmaStorage, 0, dma_size );
877 priv->rxList = (TLanList *)
878 ( ( ( (u32) priv->dmaStorage ) + 7 ) & 0xFFFFFFF8 );
879 priv->rxListDMA = ( ( ( (u32) priv->dmaStorageDMA ) + 7 ) & 0xFFFFFFF8 );
880 priv->txList = priv->rxList + TLAN_NUM_RX_LISTS;
881 priv->txListDMA = priv->rxListDMA + sizeof(TLanList) * TLAN_NUM_RX_LISTS;
882 if ( bbuf ) {
883 priv->rxBuffer = (u8 *) ( priv->txList + TLAN_NUM_TX_LISTS );
884 priv->rxBufferDMA =priv->txListDMA + sizeof(TLanList) * TLAN_NUM_TX_LISTS;
885 priv->txBuffer = priv->rxBuffer + ( TLAN_NUM_RX_LISTS * TLAN_MAX_FRAME_SIZE );
886 priv->txBufferDMA = priv->rxBufferDMA + ( TLAN_NUM_RX_LISTS * TLAN_MAX_FRAME_SIZE );
887 }
888
889 err = 0;
890 for ( i = 0; i < 6 ; i++ )
891 err |= TLan_EeReadByte( dev,
892 (u8) priv->adapter->addrOfs + i,
893 (u8 *) &dev->dev_addr[i] );
894 if ( err ) {
895 printk(KERN_ERR "TLAN: %s: Error reading MAC from eeprom: %d\n",
896 dev->name,
897 err );
898 }
899 dev->addr_len = 6;
900
901 netif_carrier_off(dev);
902
903 /* Device methods */
904 dev->open = &TLan_Open;
905 dev->hard_start_xmit = &TLan_StartTx;
906 dev->stop = &TLan_Close;
907 dev->get_stats = &TLan_GetStats;
908 dev->set_multicast_list = &TLan_SetMulticastList;
909 dev->do_ioctl = &TLan_ioctl;
910#ifdef CONFIG_NET_POLL_CONTROLLER
911 dev->poll_controller = &TLan_Poll;
912#endif
913 dev->tx_timeout = &TLan_tx_timeout;
914 dev->watchdog_timeo = TX_TIMEOUT;
915
916 return 0;
917
918} /* TLan_Init */
919
920
921
922
923 /***************************************************************
924 * TLan_Open
925 *
926 * Returns:
927 * 0 on success, error code otherwise.
928 * Parms:
929 * dev Structure of device to be opened.
930 *
931 * This routine puts the driver and TLAN adapter in a
932 * state where it is ready to send and receive packets.
933 * It allocates the IRQ, resets and brings the adapter
934 * out of reset, and allows interrupts. It also delays
935 * the startup for autonegotiation or sends a Rx GO
936 * command to the adapter, as appropriate.
937 *
938 **************************************************************/
939
940static int TLan_Open( struct net_device *dev )
941{
942 TLanPrivateInfo *priv = netdev_priv(dev);
943 int err;
944
945 priv->tlanRev = TLan_DioRead8( dev->base_addr, TLAN_DEF_REVISION );
Thomas Gleixner1fb9df52006-07-01 19:29:39 -0700946 err = request_irq( dev->irq, TLan_HandleInterrupt, IRQF_SHARED, TLanSignature, dev );
Linus Torvalds1da177e2005-04-16 15:20:36 -0700947
948 if ( err ) {
949 printk(KERN_ERR "TLAN: Cannot open %s because IRQ %d is already in use.\n", dev->name, dev->irq );
950 return err;
951 }
952
953 init_timer(&priv->timer);
954 netif_start_queue(dev);
955
956 /* NOTE: It might not be necessary to read the stats before a
957 reset if you don't care what the values are.
958 */
959 TLan_ResetLists( dev );
960 TLan_ReadAndClearStats( dev, TLAN_IGNORE );
961 TLan_ResetAdapter( dev );
962
963 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Opened. TLAN Chip Rev: %x\n", dev->name, priv->tlanRev );
964
965 return 0;
966
967} /* TLan_Open */
968
969
970
971 /**************************************************************
972 * TLan_ioctl
973 *
974 * Returns:
975 * 0 on success, error code otherwise
976 * Params:
977 * dev structure of device to receive ioctl.
978 *
979 * rq ifreq structure to hold userspace data.
980 *
981 * cmd ioctl command.
982 *
983 *
984 *************************************************************/
985
986static int TLan_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
987{
988 TLanPrivateInfo *priv = netdev_priv(dev);
989 struct mii_ioctl_data *data = if_mii(rq);
990 u32 phy = priv->phy[priv->phyNum];
991
992 if (!priv->phyOnline)
993 return -EAGAIN;
994
995 switch(cmd) {
996 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
997 data->phy_id = phy;
998
999
1000 case SIOCGMIIREG: /* Read MII PHY register. */
1001 TLan_MiiReadReg(dev, data->phy_id & 0x1f, data->reg_num & 0x1f, &data->val_out);
1002 return 0;
1003
1004
1005 case SIOCSMIIREG: /* Write MII PHY register. */
1006 if (!capable(CAP_NET_ADMIN))
1007 return -EPERM;
1008 TLan_MiiWriteReg(dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
1009 return 0;
1010 default:
1011 return -EOPNOTSUPP;
1012 }
1013} /* tlan_ioctl */
1014
1015
1016 /***************************************************************
1017 * TLan_tx_timeout
1018 *
1019 * Returns: nothing
1020 *
1021 * Params:
1022 * dev structure of device which timed out
1023 * during transmit.
1024 *
1025 **************************************************************/
1026
1027static void TLan_tx_timeout(struct net_device *dev)
1028{
1029
1030 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Transmit timed out.\n", dev->name);
1031
1032 /* Ok so we timed out, lets see what we can do about it...*/
1033 TLan_FreeLists( dev );
1034 TLan_ResetLists( dev );
1035 TLan_ReadAndClearStats( dev, TLAN_IGNORE );
1036 TLan_ResetAdapter( dev );
1037 dev->trans_start = jiffies;
1038 netif_wake_queue( dev );
1039
1040}
1041
1042
1043
1044 /***************************************************************
1045 * TLan_StartTx
1046 *
1047 * Returns:
1048 * 0 on success, non-zero on failure.
1049 * Parms:
1050 * skb A pointer to the sk_buff containing the
1051 * frame to be sent.
1052 * dev The device to send the data on.
1053 *
1054 * This function adds a frame to the Tx list to be sent
1055 * ASAP. First it verifies that the adapter is ready and
1056 * there is room in the queue. Then it sets up the next
1057 * available list, copies the frame to the corresponding
1058 * buffer. If the adapter Tx channel is idle, it gives
1059 * the adapter a Tx Go command on the list, otherwise it
1060 * sets the forward address of the previous list to point
1061 * to this one. Then it frees the sk_buff.
1062 *
1063 **************************************************************/
1064
1065static int TLan_StartTx( struct sk_buff *skb, struct net_device *dev )
1066{
1067 TLanPrivateInfo *priv = netdev_priv(dev);
1068 TLanList *tail_list;
1069 dma_addr_t tail_list_phys;
1070 u8 *tail_buffer;
1071 int pad;
1072 unsigned long flags;
1073
1074 if ( ! priv->phyOnline ) {
1075 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s PHY is not ready\n", dev->name );
1076 dev_kfree_skb_any(skb);
1077 return 0;
1078 }
1079
1080 tail_list = priv->txList + priv->txTail;
1081 tail_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txTail;
1082
1083 if ( tail_list->cStat != TLAN_CSTAT_UNUSED ) {
1084 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s is busy (Head=%d Tail=%d)\n", dev->name, priv->txHead, priv->txTail );
1085 netif_stop_queue(dev);
1086 priv->txBusyCount++;
1087 return 1;
1088 }
1089
1090 tail_list->forward = 0;
1091
1092 if ( bbuf ) {
1093 tail_buffer = priv->txBuffer + ( priv->txTail * TLAN_MAX_FRAME_SIZE );
1094 memcpy( tail_buffer, skb->data, skb->len );
1095 } else {
1096 tail_list->buffer[0].address = pci_map_single(priv->pciDev, skb->data, skb->len, PCI_DMA_TODEVICE);
1097 TLan_StoreSKB(tail_list, skb);
1098 }
1099
1100 pad = TLAN_MIN_FRAME_SIZE - skb->len;
1101
1102 if ( pad > 0 ) {
1103 tail_list->frameSize = (u16) skb->len + pad;
1104 tail_list->buffer[0].count = (u32) skb->len;
1105 tail_list->buffer[1].count = TLAN_LAST_BUFFER | (u32) pad;
1106 tail_list->buffer[1].address = TLanPadBufferDMA;
1107 } else {
1108 tail_list->frameSize = (u16) skb->len;
1109 tail_list->buffer[0].count = TLAN_LAST_BUFFER | (u32) skb->len;
1110 tail_list->buffer[1].count = 0;
1111 tail_list->buffer[1].address = 0;
1112 }
1113
1114 spin_lock_irqsave(&priv->lock, flags);
1115 tail_list->cStat = TLAN_CSTAT_READY;
1116 if ( ! priv->txInProgress ) {
1117 priv->txInProgress = 1;
1118 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Starting TX on buffer %d\n", priv->txTail );
1119 outl( tail_list_phys, dev->base_addr + TLAN_CH_PARM );
1120 outl( TLAN_HC_GO, dev->base_addr + TLAN_HOST_CMD );
1121 } else {
1122 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Adding buffer %d to TX channel\n", priv->txTail );
1123 if ( priv->txTail == 0 ) {
1124 ( priv->txList + ( TLAN_NUM_TX_LISTS - 1 ) )->forward = tail_list_phys;
1125 } else {
1126 ( priv->txList + ( priv->txTail - 1 ) )->forward = tail_list_phys;
1127 }
1128 }
1129 spin_unlock_irqrestore(&priv->lock, flags);
1130
1131 CIRC_INC( priv->txTail, TLAN_NUM_TX_LISTS );
1132
1133 if ( bbuf )
1134 dev_kfree_skb_any(skb);
1135
1136 dev->trans_start = jiffies;
1137 return 0;
1138
1139} /* TLan_StartTx */
1140
1141
1142
1143
1144 /***************************************************************
1145 * TLan_HandleInterrupt
1146 *
1147 * Returns:
1148 * Nothing
1149 * Parms:
1150 * irq The line on which the interrupt
1151 * occurred.
1152 * dev_id A pointer to the device assigned to
1153 * this irq line.
1154 * regs ???
1155 *
1156 * This function handles an interrupt generated by its
1157 * assigned TLAN adapter. The function deactivates
1158 * interrupts on its adapter, records the type of
1159 * interrupt, executes the appropriate subhandler, and
1160 * acknowdges the interrupt to the adapter (thus
1161 * re-enabling adapter interrupts.
1162 *
1163 **************************************************************/
1164
1165static irqreturn_t TLan_HandleInterrupt(int irq, void *dev_id, struct pt_regs *regs)
1166{
1167 u32 ack;
1168 struct net_device *dev;
1169 u32 host_cmd;
1170 u16 host_int;
1171 int type;
1172 TLanPrivateInfo *priv;
1173
1174 dev = dev_id;
1175 priv = netdev_priv(dev);
1176
1177 spin_lock(&priv->lock);
1178
1179 host_int = inw( dev->base_addr + TLAN_HOST_INT );
1180 outw( host_int, dev->base_addr + TLAN_HOST_INT );
1181
1182 type = ( host_int & TLAN_HI_IT_MASK ) >> 2;
1183
1184 ack = TLanIntVector[type]( dev, host_int );
1185
1186 if ( ack ) {
1187 host_cmd = TLAN_HC_ACK | ack | ( type << 18 );
1188 outl( host_cmd, dev->base_addr + TLAN_HOST_CMD );
1189 }
1190
1191 spin_unlock(&priv->lock);
1192
1193 return IRQ_HANDLED;
1194} /* TLan_HandleInterrupts */
1195
1196
1197
1198
1199 /***************************************************************
1200 * TLan_Close
1201 *
1202 * Returns:
1203 * An error code.
1204 * Parms:
1205 * dev The device structure of the device to
1206 * close.
1207 *
1208 * This function shuts down the adapter. It records any
1209 * stats, puts the adapter into reset state, deactivates
1210 * its time as needed, and frees the irq it is using.
1211 *
1212 **************************************************************/
1213
1214static int TLan_Close(struct net_device *dev)
1215{
1216 TLanPrivateInfo *priv = netdev_priv(dev);
1217
1218 netif_stop_queue(dev);
1219 priv->neg_be_verbose = 0;
1220
1221 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1222 outl( TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD );
1223 if ( priv->timer.function != NULL ) {
1224 del_timer_sync( &priv->timer );
1225 priv->timer.function = NULL;
1226 }
1227
1228 free_irq( dev->irq, dev );
1229 TLan_FreeLists( dev );
1230 TLAN_DBG( TLAN_DEBUG_GNRL, "Device %s closed.\n", dev->name );
1231
1232 return 0;
1233
1234} /* TLan_Close */
1235
1236
1237
1238
1239 /***************************************************************
1240 * TLan_GetStats
1241 *
1242 * Returns:
1243 * A pointer to the device's statistics structure.
1244 * Parms:
1245 * dev The device structure to return the
1246 * stats for.
1247 *
1248 * This function updates the devices statistics by reading
1249 * the TLAN chip's onboard registers. Then it returns the
1250 * address of the statistics structure.
1251 *
1252 **************************************************************/
1253
1254static struct net_device_stats *TLan_GetStats( struct net_device *dev )
1255{
1256 TLanPrivateInfo *priv = netdev_priv(dev);
1257 int i;
1258
1259 /* Should only read stats if open ? */
1260 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1261
1262 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: %s EOC count = %d\n", dev->name, priv->rxEocCount );
1263 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s Busy count = %d\n", dev->name, priv->txBusyCount );
1264 if ( debug & TLAN_DEBUG_GNRL ) {
1265 TLan_PrintDio( dev->base_addr );
1266 TLan_PhyPrint( dev );
1267 }
1268 if ( debug & TLAN_DEBUG_LIST ) {
1269 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ )
1270 TLan_PrintList( priv->rxList + i, "RX", i );
1271 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ )
1272 TLan_PrintList( priv->txList + i, "TX", i );
1273 }
1274
1275 return ( &( (TLanPrivateInfo *) netdev_priv(dev) )->stats );
1276
1277} /* TLan_GetStats */
1278
1279
1280
1281
1282 /***************************************************************
1283 * TLan_SetMulticastList
1284 *
1285 * Returns:
1286 * Nothing
1287 * Parms:
1288 * dev The device structure to set the
1289 * multicast list for.
1290 *
1291 * This function sets the TLAN adaptor to various receive
1292 * modes. If the IFF_PROMISC flag is set, promiscuous
1293 * mode is acitviated. Otherwise, promiscuous mode is
1294 * turned off. If the IFF_ALLMULTI flag is set, then
1295 * the hash table is set to receive all group addresses.
1296 * Otherwise, the first three multicast addresses are
1297 * stored in AREG_1-3, and the rest are selected via the
1298 * hash table, as necessary.
1299 *
1300 **************************************************************/
1301
1302static void TLan_SetMulticastList( struct net_device *dev )
1303{
1304 struct dev_mc_list *dmi = dev->mc_list;
1305 u32 hash1 = 0;
1306 u32 hash2 = 0;
1307 int i;
1308 u32 offset;
1309 u8 tmp;
1310
1311 if ( dev->flags & IFF_PROMISC ) {
1312 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD );
1313 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, tmp | TLAN_NET_CMD_CAF );
1314 } else {
1315 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD );
1316 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, tmp & ~TLAN_NET_CMD_CAF );
1317 if ( dev->flags & IFF_ALLMULTI ) {
1318 for ( i = 0; i < 3; i++ )
1319 TLan_SetMac( dev, i + 1, NULL );
1320 TLan_DioWrite32( dev->base_addr, TLAN_HASH_1, 0xFFFFFFFF );
1321 TLan_DioWrite32( dev->base_addr, TLAN_HASH_2, 0xFFFFFFFF );
1322 } else {
1323 for ( i = 0; i < dev->mc_count; i++ ) {
1324 if ( i < 3 ) {
1325 TLan_SetMac( dev, i + 1, (char *) &dmi->dmi_addr );
1326 } else {
1327 offset = TLan_HashFunc( (u8 *) &dmi->dmi_addr );
1328 if ( offset < 32 )
1329 hash1 |= ( 1 << offset );
1330 else
1331 hash2 |= ( 1 << ( offset - 32 ) );
1332 }
1333 dmi = dmi->next;
1334 }
1335 for ( ; i < 3; i++ )
1336 TLan_SetMac( dev, i + 1, NULL );
1337 TLan_DioWrite32( dev->base_addr, TLAN_HASH_1, hash1 );
1338 TLan_DioWrite32( dev->base_addr, TLAN_HASH_2, hash2 );
1339 }
1340 }
1341
1342} /* TLan_SetMulticastList */
1343
1344
1345
1346/*****************************************************************************
1347******************************************************************************
1348
1349 ThunderLAN Driver Interrupt Vectors and Table
1350
1351 Please see Chap. 4, "Interrupt Handling" of the "ThunderLAN
1352 Programmer's Guide" for more informations on handling interrupts
1353 generated by TLAN based adapters.
1354
1355******************************************************************************
1356*****************************************************************************/
1357
1358
1359 /***************************************************************
1360 * TLan_HandleInvalid
1361 *
1362 * Returns:
1363 * 0
1364 * Parms:
1365 * dev Device assigned the IRQ that was
1366 * raised.
1367 * host_int The contents of the HOST_INT
1368 * port.
1369 *
1370 * This function handles invalid interrupts. This should
1371 * never happen unless some other adapter is trying to use
1372 * the IRQ line assigned to the device.
1373 *
1374 **************************************************************/
1375
1376u32 TLan_HandleInvalid( struct net_device *dev, u16 host_int )
1377{
1378 /* printk( "TLAN: Invalid interrupt on %s.\n", dev->name ); */
1379 return 0;
1380
1381} /* TLan_HandleInvalid */
1382
1383
1384
1385
1386 /***************************************************************
1387 * TLan_HandleTxEOF
1388 *
1389 * Returns:
1390 * 1
1391 * Parms:
1392 * dev Device assigned the IRQ that was
1393 * raised.
1394 * host_int The contents of the HOST_INT
1395 * port.
1396 *
1397 * This function handles Tx EOF interrupts which are raised
1398 * by the adapter when it has completed sending the
1399 * contents of a buffer. If detemines which list/buffer
1400 * was completed and resets it. If the buffer was the last
1401 * in the channel (EOC), then the function checks to see if
1402 * another buffer is ready to send, and if so, sends a Tx
1403 * Go command. Finally, the driver activates/continues the
1404 * activity LED.
1405 *
1406 **************************************************************/
1407
1408u32 TLan_HandleTxEOF( struct net_device *dev, u16 host_int )
1409{
1410 TLanPrivateInfo *priv = netdev_priv(dev);
1411 int eoc = 0;
1412 TLanList *head_list;
1413 dma_addr_t head_list_phys;
1414 u32 ack = 0;
1415 u16 tmpCStat;
1416
1417 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOF (Head=%d Tail=%d)\n", priv->txHead, priv->txTail );
1418 head_list = priv->txList + priv->txHead;
1419
1420 while (((tmpCStat = head_list->cStat ) & TLAN_CSTAT_FRM_CMP) && (ack < 255)) {
1421 ack++;
1422 if ( ! bbuf ) {
1423 struct sk_buff *skb = TLan_GetSKB(head_list);
1424 pci_unmap_single(priv->pciDev, head_list->buffer[0].address, skb->len, PCI_DMA_TODEVICE);
1425 dev_kfree_skb_any(skb);
1426 head_list->buffer[8].address = 0;
1427 head_list->buffer[9].address = 0;
1428 }
1429
1430 if ( tmpCStat & TLAN_CSTAT_EOC )
1431 eoc = 1;
1432
1433 priv->stats.tx_bytes += head_list->frameSize;
1434
1435 head_list->cStat = TLAN_CSTAT_UNUSED;
1436 netif_start_queue(dev);
1437 CIRC_INC( priv->txHead, TLAN_NUM_TX_LISTS );
1438 head_list = priv->txList + priv->txHead;
1439 }
1440
1441 if (!ack)
1442 printk(KERN_INFO "TLAN: Received interrupt for uncompleted TX frame.\n");
1443
1444 if ( eoc ) {
1445 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOC (Head=%d Tail=%d)\n", priv->txHead, priv->txTail );
1446 head_list = priv->txList + priv->txHead;
1447 head_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txHead;
1448 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) {
1449 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM );
1450 ack |= TLAN_HC_GO;
1451 } else {
1452 priv->txInProgress = 0;
1453 }
1454 }
1455
1456 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) {
1457 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT );
1458 if ( priv->timer.function == NULL ) {
1459 priv->timer.function = &TLan_Timer;
1460 priv->timer.data = (unsigned long) dev;
1461 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
1462 priv->timerSetAt = jiffies;
1463 priv->timerType = TLAN_TIMER_ACTIVITY;
1464 add_timer(&priv->timer);
1465 } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) {
1466 priv->timerSetAt = jiffies;
1467 }
1468 }
1469
1470 return ack;
1471
1472} /* TLan_HandleTxEOF */
1473
1474
1475
1476
1477 /***************************************************************
1478 * TLan_HandleStatOverflow
1479 *
1480 * Returns:
1481 * 1
1482 * Parms:
1483 * dev Device assigned the IRQ that was
1484 * raised.
1485 * host_int The contents of the HOST_INT
1486 * port.
1487 *
1488 * This function handles the Statistics Overflow interrupt
1489 * which means that one or more of the TLAN statistics
1490 * registers has reached 1/2 capacity and needs to be read.
1491 *
1492 **************************************************************/
1493
1494u32 TLan_HandleStatOverflow( struct net_device *dev, u16 host_int )
1495{
1496 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1497
1498 return 1;
1499
1500} /* TLan_HandleStatOverflow */
1501
1502
1503
1504
1505 /***************************************************************
1506 * TLan_HandleRxEOF
1507 *
1508 * Returns:
1509 * 1
1510 * Parms:
1511 * dev Device assigned the IRQ that was
1512 * raised.
1513 * host_int The contents of the HOST_INT
1514 * port.
1515 *
1516 * This function handles the Rx EOF interrupt which
1517 * indicates a frame has been received by the adapter from
1518 * the net and the frame has been transferred to memory.
1519 * The function determines the bounce buffer the frame has
1520 * been loaded into, creates a new sk_buff big enough to
1521 * hold the frame, and sends it to protocol stack. It
1522 * then resets the used buffer and appends it to the end
1523 * of the list. If the frame was the last in the Rx
1524 * channel (EOC), the function restarts the receive channel
1525 * by sending an Rx Go command to the adapter. Then it
1526 * activates/continues the activity LED.
1527 *
1528 **************************************************************/
1529
1530u32 TLan_HandleRxEOF( struct net_device *dev, u16 host_int )
1531{
1532 TLanPrivateInfo *priv = netdev_priv(dev);
1533 u32 ack = 0;
1534 int eoc = 0;
1535 u8 *head_buffer;
1536 TLanList *head_list;
1537 struct sk_buff *skb;
1538 TLanList *tail_list;
1539 void *t;
1540 u32 frameSize;
1541 u16 tmpCStat;
1542 dma_addr_t head_list_phys;
1543
1544 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOF (Head=%d Tail=%d)\n", priv->rxHead, priv->rxTail );
1545 head_list = priv->rxList + priv->rxHead;
1546 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1547
1548 while (((tmpCStat = head_list->cStat) & TLAN_CSTAT_FRM_CMP) && (ack < 255)) {
1549 frameSize = head_list->frameSize;
1550 ack++;
1551 if (tmpCStat & TLAN_CSTAT_EOC)
1552 eoc = 1;
1553
1554 if (bbuf) {
1555 skb = dev_alloc_skb(frameSize + 7);
1556 if (skb == NULL)
1557 printk(KERN_INFO "TLAN: Couldn't allocate memory for received data.\n");
1558 else {
1559 head_buffer = priv->rxBuffer + (priv->rxHead * TLAN_MAX_FRAME_SIZE);
1560 skb->dev = dev;
1561 skb_reserve(skb, 2);
1562 t = (void *) skb_put(skb, frameSize);
1563
1564 priv->stats.rx_bytes += head_list->frameSize;
1565
1566 memcpy( t, head_buffer, frameSize );
1567 skb->protocol = eth_type_trans( skb, dev );
1568 netif_rx( skb );
1569 }
1570 } else {
1571 struct sk_buff *new_skb;
1572
1573 /*
1574 * I changed the algorithm here. What we now do
1575 * is allocate the new frame. If this fails we
1576 * simply recycle the frame.
1577 */
1578
1579 new_skb = dev_alloc_skb( TLAN_MAX_FRAME_SIZE + 7 );
1580
1581 if ( new_skb != NULL ) {
1582 skb = TLan_GetSKB(head_list);
1583 pci_unmap_single(priv->pciDev, head_list->buffer[0].address, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
1584 skb_trim( skb, frameSize );
1585
1586 priv->stats.rx_bytes += frameSize;
1587
1588 skb->protocol = eth_type_trans( skb, dev );
1589 netif_rx( skb );
1590
1591 new_skb->dev = dev;
1592 skb_reserve( new_skb, 2 );
1593 t = (void *) skb_put( new_skb, TLAN_MAX_FRAME_SIZE );
1594 head_list->buffer[0].address = pci_map_single(priv->pciDev, new_skb->data, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
1595 head_list->buffer[8].address = (u32) t;
1596 TLan_StoreSKB(head_list, new_skb);
1597 } else
1598 printk(KERN_WARNING "TLAN: Couldn't allocate memory for received data.\n" );
1599 }
1600
1601 head_list->forward = 0;
1602 head_list->cStat = 0;
1603 tail_list = priv->rxList + priv->rxTail;
1604 tail_list->forward = head_list_phys;
1605
1606 CIRC_INC( priv->rxHead, TLAN_NUM_RX_LISTS );
1607 CIRC_INC( priv->rxTail, TLAN_NUM_RX_LISTS );
1608 head_list = priv->rxList + priv->rxHead;
1609 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1610 }
1611
1612 if (!ack)
1613 printk(KERN_INFO "TLAN: Received interrupt for uncompleted RX frame.\n");
1614
1615
1616
1617
1618 if ( eoc ) {
1619 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOC (Head=%d Tail=%d)\n", priv->rxHead, priv->rxTail );
1620 head_list = priv->rxList + priv->rxHead;
1621 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1622 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM );
1623 ack |= TLAN_HC_GO | TLAN_HC_RT;
1624 priv->rxEocCount++;
1625 }
1626
1627 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) {
1628 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT );
1629 if ( priv->timer.function == NULL ) {
1630 priv->timer.function = &TLan_Timer;
1631 priv->timer.data = (unsigned long) dev;
1632 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
1633 priv->timerSetAt = jiffies;
1634 priv->timerType = TLAN_TIMER_ACTIVITY;
1635 add_timer(&priv->timer);
1636 } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) {
1637 priv->timerSetAt = jiffies;
1638 }
1639 }
1640
1641 dev->last_rx = jiffies;
1642
1643 return ack;
1644
1645} /* TLan_HandleRxEOF */
1646
1647
1648
1649
1650 /***************************************************************
1651 * TLan_HandleDummy
1652 *
1653 * Returns:
1654 * 1
1655 * Parms:
1656 * dev Device assigned the IRQ that was
1657 * raised.
1658 * host_int The contents of the HOST_INT
1659 * port.
1660 *
1661 * This function handles the Dummy interrupt, which is
1662 * raised whenever a test interrupt is generated by setting
1663 * the Req_Int bit of HOST_CMD to 1.
1664 *
1665 **************************************************************/
1666
1667u32 TLan_HandleDummy( struct net_device *dev, u16 host_int )
1668{
1669 printk( "TLAN: Test interrupt on %s.\n", dev->name );
1670 return 1;
1671
1672} /* TLan_HandleDummy */
1673
1674
1675
1676
1677 /***************************************************************
1678 * TLan_HandleTxEOC
1679 *
1680 * Returns:
1681 * 1
1682 * Parms:
1683 * dev Device assigned the IRQ that was
1684 * raised.
1685 * host_int The contents of the HOST_INT
1686 * port.
1687 *
1688 * This driver is structured to determine EOC occurrences by
1689 * reading the CSTAT member of the list structure. Tx EOC
1690 * interrupts are disabled via the DIO INTDIS register.
1691 * However, TLAN chips before revision 3.0 didn't have this
1692 * functionality, so process EOC events if this is the
1693 * case.
1694 *
1695 **************************************************************/
1696
1697u32 TLan_HandleTxEOC( struct net_device *dev, u16 host_int )
1698{
1699 TLanPrivateInfo *priv = netdev_priv(dev);
1700 TLanList *head_list;
1701 dma_addr_t head_list_phys;
1702 u32 ack = 1;
1703
1704 host_int = 0;
1705 if ( priv->tlanRev < 0x30 ) {
1706 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOC (Head=%d Tail=%d) -- IRQ\n", priv->txHead, priv->txTail );
1707 head_list = priv->txList + priv->txHead;
1708 head_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txHead;
1709 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) {
1710 netif_stop_queue(dev);
1711 outl( head_list_phys, dev->base_addr + TLAN_CH_PARM );
1712 ack |= TLAN_HC_GO;
1713 } else {
1714 priv->txInProgress = 0;
1715 }
1716 }
1717
1718 return ack;
1719
1720} /* TLan_HandleTxEOC */
1721
1722
1723
1724
1725 /***************************************************************
1726 * TLan_HandleStatusCheck
1727 *
1728 * Returns:
1729 * 0 if Adapter check, 1 if Network Status check.
1730 * Parms:
1731 * dev Device assigned the IRQ that was
1732 * raised.
1733 * host_int The contents of the HOST_INT
1734 * port.
1735 *
1736 * This function handles Adapter Check/Network Status
1737 * interrupts generated by the adapter. It checks the
1738 * vector in the HOST_INT register to determine if it is
1739 * an Adapter Check interrupt. If so, it resets the
1740 * adapter. Otherwise it clears the status registers
1741 * and services the PHY.
1742 *
1743 **************************************************************/
1744
1745u32 TLan_HandleStatusCheck( struct net_device *dev, u16 host_int )
1746{
1747 TLanPrivateInfo *priv = netdev_priv(dev);
1748 u32 ack;
1749 u32 error;
1750 u8 net_sts;
1751 u32 phy;
1752 u16 tlphy_ctl;
1753 u16 tlphy_sts;
1754
1755 ack = 1;
1756 if ( host_int & TLAN_HI_IV_MASK ) {
1757 netif_stop_queue( dev );
1758 error = inl( dev->base_addr + TLAN_CH_PARM );
1759 printk( "TLAN: %s: Adaptor Error = 0x%x\n", dev->name, error );
1760 TLan_ReadAndClearStats( dev, TLAN_RECORD );
1761 outl( TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD );
1762
1763 schedule_work(&priv->tlan_tqueue);
1764
1765 netif_wake_queue(dev);
1766 ack = 0;
1767 } else {
1768 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Status Check\n", dev->name );
1769 phy = priv->phy[priv->phyNum];
1770
1771 net_sts = TLan_DioRead8( dev->base_addr, TLAN_NET_STS );
1772 if ( net_sts ) {
1773 TLan_DioWrite8( dev->base_addr, TLAN_NET_STS, net_sts );
1774 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Net_Sts = %x\n", dev->name, (unsigned) net_sts );
1775 }
1776 if ( ( net_sts & TLAN_NET_STS_MIRQ ) && ( priv->phyNum == 0 ) ) {
1777 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_STS, &tlphy_sts );
1778 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl );
1779 if ( ! ( tlphy_sts & TLAN_TS_POLOK ) && ! ( tlphy_ctl & TLAN_TC_SWAPOL ) ) {
1780 tlphy_ctl |= TLAN_TC_SWAPOL;
1781 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
1782 } else if ( ( tlphy_sts & TLAN_TS_POLOK ) && ( tlphy_ctl & TLAN_TC_SWAPOL ) ) {
1783 tlphy_ctl &= ~TLAN_TC_SWAPOL;
1784 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
1785 }
1786
1787 if (debug) {
1788 TLan_PhyPrint( dev );
1789 }
1790 }
1791 }
1792
1793 return ack;
1794
1795} /* TLan_HandleStatusCheck */
1796
1797
1798
1799
1800 /***************************************************************
1801 * TLan_HandleRxEOC
1802 *
1803 * Returns:
1804 * 1
1805 * Parms:
1806 * dev Device assigned the IRQ that was
1807 * raised.
1808 * host_int The contents of the HOST_INT
1809 * port.
1810 *
1811 * This driver is structured to determine EOC occurrences by
1812 * reading the CSTAT member of the list structure. Rx EOC
1813 * interrupts are disabled via the DIO INTDIS register.
1814 * However, TLAN chips before revision 3.0 didn't have this
1815 * CSTAT member or a INTDIS register, so if this chip is
1816 * pre-3.0, process EOC interrupts normally.
1817 *
1818 **************************************************************/
1819
1820u32 TLan_HandleRxEOC( struct net_device *dev, u16 host_int )
1821{
1822 TLanPrivateInfo *priv = netdev_priv(dev);
1823 dma_addr_t head_list_phys;
1824 u32 ack = 1;
1825
1826 if ( priv->tlanRev < 0x30 ) {
1827 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOC (Head=%d Tail=%d) -- IRQ\n", priv->rxHead, priv->rxTail );
1828 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead;
1829 outl( head_list_phys, dev->base_addr + TLAN_CH_PARM );
1830 ack |= TLAN_HC_GO | TLAN_HC_RT;
1831 priv->rxEocCount++;
1832 }
1833
1834 return ack;
1835
1836} /* TLan_HandleRxEOC */
1837
1838
1839
1840
1841/*****************************************************************************
1842******************************************************************************
1843
1844 ThunderLAN Driver Timer Function
1845
1846******************************************************************************
1847*****************************************************************************/
1848
1849
1850 /***************************************************************
1851 * TLan_Timer
1852 *
1853 * Returns:
1854 * Nothing
1855 * Parms:
1856 * data A value given to add timer when
1857 * add_timer was called.
1858 *
1859 * This function handles timed functionality for the
1860 * TLAN driver. The two current timer uses are for
1861 * delaying for autonegotionation and driving the ACT LED.
1862 * - Autonegotiation requires being allowed about
1863 * 2 1/2 seconds before attempting to transmit a
1864 * packet. It would be a very bad thing to hang
1865 * the kernel this long, so the driver doesn't
1866 * allow transmission 'til after this time, for
1867 * certain PHYs. It would be much nicer if all
1868 * PHYs were interrupt-capable like the internal
1869 * PHY.
1870 * - The ACT LED, which shows adapter activity, is
1871 * driven by the driver, and so must be left on
1872 * for a short period to power up the LED so it
1873 * can be seen. This delay can be changed by
1874 * changing the TLAN_TIMER_ACT_DELAY in tlan.h,
1875 * if desired. 100 ms produces a slightly
1876 * sluggish response.
1877 *
1878 **************************************************************/
1879
1880void TLan_Timer( unsigned long data )
1881{
1882 struct net_device *dev = (struct net_device *) data;
1883 TLanPrivateInfo *priv = netdev_priv(dev);
1884 u32 elapsed;
1885 unsigned long flags = 0;
1886
1887 priv->timer.function = NULL;
1888
1889 switch ( priv->timerType ) {
1890#ifdef MONITOR
1891 case TLAN_TIMER_LINK_BEAT:
1892 TLan_PhyMonitor( dev );
1893 break;
1894#endif
1895 case TLAN_TIMER_PHY_PDOWN:
1896 TLan_PhyPowerDown( dev );
1897 break;
1898 case TLAN_TIMER_PHY_PUP:
1899 TLan_PhyPowerUp( dev );
1900 break;
1901 case TLAN_TIMER_PHY_RESET:
1902 TLan_PhyReset( dev );
1903 break;
1904 case TLAN_TIMER_PHY_START_LINK:
1905 TLan_PhyStartLink( dev );
1906 break;
1907 case TLAN_TIMER_PHY_FINISH_AN:
1908 TLan_PhyFinishAutoNeg( dev );
1909 break;
1910 case TLAN_TIMER_FINISH_RESET:
1911 TLan_FinishReset( dev );
1912 break;
1913 case TLAN_TIMER_ACTIVITY:
1914 spin_lock_irqsave(&priv->lock, flags);
1915 if ( priv->timer.function == NULL ) {
1916 elapsed = jiffies - priv->timerSetAt;
1917 if ( elapsed >= TLAN_TIMER_ACT_DELAY ) {
1918 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
1919 } else {
1920 priv->timer.function = &TLan_Timer;
1921 priv->timer.expires = priv->timerSetAt + TLAN_TIMER_ACT_DELAY;
1922 spin_unlock_irqrestore(&priv->lock, flags);
1923 add_timer( &priv->timer );
1924 break;
1925 }
1926 }
1927 spin_unlock_irqrestore(&priv->lock, flags);
1928 break;
1929 default:
1930 break;
1931 }
1932
1933} /* TLan_Timer */
1934
1935
1936
1937
1938/*****************************************************************************
1939******************************************************************************
1940
1941 ThunderLAN Driver Adapter Related Routines
1942
1943******************************************************************************
1944*****************************************************************************/
1945
1946
1947 /***************************************************************
1948 * TLan_ResetLists
1949 *
1950 * Returns:
1951 * Nothing
1952 * Parms:
1953 * dev The device structure with the list
1954 * stuctures to be reset.
1955 *
1956 * This routine sets the variables associated with managing
1957 * the TLAN lists to their initial values.
1958 *
1959 **************************************************************/
1960
1961void TLan_ResetLists( struct net_device *dev )
1962{
1963 TLanPrivateInfo *priv = netdev_priv(dev);
1964 int i;
1965 TLanList *list;
1966 dma_addr_t list_phys;
1967 struct sk_buff *skb;
1968 void *t = NULL;
1969
1970 priv->txHead = 0;
1971 priv->txTail = 0;
1972 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) {
1973 list = priv->txList + i;
1974 list->cStat = TLAN_CSTAT_UNUSED;
1975 if ( bbuf ) {
1976 list->buffer[0].address = priv->txBufferDMA + ( i * TLAN_MAX_FRAME_SIZE );
1977 } else {
1978 list->buffer[0].address = 0;
1979 }
1980 list->buffer[2].count = 0;
1981 list->buffer[2].address = 0;
1982 list->buffer[8].address = 0;
1983 list->buffer[9].address = 0;
1984 }
1985
1986 priv->rxHead = 0;
1987 priv->rxTail = TLAN_NUM_RX_LISTS - 1;
1988 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) {
1989 list = priv->rxList + i;
1990 list_phys = priv->rxListDMA + sizeof(TLanList) * i;
1991 list->cStat = TLAN_CSTAT_READY;
1992 list->frameSize = TLAN_MAX_FRAME_SIZE;
1993 list->buffer[0].count = TLAN_MAX_FRAME_SIZE | TLAN_LAST_BUFFER;
1994 if ( bbuf ) {
1995 list->buffer[0].address = priv->rxBufferDMA + ( i * TLAN_MAX_FRAME_SIZE );
1996 } else {
1997 skb = dev_alloc_skb( TLAN_MAX_FRAME_SIZE + 7 );
1998 if ( skb == NULL ) {
1999 printk( "TLAN: Couldn't allocate memory for received data.\n" );
2000 /* If this ever happened it would be a problem */
2001 } else {
2002 skb->dev = dev;
2003 skb_reserve( skb, 2 );
2004 t = (void *) skb_put( skb, TLAN_MAX_FRAME_SIZE );
2005 }
2006 list->buffer[0].address = pci_map_single(priv->pciDev, t, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
2007 list->buffer[8].address = (u32) t;
2008 TLan_StoreSKB(list, skb);
2009 }
2010 list->buffer[1].count = 0;
2011 list->buffer[1].address = 0;
2012 if ( i < TLAN_NUM_RX_LISTS - 1 )
2013 list->forward = list_phys + sizeof(TLanList);
2014 else
2015 list->forward = 0;
2016 }
2017
2018} /* TLan_ResetLists */
2019
2020
2021void TLan_FreeLists( struct net_device *dev )
2022{
2023 TLanPrivateInfo *priv = netdev_priv(dev);
2024 int i;
2025 TLanList *list;
2026 struct sk_buff *skb;
2027
2028 if ( ! bbuf ) {
2029 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) {
2030 list = priv->txList + i;
2031 skb = TLan_GetSKB(list);
2032 if ( skb ) {
2033 pci_unmap_single(priv->pciDev, list->buffer[0].address, skb->len, PCI_DMA_TODEVICE);
2034 dev_kfree_skb_any( skb );
2035 list->buffer[8].address = 0;
2036 list->buffer[9].address = 0;
2037 }
2038 }
2039
2040 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) {
2041 list = priv->rxList + i;
2042 skb = TLan_GetSKB(list);
2043 if ( skb ) {
2044 pci_unmap_single(priv->pciDev, list->buffer[0].address, TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
2045 dev_kfree_skb_any( skb );
2046 list->buffer[8].address = 0;
2047 list->buffer[9].address = 0;
2048 }
2049 }
2050 }
2051} /* TLan_FreeLists */
2052
2053
2054
2055
2056 /***************************************************************
2057 * TLan_PrintDio
2058 *
2059 * Returns:
2060 * Nothing
2061 * Parms:
2062 * io_base Base IO port of the device of
2063 * which to print DIO registers.
2064 *
2065 * This function prints out all the internal (DIO)
2066 * registers of a TLAN chip.
2067 *
2068 **************************************************************/
2069
2070void TLan_PrintDio( u16 io_base )
2071{
2072 u32 data0, data1;
2073 int i;
2074
2075 printk( "TLAN: Contents of internal registers for io base 0x%04hx.\n", io_base );
2076 printk( "TLAN: Off. +0 +4\n" );
2077 for ( i = 0; i < 0x4C; i+= 8 ) {
2078 data0 = TLan_DioRead32( io_base, i );
2079 data1 = TLan_DioRead32( io_base, i + 0x4 );
2080 printk( "TLAN: 0x%02x 0x%08x 0x%08x\n", i, data0, data1 );
2081 }
2082
2083} /* TLan_PrintDio */
2084
2085
2086
2087
2088 /***************************************************************
2089 * TLan_PrintList
2090 *
2091 * Returns:
2092 * Nothing
2093 * Parms:
2094 * list A pointer to the TLanList structure to
2095 * be printed.
2096 * type A string to designate type of list,
2097 * "Rx" or "Tx".
2098 * num The index of the list.
2099 *
2100 * This function prints out the contents of the list
2101 * pointed to by the list parameter.
2102 *
2103 **************************************************************/
2104
2105void TLan_PrintList( TLanList *list, char *type, int num)
2106{
2107 int i;
2108
2109 printk( "TLAN: %s List %d at 0x%08x\n", type, num, (u32) list );
2110 printk( "TLAN: Forward = 0x%08x\n", list->forward );
2111 printk( "TLAN: CSTAT = 0x%04hx\n", list->cStat );
2112 printk( "TLAN: Frame Size = 0x%04hx\n", list->frameSize );
2113 /* for ( i = 0; i < 10; i++ ) { */
2114 for ( i = 0; i < 2; i++ ) {
2115 printk( "TLAN: Buffer[%d].count, addr = 0x%08x, 0x%08x\n", i, list->buffer[i].count, list->buffer[i].address );
2116 }
2117
2118} /* TLan_PrintList */
2119
2120
2121
2122
2123 /***************************************************************
2124 * TLan_ReadAndClearStats
2125 *
2126 * Returns:
2127 * Nothing
2128 * Parms:
2129 * dev Pointer to device structure of adapter
2130 * to which to read stats.
2131 * record Flag indicating whether to add
2132 *
2133 * This functions reads all the internal status registers
2134 * of the TLAN chip, which clears them as a side effect.
2135 * It then either adds the values to the device's status
2136 * struct, or discards them, depending on whether record
2137 * is TLAN_RECORD (!=0) or TLAN_IGNORE (==0).
2138 *
2139 **************************************************************/
2140
2141void TLan_ReadAndClearStats( struct net_device *dev, int record )
2142{
2143 TLanPrivateInfo *priv = netdev_priv(dev);
2144 u32 tx_good, tx_under;
2145 u32 rx_good, rx_over;
2146 u32 def_tx, crc, code;
2147 u32 multi_col, single_col;
2148 u32 excess_col, late_col, loss;
2149
2150 outw( TLAN_GOOD_TX_FRMS, dev->base_addr + TLAN_DIO_ADR );
2151 tx_good = inb( dev->base_addr + TLAN_DIO_DATA );
2152 tx_good += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2153 tx_good += inb( dev->base_addr + TLAN_DIO_DATA + 2 ) << 16;
2154 tx_under = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
2155
2156 outw( TLAN_GOOD_RX_FRMS, dev->base_addr + TLAN_DIO_ADR );
2157 rx_good = inb( dev->base_addr + TLAN_DIO_DATA );
2158 rx_good += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2159 rx_good += inb( dev->base_addr + TLAN_DIO_DATA + 2 ) << 16;
2160 rx_over = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
2161
2162 outw( TLAN_DEFERRED_TX, dev->base_addr + TLAN_DIO_ADR );
2163 def_tx = inb( dev->base_addr + TLAN_DIO_DATA );
2164 def_tx += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2165 crc = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2166 code = inb( dev->base_addr + TLAN_DIO_DATA + 3 );
2167
2168 outw( TLAN_MULTICOL_FRMS, dev->base_addr + TLAN_DIO_ADR );
2169 multi_col = inb( dev->base_addr + TLAN_DIO_DATA );
2170 multi_col += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8;
2171 single_col = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2172 single_col += inb( dev->base_addr + TLAN_DIO_DATA + 3 ) << 8;
2173
2174 outw( TLAN_EXCESSCOL_FRMS, dev->base_addr + TLAN_DIO_ADR );
2175 excess_col = inb( dev->base_addr + TLAN_DIO_DATA );
2176 late_col = inb( dev->base_addr + TLAN_DIO_DATA + 1 );
2177 loss = inb( dev->base_addr + TLAN_DIO_DATA + 2 );
2178
2179 if ( record ) {
2180 priv->stats.rx_packets += rx_good;
2181 priv->stats.rx_errors += rx_over + crc + code;
2182 priv->stats.tx_packets += tx_good;
2183 priv->stats.tx_errors += tx_under + loss;
2184 priv->stats.collisions += multi_col + single_col + excess_col + late_col;
2185
2186 priv->stats.rx_over_errors += rx_over;
2187 priv->stats.rx_crc_errors += crc;
2188 priv->stats.rx_frame_errors += code;
2189
2190 priv->stats.tx_aborted_errors += tx_under;
2191 priv->stats.tx_carrier_errors += loss;
2192 }
2193
2194} /* TLan_ReadAndClearStats */
2195
2196
2197
2198
2199 /***************************************************************
2200 * TLan_Reset
2201 *
2202 * Returns:
2203 * 0
2204 * Parms:
2205 * dev Pointer to device structure of adapter
2206 * to be reset.
2207 *
2208 * This function resets the adapter and it's physical
2209 * device. See Chap. 3, pp. 9-10 of the "ThunderLAN
2210 * Programmer's Guide" for details. The routine tries to
2211 * implement what is detailed there, though adjustments
2212 * have been made.
2213 *
2214 **************************************************************/
2215
2216void
2217TLan_ResetAdapter( struct net_device *dev )
2218{
2219 TLanPrivateInfo *priv = netdev_priv(dev);
2220 int i;
2221 u32 addr;
2222 u32 data;
2223 u8 data8;
2224
2225 priv->tlanFullDuplex = FALSE;
2226 priv->phyOnline=0;
2227 netif_carrier_off(dev);
2228
2229/* 1. Assert reset bit. */
2230
2231 data = inl(dev->base_addr + TLAN_HOST_CMD);
2232 data |= TLAN_HC_AD_RST;
2233 outl(data, dev->base_addr + TLAN_HOST_CMD);
2234
2235 udelay(1000);
2236
2237/* 2. Turn off interrupts. ( Probably isn't necessary ) */
2238
2239 data = inl(dev->base_addr + TLAN_HOST_CMD);
2240 data |= TLAN_HC_INT_OFF;
2241 outl(data, dev->base_addr + TLAN_HOST_CMD);
2242
2243/* 3. Clear AREGs and HASHs. */
2244
2245 for ( i = TLAN_AREG_0; i <= TLAN_HASH_2; i += 4 ) {
2246 TLan_DioWrite32( dev->base_addr, (u16) i, 0 );
2247 }
2248
2249/* 4. Setup NetConfig register. */
2250
2251 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2252 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, (u16) data );
2253
2254/* 5. Load Ld_Tmr and Ld_Thr in HOST_CMD. */
2255
2256 outl( TLAN_HC_LD_TMR | 0x3f, dev->base_addr + TLAN_HOST_CMD );
2257 outl( TLAN_HC_LD_THR | 0x9, dev->base_addr + TLAN_HOST_CMD );
2258
2259/* 6. Unreset the MII by setting NMRST (in NetSio) to 1. */
2260
2261 outw( TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR );
2262 addr = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
2263 TLan_SetBit( TLAN_NET_SIO_NMRST, addr );
2264
2265/* 7. Setup the remaining registers. */
2266
2267 if ( priv->tlanRev >= 0x30 ) {
2268 data8 = TLAN_ID_TX_EOC | TLAN_ID_RX_EOC;
2269 TLan_DioWrite8( dev->base_addr, TLAN_INT_DIS, data8 );
2270 }
2271 TLan_PhyDetect( dev );
2272 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN;
2273
2274 if ( priv->adapter->flags & TLAN_ADAPTER_BIT_RATE_PHY ) {
2275 data |= TLAN_NET_CFG_BIT;
2276 if ( priv->aui == 1 ) {
2277 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x0a );
2278 } else if ( priv->duplex == TLAN_DUPLEX_FULL ) {
2279 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x00 );
2280 priv->tlanFullDuplex = TRUE;
2281 } else {
2282 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x08 );
2283 }
2284 }
2285
2286 if ( priv->phyNum == 0 ) {
2287 data |= TLAN_NET_CFG_PHY_EN;
2288 }
2289 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, (u16) data );
2290
2291 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2292 TLan_FinishReset( dev );
2293 } else {
2294 TLan_PhyPowerDown( dev );
2295 }
2296
2297} /* TLan_ResetAdapter */
2298
2299
2300
2301
2302void
2303TLan_FinishReset( struct net_device *dev )
2304{
2305 TLanPrivateInfo *priv = netdev_priv(dev);
2306 u8 data;
2307 u32 phy;
2308 u8 sio;
2309 u16 status;
2310 u16 partner;
2311 u16 tlphy_ctl;
2312 u16 tlphy_par;
2313 u16 tlphy_id1, tlphy_id2;
2314 int i;
2315
2316 phy = priv->phy[priv->phyNum];
2317
2318 data = TLAN_NET_CMD_NRESET | TLAN_NET_CMD_NWRAP;
2319 if ( priv->tlanFullDuplex ) {
2320 data |= TLAN_NET_CMD_DUPLEX;
2321 }
2322 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, data );
2323 data = TLAN_NET_MASK_MASK4 | TLAN_NET_MASK_MASK5;
2324 if ( priv->phyNum == 0 ) {
2325 data |= TLAN_NET_MASK_MASK7;
2326 }
2327 TLan_DioWrite8( dev->base_addr, TLAN_NET_MASK, data );
2328 TLan_DioWrite16( dev->base_addr, TLAN_MAX_RX, ((1536)+7)&~7 );
2329 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &tlphy_id1 );
2330 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &tlphy_id2 );
2331
2332 if ( ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) || ( priv->aui ) ) {
2333 status = MII_GS_LINK;
2334 printk( "TLAN: %s: Link forced.\n", dev->name );
2335 } else {
2336 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2337 udelay( 1000 );
2338 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2339 if ( (status & MII_GS_LINK) && /* We only support link info on Nat.Sem. PHY's */
2340 (tlphy_id1 == NAT_SEM_ID1) &&
2341 (tlphy_id2 == NAT_SEM_ID2) ) {
2342 TLan_MiiReadReg( dev, phy, MII_AN_LPA, &partner );
2343 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_PAR, &tlphy_par );
2344
2345 printk( "TLAN: %s: Link active with ", dev->name );
2346 if (!(tlphy_par & TLAN_PHY_AN_EN_STAT)) {
2347 printk( "forced 10%sMbps %s-Duplex\n",
2348 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0",
2349 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half");
2350 } else {
2351 printk( "AutoNegotiation enabled, at 10%sMbps %s-Duplex\n",
2352 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0",
2353 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half");
2354 printk("TLAN: Partner capability: ");
2355 for (i = 5; i <= 10; i++)
2356 if (partner & (1<<i))
2357 printk("%s",media[i-5]);
2358 printk("\n");
2359 }
2360
2361 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
2362#ifdef MONITOR
2363 /* We have link beat..for now anyway */
2364 priv->link = 1;
2365 /*Enabling link beat monitoring */
2366 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_LINK_BEAT );
2367#endif
2368 } else if (status & MII_GS_LINK) {
2369 printk( "TLAN: %s: Link active\n", dev->name );
2370 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK );
2371 }
2372 }
2373
2374 if ( priv->phyNum == 0 ) {
2375 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl );
2376 tlphy_ctl |= TLAN_TC_INTEN;
2377 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl );
2378 sio = TLan_DioRead8( dev->base_addr, TLAN_NET_SIO );
2379 sio |= TLAN_NET_SIO_MINTEN;
2380 TLan_DioWrite8( dev->base_addr, TLAN_NET_SIO, sio );
2381 }
2382
2383 if ( status & MII_GS_LINK ) {
2384 TLan_SetMac( dev, 0, dev->dev_addr );
2385 priv->phyOnline = 1;
2386 outb( ( TLAN_HC_INT_ON >> 8 ), dev->base_addr + TLAN_HOST_CMD + 1 );
2387 if ( debug >= 1 && debug != TLAN_DEBUG_PROBE ) {
2388 outb( ( TLAN_HC_REQ_INT >> 8 ), dev->base_addr + TLAN_HOST_CMD + 1 );
2389 }
2390 outl( priv->rxListDMA, dev->base_addr + TLAN_CH_PARM );
2391 outl( TLAN_HC_GO | TLAN_HC_RT, dev->base_addr + TLAN_HOST_CMD );
2392 netif_carrier_on(dev);
2393 } else {
2394 printk( "TLAN: %s: Link inactive, will retry in 10 secs...\n", dev->name );
2395 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_FINISH_RESET );
2396 return;
2397 }
James Harper562faf42005-05-05 15:14:18 -07002398 TLan_SetMulticastList(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002399
2400} /* TLan_FinishReset */
2401
2402
2403
2404
2405 /***************************************************************
2406 * TLan_SetMac
2407 *
2408 * Returns:
2409 * Nothing
2410 * Parms:
2411 * dev Pointer to device structure of adapter
2412 * on which to change the AREG.
2413 * areg The AREG to set the address in (0 - 3).
2414 * mac A pointer to an array of chars. Each
2415 * element stores one byte of the address.
2416 * IE, it isn't in ascii.
2417 *
2418 * This function transfers a MAC address to one of the
2419 * TLAN AREGs (address registers). The TLAN chip locks
2420 * the register on writing to offset 0 and unlocks the
2421 * register after writing to offset 5. If NULL is passed
2422 * in mac, then the AREG is filled with 0's.
2423 *
2424 **************************************************************/
2425
2426void TLan_SetMac( struct net_device *dev, int areg, char *mac )
2427{
2428 int i;
2429
2430 areg *= 6;
2431
2432 if ( mac != NULL ) {
2433 for ( i = 0; i < 6; i++ )
2434 TLan_DioWrite8( dev->base_addr, TLAN_AREG_0 + areg + i, mac[i] );
2435 } else {
2436 for ( i = 0; i < 6; i++ )
2437 TLan_DioWrite8( dev->base_addr, TLAN_AREG_0 + areg + i, 0 );
2438 }
2439
2440} /* TLan_SetMac */
2441
2442
2443
2444
2445/*****************************************************************************
2446******************************************************************************
2447
2448 ThunderLAN Driver PHY Layer Routines
2449
2450******************************************************************************
2451*****************************************************************************/
2452
2453
2454
2455 /*********************************************************************
2456 * TLan_PhyPrint
2457 *
2458 * Returns:
2459 * Nothing
2460 * Parms:
2461 * dev A pointer to the device structure of the
2462 * TLAN device having the PHYs to be detailed.
2463 *
2464 * This function prints the registers a PHY (aka transceiver).
2465 *
2466 ********************************************************************/
2467
2468void TLan_PhyPrint( struct net_device *dev )
2469{
2470 TLanPrivateInfo *priv = netdev_priv(dev);
2471 u16 i, data0, data1, data2, data3, phy;
2472
2473 phy = priv->phy[priv->phyNum];
2474
2475 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2476 printk( "TLAN: Device %s, Unmanaged PHY.\n", dev->name );
2477 } else if ( phy <= TLAN_PHY_MAX_ADDR ) {
2478 printk( "TLAN: Device %s, PHY 0x%02x.\n", dev->name, phy );
2479 printk( "TLAN: Off. +0 +1 +2 +3 \n" );
2480 for ( i = 0; i < 0x20; i+= 4 ) {
2481 printk( "TLAN: 0x%02x", i );
2482 TLan_MiiReadReg( dev, phy, i, &data0 );
2483 printk( " 0x%04hx", data0 );
2484 TLan_MiiReadReg( dev, phy, i + 1, &data1 );
2485 printk( " 0x%04hx", data1 );
2486 TLan_MiiReadReg( dev, phy, i + 2, &data2 );
2487 printk( " 0x%04hx", data2 );
2488 TLan_MiiReadReg( dev, phy, i + 3, &data3 );
2489 printk( " 0x%04hx\n", data3 );
2490 }
2491 } else {
2492 printk( "TLAN: Device %s, Invalid PHY.\n", dev->name );
2493 }
2494
2495} /* TLan_PhyPrint */
2496
2497
2498
2499
2500 /*********************************************************************
2501 * TLan_PhyDetect
2502 *
2503 * Returns:
2504 * Nothing
2505 * Parms:
2506 * dev A pointer to the device structure of the adapter
2507 * for which the PHY needs determined.
2508 *
2509 * So far I've found that adapters which have external PHYs
2510 * may also use the internal PHY for part of the functionality.
2511 * (eg, AUI/Thinnet). This function finds out if this TLAN
2512 * chip has an internal PHY, and then finds the first external
2513 * PHY (starting from address 0) if it exists).
2514 *
2515 ********************************************************************/
2516
2517void TLan_PhyDetect( struct net_device *dev )
2518{
2519 TLanPrivateInfo *priv = netdev_priv(dev);
2520 u16 control;
2521 u16 hi;
2522 u16 lo;
2523 u32 phy;
2524
2525 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
2526 priv->phyNum = 0xFFFF;
2527 return;
2528 }
2529
2530 TLan_MiiReadReg( dev, TLAN_PHY_MAX_ADDR, MII_GEN_ID_HI, &hi );
2531
2532 if ( hi != 0xFFFF ) {
2533 priv->phy[0] = TLAN_PHY_MAX_ADDR;
2534 } else {
2535 priv->phy[0] = TLAN_PHY_NONE;
2536 }
2537
2538 priv->phy[1] = TLAN_PHY_NONE;
2539 for ( phy = 0; phy <= TLAN_PHY_MAX_ADDR; phy++ ) {
2540 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &control );
2541 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &hi );
2542 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &lo );
2543 if ( ( control != 0xFFFF ) || ( hi != 0xFFFF ) || ( lo != 0xFFFF ) ) {
2544 TLAN_DBG( TLAN_DEBUG_GNRL, "PHY found at %02x %04x %04x %04x\n", phy, control, hi, lo );
2545 if ( ( priv->phy[1] == TLAN_PHY_NONE ) && ( phy != TLAN_PHY_MAX_ADDR ) ) {
2546 priv->phy[1] = phy;
2547 }
2548 }
2549 }
2550
2551 if ( priv->phy[1] != TLAN_PHY_NONE ) {
2552 priv->phyNum = 1;
2553 } else if ( priv->phy[0] != TLAN_PHY_NONE ) {
2554 priv->phyNum = 0;
2555 } else {
2556 printk( "TLAN: Cannot initialize device, no PHY was found!\n" );
2557 }
2558
2559} /* TLan_PhyDetect */
2560
2561
2562
2563
2564void TLan_PhyPowerDown( struct net_device *dev )
2565{
2566 TLanPrivateInfo *priv = netdev_priv(dev);
2567 u16 value;
2568
2569 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Powering down PHY(s).\n", dev->name );
2570 value = MII_GC_PDOWN | MII_GC_LOOPBK | MII_GC_ISOLATE;
2571 TLan_MiiSync( dev->base_addr );
2572 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value );
2573 if ( ( priv->phyNum == 0 ) && ( priv->phy[1] != TLAN_PHY_NONE ) && ( ! ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) ) ) {
2574 TLan_MiiSync( dev->base_addr );
2575 TLan_MiiWriteReg( dev, priv->phy[1], MII_GEN_CTL, value );
2576 }
2577
2578 /* Wait for 50 ms and powerup
2579 * This is abitrary. It is intended to make sure the
2580 * transceiver settles.
2581 */
2582 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_PUP );
2583
2584} /* TLan_PhyPowerDown */
2585
2586
2587
2588
2589void TLan_PhyPowerUp( struct net_device *dev )
2590{
2591 TLanPrivateInfo *priv = netdev_priv(dev);
2592 u16 value;
2593
2594 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Powering up PHY.\n", dev->name );
2595 TLan_MiiSync( dev->base_addr );
2596 value = MII_GC_LOOPBK;
2597 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value );
2598 TLan_MiiSync(dev->base_addr);
2599 /* Wait for 500 ms and reset the
2600 * transceiver. The TLAN docs say both 50 ms and
2601 * 500 ms, so do the longer, just in case.
2602 */
2603 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_RESET );
2604
2605} /* TLan_PhyPowerUp */
2606
2607
2608
2609
2610void TLan_PhyReset( struct net_device *dev )
2611{
2612 TLanPrivateInfo *priv = netdev_priv(dev);
2613 u16 phy;
2614 u16 value;
2615
2616 phy = priv->phy[priv->phyNum];
2617
2618 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Reseting PHY.\n", dev->name );
2619 TLan_MiiSync( dev->base_addr );
2620 value = MII_GC_LOOPBK | MII_GC_RESET;
2621 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, value );
2622 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &value );
2623 while ( value & MII_GC_RESET ) {
2624 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &value );
2625 }
2626
2627 /* Wait for 500 ms and initialize.
2628 * I don't remember why I wait this long.
2629 * I've changed this to 50ms, as it seems long enough.
2630 */
2631 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_START_LINK );
2632
2633} /* TLan_PhyReset */
2634
2635
2636
2637
2638void TLan_PhyStartLink( struct net_device *dev )
2639{
2640 TLanPrivateInfo *priv = netdev_priv(dev);
2641 u16 ability;
2642 u16 control;
2643 u16 data;
2644 u16 phy;
2645 u16 status;
2646 u16 tctl;
2647
2648 phy = priv->phy[priv->phyNum];
2649 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Trying to activate link.\n", dev->name );
2650 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2651 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &ability );
2652
2653 if ( ( status & MII_GS_AUTONEG ) &&
2654 ( ! priv->aui ) ) {
2655 ability = status >> 11;
2656 if ( priv->speed == TLAN_SPEED_10 &&
2657 priv->duplex == TLAN_DUPLEX_HALF) {
2658 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x0000);
2659 } else if ( priv->speed == TLAN_SPEED_10 &&
2660 priv->duplex == TLAN_DUPLEX_FULL) {
2661 priv->tlanFullDuplex = TRUE;
2662 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x0100);
2663 } else if ( priv->speed == TLAN_SPEED_100 &&
2664 priv->duplex == TLAN_DUPLEX_HALF) {
2665 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x2000);
2666 } else if ( priv->speed == TLAN_SPEED_100 &&
2667 priv->duplex == TLAN_DUPLEX_FULL) {
2668 priv->tlanFullDuplex = TRUE;
2669 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x2100);
2670 } else {
2671
2672 /* Set Auto-Neg advertisement */
2673 TLan_MiiWriteReg( dev, phy, MII_AN_ADV, (ability << 5) | 1);
2674 /* Enablee Auto-Neg */
2675 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x1000 );
2676 /* Restart Auto-Neg */
2677 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x1200 );
2678 /* Wait for 4 sec for autonegotiation
2679 * to complete. The max spec time is less than this
2680 * but the card need additional time to start AN.
2681 * .5 sec should be plenty extra.
2682 */
2683 printk( "TLAN: %s: Starting autonegotiation.\n", dev->name );
2684 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_PHY_FINISH_AN );
2685 return;
2686 }
2687
2688 }
2689
2690 if ( ( priv->aui ) && ( priv->phyNum != 0 ) ) {
2691 priv->phyNum = 0;
2692 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2693 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data );
2694 TLan_SetTimer( dev, (40*HZ/1000), TLAN_TIMER_PHY_PDOWN );
2695 return;
2696 } else if ( priv->phyNum == 0 ) {
2697 control = 0;
2698 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tctl );
2699 if ( priv->aui ) {
2700 tctl |= TLAN_TC_AUISEL;
2701 } else {
2702 tctl &= ~TLAN_TC_AUISEL;
2703 if ( priv->duplex == TLAN_DUPLEX_FULL ) {
2704 control |= MII_GC_DUPLEX;
2705 priv->tlanFullDuplex = TRUE;
2706 }
2707 if ( priv->speed == TLAN_SPEED_100 ) {
2708 control |= MII_GC_SPEEDSEL;
2709 }
2710 }
2711 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, control );
2712 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tctl );
2713 }
2714
2715 /* Wait for 2 sec to give the transceiver time
2716 * to establish link.
2717 */
2718 TLan_SetTimer( dev, (4*HZ), TLAN_TIMER_FINISH_RESET );
2719
2720} /* TLan_PhyStartLink */
2721
2722
2723
2724
2725void TLan_PhyFinishAutoNeg( struct net_device *dev )
2726{
2727 TLanPrivateInfo *priv = netdev_priv(dev);
2728 u16 an_adv;
2729 u16 an_lpa;
2730 u16 data;
2731 u16 mode;
2732 u16 phy;
2733 u16 status;
2734
2735 phy = priv->phy[priv->phyNum];
2736
2737 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2738 udelay( 1000 );
2739 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status );
2740
2741 if ( ! ( status & MII_GS_AUTOCMPLT ) ) {
2742 /* Wait for 8 sec to give the process
2743 * more time. Perhaps we should fail after a while.
2744 */
2745 if (!priv->neg_be_verbose++) {
2746 printk(KERN_INFO "TLAN: Giving autonegotiation more time.\n");
2747 printk(KERN_INFO "TLAN: Please check that your adapter has\n");
2748 printk(KERN_INFO "TLAN: been properly connected to a HUB or Switch.\n");
2749 printk(KERN_INFO "TLAN: Trying to establish link in the background...\n");
2750 }
2751 TLan_SetTimer( dev, (8*HZ), TLAN_TIMER_PHY_FINISH_AN );
2752 return;
2753 }
2754
2755 printk( "TLAN: %s: Autonegotiation complete.\n", dev->name );
2756 TLan_MiiReadReg( dev, phy, MII_AN_ADV, &an_adv );
2757 TLan_MiiReadReg( dev, phy, MII_AN_LPA, &an_lpa );
2758 mode = an_adv & an_lpa & 0x03E0;
2759 if ( mode & 0x0100 ) {
2760 priv->tlanFullDuplex = TRUE;
2761 } else if ( ! ( mode & 0x0080 ) && ( mode & 0x0040 ) ) {
2762 priv->tlanFullDuplex = TRUE;
2763 }
2764
2765 if ( ( ! ( mode & 0x0180 ) ) && ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) && ( priv->phyNum != 0 ) ) {
2766 priv->phyNum = 0;
2767 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2768 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data );
2769 TLan_SetTimer( dev, (400*HZ/1000), TLAN_TIMER_PHY_PDOWN );
2770 return;
2771 }
2772
2773 if ( priv->phyNum == 0 ) {
2774 if ( ( priv->duplex == TLAN_DUPLEX_FULL ) || ( an_adv & an_lpa & 0x0040 ) ) {
2775 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, MII_GC_AUTOENB | MII_GC_DUPLEX );
2776 printk( "TLAN: Starting internal PHY with FULL-DUPLEX\n" );
2777 } else {
2778 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, MII_GC_AUTOENB );
2779 printk( "TLAN: Starting internal PHY with HALF-DUPLEX\n" );
2780 }
2781 }
2782
2783 /* Wait for 100 ms. No reason in partiticular.
2784 */
2785 TLan_SetTimer( dev, (HZ/10), TLAN_TIMER_FINISH_RESET );
2786
2787} /* TLan_PhyFinishAutoNeg */
2788
2789#ifdef MONITOR
2790
2791 /*********************************************************************
2792 *
2793 * TLan_phyMonitor
2794 *
2795 * Returns:
2796 * None
2797 *
2798 * Params:
2799 * dev The device structure of this device.
2800 *
2801 *
2802 * This function monitors PHY condition by reading the status
2803 * register via the MII bus. This can be used to give info
2804 * about link changes (up/down), and possible switch to alternate
2805 * media.
2806 *
2807 * ******************************************************************/
2808
2809void TLan_PhyMonitor( struct net_device *dev )
2810{
2811 TLanPrivateInfo *priv = netdev_priv(dev);
2812 u16 phy;
2813 u16 phy_status;
2814
2815 phy = priv->phy[priv->phyNum];
2816
2817 /* Get PHY status register */
2818 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &phy_status );
2819
2820 /* Check if link has been lost */
2821 if (!(phy_status & MII_GS_LINK)) {
2822 if (priv->link) {
2823 priv->link = 0;
2824 printk(KERN_DEBUG "TLAN: %s has lost link\n", dev->name);
7d17c1d2005-05-12 19:45:25 -04002825 netif_carrier_off(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002826 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_LINK_BEAT );
2827 return;
2828 }
2829 }
2830
2831 /* Link restablished? */
2832 if ((phy_status & MII_GS_LINK) && !priv->link) {
2833 priv->link = 1;
2834 printk(KERN_DEBUG "TLAN: %s has reestablished link\n", dev->name);
7d17c1d2005-05-12 19:45:25 -04002835 netif_carrier_on(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002836 }
2837
2838 /* Setup a new monitor */
2839 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_LINK_BEAT );
2840}
2841
2842#endif /* MONITOR */
2843
2844
2845/*****************************************************************************
2846******************************************************************************
2847
2848 ThunderLAN Driver MII Routines
2849
2850 These routines are based on the information in Chap. 2 of the
2851 "ThunderLAN Programmer's Guide", pp. 15-24.
2852
2853******************************************************************************
2854*****************************************************************************/
2855
2856
2857 /***************************************************************
2858 * TLan_MiiReadReg
2859 *
2860 * Returns:
2861 * 0 if ack received ok
2862 * 1 otherwise.
2863 *
2864 * Parms:
2865 * dev The device structure containing
2866 * The io address and interrupt count
2867 * for this device.
2868 * phy The address of the PHY to be queried.
2869 * reg The register whose contents are to be
Matt Mackall4a4efbd2006-01-03 13:27:11 +01002870 * retrieved.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002871 * val A pointer to a variable to store the
2872 * retrieved value.
2873 *
Matt Mackall4a4efbd2006-01-03 13:27:11 +01002874 * This function uses the TLAN's MII bus to retrieve the contents
Linus Torvalds1da177e2005-04-16 15:20:36 -07002875 * of a given register on a PHY. It sends the appropriate info
2876 * and then reads the 16-bit register value from the MII bus via
2877 * the TLAN SIO register.
2878 *
2879 **************************************************************/
2880
2881int TLan_MiiReadReg( struct net_device *dev, u16 phy, u16 reg, u16 *val )
2882{
2883 u8 nack;
2884 u16 sio, tmp;
2885 u32 i;
2886 int err;
2887 int minten;
2888 TLanPrivateInfo *priv = netdev_priv(dev);
2889 unsigned long flags = 0;
2890
2891 err = FALSE;
2892 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
2893 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
2894
2895 if (!in_irq())
2896 spin_lock_irqsave(&priv->lock, flags);
2897
2898 TLan_MiiSync(dev->base_addr);
2899
2900 minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio );
2901 if ( minten )
2902 TLan_ClearBit(TLAN_NET_SIO_MINTEN, sio);
2903
2904 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Start ( 01b ) */
2905 TLan_MiiSendData( dev->base_addr, 0x2, 2 ); /* Read ( 10b ) */
2906 TLan_MiiSendData( dev->base_addr, phy, 5 ); /* Device # */
2907 TLan_MiiSendData( dev->base_addr, reg, 5 ); /* Register # */
2908
2909
2910 TLan_ClearBit(TLAN_NET_SIO_MTXEN, sio); /* Change direction */
2911
2912 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Clock Idle bit */
2913 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2914 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Wait 300ns */
2915
2916 nack = TLan_GetBit(TLAN_NET_SIO_MDATA, sio); /* Check for ACK */
2917 TLan_SetBit(TLAN_NET_SIO_MCLK, sio); /* Finish ACK */
2918 if (nack) { /* No ACK, so fake it */
2919 for (i = 0; i < 16; i++) {
2920 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio);
2921 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2922 }
2923 tmp = 0xffff;
2924 err = TRUE;
2925 } else { /* ACK, so read data */
2926 for (tmp = 0, i = 0x8000; i; i >>= 1) {
2927 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio);
2928 if (TLan_GetBit(TLAN_NET_SIO_MDATA, sio))
2929 tmp |= i;
2930 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2931 }
2932 }
2933
2934
2935 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Idle cycle */
2936 TLan_SetBit(TLAN_NET_SIO_MCLK, sio);
2937
2938 if ( minten )
2939 TLan_SetBit(TLAN_NET_SIO_MINTEN, sio);
2940
2941 *val = tmp;
2942
2943 if (!in_irq())
2944 spin_unlock_irqrestore(&priv->lock, flags);
2945
2946 return err;
2947
2948} /* TLan_MiiReadReg */
2949
2950
2951
2952
2953 /***************************************************************
2954 * TLan_MiiSendData
2955 *
2956 * Returns:
2957 * Nothing
2958 * Parms:
2959 * base_port The base IO port of the adapter in
2960 * question.
2961 * dev The address of the PHY to be queried.
2962 * data The value to be placed on the MII bus.
2963 * num_bits The number of bits in data that are to
2964 * be placed on the MII bus.
2965 *
2966 * This function sends on sequence of bits on the MII
2967 * configuration bus.
2968 *
2969 **************************************************************/
2970
2971void TLan_MiiSendData( u16 base_port, u32 data, unsigned num_bits )
2972{
2973 u16 sio;
2974 u32 i;
2975
2976 if ( num_bits == 0 )
2977 return;
2978
2979 outw( TLAN_NET_SIO, base_port + TLAN_DIO_ADR );
2980 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
2981 TLan_SetBit( TLAN_NET_SIO_MTXEN, sio );
2982
2983 for ( i = ( 0x1 << ( num_bits - 1 ) ); i; i >>= 1 ) {
2984 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio );
2985 (void) TLan_GetBit( TLAN_NET_SIO_MCLK, sio );
2986 if ( data & i )
2987 TLan_SetBit( TLAN_NET_SIO_MDATA, sio );
2988 else
2989 TLan_ClearBit( TLAN_NET_SIO_MDATA, sio );
2990 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
2991 (void) TLan_GetBit( TLAN_NET_SIO_MCLK, sio );
2992 }
2993
2994} /* TLan_MiiSendData */
2995
2996
2997
2998
2999 /***************************************************************
3000 * TLan_MiiSync
3001 *
3002 * Returns:
3003 * Nothing
3004 * Parms:
3005 * base_port The base IO port of the adapter in
3006 * question.
3007 *
3008 * This functions syncs all PHYs in terms of the MII configuration
3009 * bus.
3010 *
3011 **************************************************************/
3012
3013void TLan_MiiSync( u16 base_port )
3014{
3015 int i;
3016 u16 sio;
3017
3018 outw( TLAN_NET_SIO, base_port + TLAN_DIO_ADR );
3019 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
3020
3021 TLan_ClearBit( TLAN_NET_SIO_MTXEN, sio );
3022 for ( i = 0; i < 32; i++ ) {
3023 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio );
3024 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
3025 }
3026
3027} /* TLan_MiiSync */
3028
3029
3030
3031
3032 /***************************************************************
3033 * TLan_MiiWriteReg
3034 *
3035 * Returns:
3036 * Nothing
3037 * Parms:
3038 * dev The device structure for the device
3039 * to write to.
3040 * phy The address of the PHY to be written to.
3041 * reg The register whose contents are to be
3042 * written.
3043 * val The value to be written to the register.
3044 *
3045 * This function uses the TLAN's MII bus to write the contents of a
3046 * given register on a PHY. It sends the appropriate info and then
3047 * writes the 16-bit register value from the MII configuration bus
3048 * via the TLAN SIO register.
3049 *
3050 **************************************************************/
3051
3052void TLan_MiiWriteReg( struct net_device *dev, u16 phy, u16 reg, u16 val )
3053{
3054 u16 sio;
3055 int minten;
3056 unsigned long flags = 0;
3057 TLanPrivateInfo *priv = netdev_priv(dev);
3058
3059 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
3060 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
3061
3062 if (!in_irq())
3063 spin_lock_irqsave(&priv->lock, flags);
3064
3065 TLan_MiiSync( dev->base_addr );
3066
3067 minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio );
3068 if ( minten )
3069 TLan_ClearBit( TLAN_NET_SIO_MINTEN, sio );
3070
3071 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Start ( 01b ) */
3072 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Write ( 01b ) */
3073 TLan_MiiSendData( dev->base_addr, phy, 5 ); /* Device # */
3074 TLan_MiiSendData( dev->base_addr, reg, 5 ); /* Register # */
3075
3076 TLan_MiiSendData( dev->base_addr, 0x2, 2 ); /* Send ACK */
3077 TLan_MiiSendData( dev->base_addr, val, 16 ); /* Send Data */
3078
3079 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio ); /* Idle cycle */
3080 TLan_SetBit( TLAN_NET_SIO_MCLK, sio );
3081
3082 if ( minten )
3083 TLan_SetBit( TLAN_NET_SIO_MINTEN, sio );
3084
3085 if (!in_irq())
3086 spin_unlock_irqrestore(&priv->lock, flags);
3087
3088} /* TLan_MiiWriteReg */
3089
3090
3091
3092
3093/*****************************************************************************
3094******************************************************************************
3095
3096 ThunderLAN Driver Eeprom routines
3097
3098 The Compaq Netelligent 10 and 10/100 cards use a Microchip 24C02A
3099 EEPROM. These functions are based on information in Microchip's
3100 data sheet. I don't know how well this functions will work with
3101 other EEPROMs.
3102
3103******************************************************************************
3104*****************************************************************************/
3105
3106
3107 /***************************************************************
3108 * TLan_EeSendStart
3109 *
3110 * Returns:
3111 * Nothing
3112 * Parms:
3113 * io_base The IO port base address for the
3114 * TLAN device with the EEPROM to
3115 * use.
3116 *
3117 * This function sends a start cycle to an EEPROM attached
3118 * to a TLAN chip.
3119 *
3120 **************************************************************/
3121
3122void TLan_EeSendStart( u16 io_base )
3123{
3124 u16 sio;
3125
3126 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3127 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3128
3129 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3130 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3131 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3132 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
3133 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3134
3135} /* TLan_EeSendStart */
3136
3137
3138
3139
3140 /***************************************************************
3141 * TLan_EeSendByte
3142 *
3143 * Returns:
3144 * If the correct ack was received, 0, otherwise 1
3145 * Parms: io_base The IO port base address for the
3146 * TLAN device with the EEPROM to
3147 * use.
3148 * data The 8 bits of information to
3149 * send to the EEPROM.
3150 * stop If TLAN_EEPROM_STOP is passed, a
3151 * stop cycle is sent after the
3152 * byte is sent after the ack is
3153 * read.
3154 *
3155 * This function sends a byte on the serial EEPROM line,
3156 * driving the clock to send each bit. The function then
3157 * reverses transmission direction and reads an acknowledge
3158 * bit.
3159 *
3160 **************************************************************/
3161
3162int TLan_EeSendByte( u16 io_base, u8 data, int stop )
3163{
3164 int err;
3165 u8 place;
3166 u16 sio;
3167
3168 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3169 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3170
3171 /* Assume clock is low, tx is enabled; */
3172 for ( place = 0x80; place != 0; place >>= 1 ) {
3173 if ( place & data )
3174 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3175 else
3176 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio );
3177 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3178 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3179 }
3180 TLan_ClearBit( TLAN_NET_SIO_ETXEN, sio );
3181 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3182 err = TLan_GetBit( TLAN_NET_SIO_EDATA, sio );
3183 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3184 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3185
3186 if ( ( ! err ) && stop ) {
3187 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* STOP, raise data while clock is high */
3188 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3189 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3190 }
3191
3192 return ( err );
3193
3194} /* TLan_EeSendByte */
3195
3196
3197
3198
3199 /***************************************************************
3200 * TLan_EeReceiveByte
3201 *
3202 * Returns:
3203 * Nothing
3204 * Parms:
3205 * io_base The IO port base address for the
3206 * TLAN device with the EEPROM to
3207 * use.
3208 * data An address to a char to hold the
3209 * data sent from the EEPROM.
3210 * stop If TLAN_EEPROM_STOP is passed, a
3211 * stop cycle is sent after the
3212 * byte is received, and no ack is
3213 * sent.
3214 *
3215 * This function receives 8 bits of data from the EEPROM
3216 * over the serial link. It then sends and ack bit, or no
3217 * ack and a stop bit. This function is used to retrieve
3218 * data after the address of a byte in the EEPROM has been
3219 * sent.
3220 *
3221 **************************************************************/
3222
3223void TLan_EeReceiveByte( u16 io_base, u8 *data, int stop )
3224{
3225 u8 place;
3226 u16 sio;
3227
3228 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR );
3229 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3230 *data = 0;
3231
3232 /* Assume clock is low, tx is enabled; */
3233 TLan_ClearBit( TLAN_NET_SIO_ETXEN, sio );
3234 for ( place = 0x80; place; place >>= 1 ) {
3235 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3236 if ( TLan_GetBit( TLAN_NET_SIO_EDATA, sio ) )
3237 *data |= place;
3238 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3239 }
3240
3241 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio );
3242 if ( ! stop ) {
3243 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* Ack = 0 */
3244 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3245 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3246 } else {
3247 TLan_SetBit( TLAN_NET_SIO_EDATA, sio ); /* No ack = 1 (?) */
3248 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3249 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio );
3250 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* STOP, raise data while clock is high */
3251 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio );
3252 TLan_SetBit( TLAN_NET_SIO_EDATA, sio );
3253 }
3254
3255} /* TLan_EeReceiveByte */
3256
3257
3258
3259
3260 /***************************************************************
3261 * TLan_EeReadByte
3262 *
3263 * Returns:
3264 * No error = 0, else, the stage at which the error
3265 * occurred.
3266 * Parms:
3267 * io_base The IO port base address for the
3268 * TLAN device with the EEPROM to
3269 * use.
3270 * ee_addr The address of the byte in the
3271 * EEPROM whose contents are to be
3272 * retrieved.
3273 * data An address to a char to hold the
3274 * data obtained from the EEPROM.
3275 *
3276 * This function reads a byte of information from an byte
3277 * cell in the EEPROM.
3278 *
3279 **************************************************************/
3280
3281int TLan_EeReadByte( struct net_device *dev, u8 ee_addr, u8 *data )
3282{
3283 int err;
3284 TLanPrivateInfo *priv = netdev_priv(dev);
3285 unsigned long flags = 0;
3286 int ret=0;
3287
3288 spin_lock_irqsave(&priv->lock, flags);
3289
3290 TLan_EeSendStart( dev->base_addr );
3291 err = TLan_EeSendByte( dev->base_addr, 0xA0, TLAN_EEPROM_ACK );
3292 if (err)
3293 {
3294 ret=1;
3295 goto fail;
3296 }
3297 err = TLan_EeSendByte( dev->base_addr, ee_addr, TLAN_EEPROM_ACK );
3298 if (err)
3299 {
3300 ret=2;
3301 goto fail;
3302 }
3303 TLan_EeSendStart( dev->base_addr );
3304 err = TLan_EeSendByte( dev->base_addr, 0xA1, TLAN_EEPROM_ACK );
3305 if (err)
3306 {
3307 ret=3;
3308 goto fail;
3309 }
3310 TLan_EeReceiveByte( dev->base_addr, data, TLAN_EEPROM_STOP );
3311fail:
3312 spin_unlock_irqrestore(&priv->lock, flags);
3313
3314 return ret;
3315
3316} /* TLan_EeReadByte */
3317
3318
3319