blob: 27b0f6da7096537c1ad3b77507949330bfb2f6c7 [file] [log] [blame]
Troy Kiskya177f182013-12-16 18:13:03 -07001/*
2 * Copyright 2013 Boundary Devices, Inc.
3 * Copyright 2011 Freescale Semiconductor, Inc.
4 * Copyright 2011 Linaro Ltd.
5 *
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
Troy Kiskyda474d42013-12-18 14:51:44 -070013#include <dt-bindings/gpio/gpio.h>
14#include <dt-bindings/input/input.h>
Troy Kiskya177f182013-12-16 18:13:03 -070015
16/ {
Sascha Hauer48f51962014-05-07 15:19:00 +020017 chosen {
18 stdout-path = &uart2;
19 };
20
Troy Kiskya177f182013-12-16 18:13:03 -070021 memory {
22 reg = <0x10000000 0x40000000>;
23 };
24
25 regulators {
26 compatible = "simple-bus";
27 #address-cells = <1>;
28 #size-cells = <0>;
29
30 reg_2p5v: regulator@0 {
31 compatible = "regulator-fixed";
32 reg = <0>;
33 regulator-name = "2P5V";
34 regulator-min-microvolt = <2500000>;
35 regulator-max-microvolt = <2500000>;
36 regulator-always-on;
37 };
38
39 reg_3p3v: regulator@1 {
40 compatible = "regulator-fixed";
41 reg = <1>;
42 regulator-name = "3P3V";
43 regulator-min-microvolt = <3300000>;
44 regulator-max-microvolt = <3300000>;
45 regulator-always-on;
46 };
47
48 reg_usb_otg_vbus: regulator@2 {
49 compatible = "regulator-fixed";
50 reg = <2>;
51 regulator-name = "usb_otg_vbus";
52 regulator-min-microvolt = <5000000>;
53 regulator-max-microvolt = <5000000>;
54 gpio = <&gpio3 22 0>;
55 enable-active-high;
56 };
Peter Seiderer3e223392015-06-02 21:07:16 +020057
58 reg_can_xcvr: regulator@3 {
59 compatible = "regulator-fixed";
60 reg = <3>;
61 regulator-name = "CAN XCVR";
62 regulator-min-microvolt = <3300000>;
63 regulator-max-microvolt = <3300000>;
64 pinctrl-names = "default";
65 pinctrl-0 = <&pinctrl_can_xcvr>;
66 gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
67 };
Troy Kiskya177f182013-12-16 18:13:03 -070068 };
69
Troy Kiskyda474d42013-12-18 14:51:44 -070070 gpio-keys {
71 compatible = "gpio-keys";
72 pinctrl-names = "default";
73 pinctrl-0 = <&pinctrl_gpio_keys>;
74
75 power {
76 label = "Power Button";
77 gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
78 linux,code = <KEY_POWER>;
79 gpio-key,wakeup;
80 };
81
82 menu {
83 label = "Menu";
84 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
85 linux,code = <KEY_MENU>;
86 };
87
88 home {
89 label = "Home";
90 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
91 linux,code = <KEY_HOME>;
92 };
93
94 back {
95 label = "Back";
96 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
97 linux,code = <KEY_BACK>;
98 };
99
100 volume-up {
101 label = "Volume Up";
102 gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
103 linux,code = <KEY_VOLUMEUP>;
104 };
105
106 volume-down {
107 label = "Volume Down";
108 gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
109 linux,code = <KEY_VOLUMEDOWN>;
110 };
111 };
112
Troy Kiskya177f182013-12-16 18:13:03 -0700113 sound {
114 compatible = "fsl,imx6q-nitrogen6x-sgtl5000",
115 "fsl,imx-audio-sgtl5000";
116 model = "imx6q-nitrogen6x-sgtl5000";
117 ssi-controller = <&ssi1>;
118 audio-codec = <&codec>;
119 audio-routing =
120 "MIC_IN", "Mic Jack",
121 "Mic Jack", "Mic Bias",
122 "Headphone Jack", "HP_OUT";
123 mux-int-port = <1>;
124 mux-ext-port = <3>;
125 };
126
Gary Bisson9c3d8fa2015-09-30 15:05:19 +0200127 backlight_lcd: backlight_lcd {
Troy Kiskya177f182013-12-16 18:13:03 -0700128 compatible = "pwm-backlight";
129 pwms = <&pwm1 0 5000000>;
130 brightness-levels = <0 4 8 16 32 64 128 255>;
131 default-brightness-level = <7>;
132 power-supply = <&reg_3p3v>;
133 status = "okay";
134 };
135
Eric Nelson5d5c8652015-05-19 08:50:15 -0700136 backlight_lvds: backlight_lvds {
Troy Kiskya177f182013-12-16 18:13:03 -0700137 compatible = "pwm-backlight";
138 pwms = <&pwm4 0 5000000>;
139 brightness-levels = <0 4 8 16 32 64 128 255>;
140 default-brightness-level = <7>;
141 power-supply = <&reg_3p3v>;
142 status = "okay";
143 };
Eric Nelson5d5c8652015-05-19 08:50:15 -0700144
Gary Bisson9c3d8fa2015-09-30 15:05:19 +0200145 lcd_display: display@di0 {
146 compatible = "fsl,imx-parallel-display";
147 #address-cells = <1>;
148 #size-cells = <0>;
149 interface-pix-fmt = "bgr666";
150 pinctrl-names = "default";
151 pinctrl-0 = <&pinctrl_j15>;
152 status = "okay";
153
154 port@0 {
155 reg = <0>;
156
157 lcd_display_in: endpoint {
158 remote-endpoint = <&ipu1_di0_disp0>;
159 };
160 };
161
162 port@1 {
163 reg = <1>;
164
165 lcd_display_out: endpoint {
166 remote-endpoint = <&lcd_panel_in>;
167 };
168 };
169 };
170
171 lcd_panel {
172 compatible = "okaya,rs800480t-7x0gp";
173 backlight = <&backlight_lcd>;
174
175 port {
176 lcd_panel_in: endpoint {
177 remote-endpoint = <&lcd_display_out>;
178 };
179 };
180 };
181
Eric Nelson5d5c8652015-05-19 08:50:15 -0700182 panel {
183 compatible = "hannstar,hsd100pxn1";
184 backlight = <&backlight_lvds>;
185
186 port {
187 panel_in: endpoint {
188 remote-endpoint = <&lvds0_out>;
189 };
190 };
191 };
Troy Kiskya177f182013-12-16 18:13:03 -0700192};
193
194&audmux {
195 pinctrl-names = "default";
196 pinctrl-0 = <&pinctrl_audmux>;
197 status = "okay";
198};
199
Peter Seiderer3e223392015-06-02 21:07:16 +0200200&can1 {
201 pinctrl-names = "default";
202 pinctrl-0 = <&pinctrl_can1>;
203 xceiver-supply = <&reg_can_xcvr>;
204 status = "okay";
205};
206
Fabio Estevam7804fbc2015-06-29 13:16:54 -0300207&clks {
208 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
209 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
210 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
211 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
212};
213
Troy Kiskya177f182013-12-16 18:13:03 -0700214&ecspi1 {
215 fsl,spi-num-chipselects = <1>;
216 cs-gpios = <&gpio3 19 0>;
217 pinctrl-names = "default";
218 pinctrl-0 = <&pinctrl_ecspi1>;
219 status = "okay";
220
221 flash: m25p80@0 {
Rafał Miłecki79826ac2015-08-16 08:39:17 +0200222 compatible = "sst,sst25vf016b", "jedec,spi-nor";
Troy Kiskya177f182013-12-16 18:13:03 -0700223 spi-max-frequency = <20000000>;
224 reg = <0>;
225 };
226};
227
228&fec {
229 pinctrl-names = "default";
230 pinctrl-0 = <&pinctrl_enet>;
231 phy-mode = "rgmii";
232 phy-reset-gpios = <&gpio1 27 0>;
233 txen-skew-ps = <0>;
234 txc-skew-ps = <3000>;
235 rxdv-skew-ps = <0>;
236 rxc-skew-ps = <3000>;
237 rxd0-skew-ps = <0>;
238 rxd1-skew-ps = <0>;
239 rxd2-skew-ps = <0>;
240 rxd3-skew-ps = <0>;
241 txd0-skew-ps = <0>;
242 txd1-skew-ps = <0>;
243 txd2-skew-ps = <0>;
244 txd3-skew-ps = <0>;
Troy Kisky6261c4c2013-12-20 11:47:11 -0700245 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
246 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
Troy Kiskya177f182013-12-16 18:13:03 -0700247 status = "okay";
248};
249
Michael Olbrichd6536202014-07-25 12:49:52 +0200250&hdmi {
251 ddc-i2c-bus = <&i2c2>;
252 status = "okay";
253};
254
Troy Kiskya177f182013-12-16 18:13:03 -0700255&i2c1 {
256 clock-frequency = <100000>;
257 pinctrl-names = "default";
258 pinctrl-0 = <&pinctrl_i2c1>;
259 status = "okay";
260
261 codec: sgtl5000@0a {
262 compatible = "fsl,sgtl5000";
263 reg = <0x0a>;
264 clocks = <&clks 201>;
265 VDDA-supply = <&reg_2p5v>;
266 VDDIO-supply = <&reg_3p3v>;
267 };
Philipp Zabel7881fb32014-08-22 11:13:02 +0200268
269 rtc: rtc@6f {
270 compatible = "isil,isl1208";
271 reg = <0x6f>;
272 };
Troy Kiskya177f182013-12-16 18:13:03 -0700273};
274
Michael Olbrich43c3c002014-07-25 12:49:51 +0200275&i2c2 {
276 clock-frequency = <100000>;
277 pinctrl-names = "default";
278 pinctrl-0 = <&pinctrl_i2c2>;
279 status = "okay";
280};
281
Philipp Zabel1dffdd62014-07-25 12:49:53 +0200282&i2c3 {
283 clock-frequency = <100000>;
284 pinctrl-names = "default";
285 pinctrl-0 = <&pinctrl_i2c3>;
286 status = "okay";
Gary Bisson140fa362015-09-30 15:46:38 +0200287
288 touchscreen@04 {
289 compatible = "eeti,egalax_ts";
290 reg = <0x04>;
291 interrupt-parent = <&gpio1>;
292 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
293 wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
294 };
295
296 touchscreen@38 {
297 compatible = "edt,edt-ft5x06";
298 reg = <0x38>;
299 interrupt-parent = <&gpio1>;
300 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
301 };
Philipp Zabel1dffdd62014-07-25 12:49:53 +0200302};
303
Troy Kiskya177f182013-12-16 18:13:03 -0700304&iomuxc {
305 pinctrl-names = "default";
306 pinctrl-0 = <&pinctrl_hog>;
307
308 imx6q-nitrogen6x {
309 pinctrl_hog: hoggrp {
310 fsl,pins = <
311 /* SGTL5000 sys_mclk */
312 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0
Gary Bisson140fa362015-09-30 15:46:38 +0200313 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
Troy Kiskya177f182013-12-16 18:13:03 -0700314 >;
315 };
316
317 pinctrl_audmux: audmuxgrp {
318 fsl,pins = <
319 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
320 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
321 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
322 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
323 >;
324 };
325
Peter Seiderer3e223392015-06-02 21:07:16 +0200326 pinctrl_can1: can1grp {
327 fsl,pins = <
328 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
329 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0
330 >;
331 };
332
333 pinctrl_can_xcvr: can-xcvrgrp {
334 fsl,pins = <
335 /* Flexcan XCVR enable */
336 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
337 >;
338 };
339
Troy Kiskya177f182013-12-16 18:13:03 -0700340 pinctrl_ecspi1: ecspi1grp {
341 fsl,pins = <
342 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
343 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
344 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
345 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 /* CS */
346 >;
347 };
348
349 pinctrl_enet: enetgrp {
350 fsl,pins = <
351 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
352 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
353 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0
354 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0
355 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0
356 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0
357 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0
358 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
359 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
360 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
361 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
362 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
363 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
364 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
365 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
366 /* Phy reset */
367 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x000b0
Troy Kisky6261c4c2013-12-20 11:47:11 -0700368 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
Troy Kiskya177f182013-12-16 18:13:03 -0700369 >;
370 };
371
Troy Kiskyda474d42013-12-18 14:51:44 -0700372 pinctrl_gpio_keys: gpio_keysgrp {
373 fsl,pins = <
374 /* Power Button */
375 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
376 /* Menu Button */
377 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
378 /* Home Button */
379 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
380 /* Back Button */
381 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
382 /* Volume Up Button */
383 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
384 /* Volume Down Button */
385 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
386 >;
387 };
388
Troy Kiskya177f182013-12-16 18:13:03 -0700389 pinctrl_i2c1: i2c1grp {
390 fsl,pins = <
391 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
392 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
393 >;
394 };
395
Michael Olbrich43c3c002014-07-25 12:49:51 +0200396 pinctrl_i2c2: i2c2grp {
397 fsl,pins = <
398 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
399 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
400 >;
401 };
402
Philipp Zabel1dffdd62014-07-25 12:49:53 +0200403 pinctrl_i2c3: i2c3grp {
404 fsl,pins = <
405 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
406 MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
407 >;
408 };
409
Gary Bisson9c3d8fa2015-09-30 15:05:19 +0200410 pinctrl_j15: j15grp {
411 fsl,pins = <
412 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
413 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
414 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
415 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
416 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
417 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
418 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
419 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
420 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
421 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
422 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
423 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
424 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
425 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
426 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
427 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
428 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
429 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
430 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
431 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
432 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
433 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
434 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
435 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
436 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
437 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
438 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
439 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
440 >;
441 };
442
Troy Kiskya177f182013-12-16 18:13:03 -0700443 pinctrl_pwm1: pwm1grp {
444 fsl,pins = <
445 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
446 >;
447 };
448
449 pinctrl_pwm3: pwm3grp {
450 fsl,pins = <
451 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
452 >;
453 };
454
455 pinctrl_pwm4: pwm4grp {
456 fsl,pins = <
457 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
458 >;
459 };
460
461 pinctrl_uart1: uart1grp {
462 fsl,pins = <
463 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
464 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
465 >;
466 };
467
468 pinctrl_uart2: uart2grp {
469 fsl,pins = <
470 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
471 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
472 >;
473 };
474
475 pinctrl_usbotg: usbotggrp {
476 fsl,pins = <
477 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
478 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
479 /* power enable, high active */
480 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
481 >;
482 };
483
484 pinctrl_usdhc3: usdhc3grp {
485 fsl,pins = <
486 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
487 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
488 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
489 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
490 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
491 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
492 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
493 >;
494 };
495
496 pinctrl_usdhc4: usdhc4grp {
497 fsl,pins = <
498 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
499 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
500 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
501 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
502 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
503 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
504 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
505 >;
506 };
507 };
508};
509
Gary Bisson9c3d8fa2015-09-30 15:05:19 +0200510&ipu1_di0_disp0 {
511 remote-endpoint = <&lcd_display_in>;
512};
513
Troy Kiskya177f182013-12-16 18:13:03 -0700514&ldb {
515 status = "okay";
516
517 lvds-channel@0 {
518 fsl,data-mapping = "spwg";
519 fsl,data-width = <18>;
520 status = "okay";
521
Eric Nelson5d5c8652015-05-19 08:50:15 -0700522 port@4 {
523 reg = <4>;
524
525 lvds0_out: endpoint {
526 remote-endpoint = <&panel_in>;
Troy Kiskya177f182013-12-16 18:13:03 -0700527 };
528 };
529 };
530};
531
532&pcie {
533 status = "okay";
534};
535
536&pwm1 {
537 pinctrl-names = "default";
538 pinctrl-0 = <&pinctrl_pwm1>;
539 status = "okay";
540};
541
542&pwm3 {
543 pinctrl-names = "default";
544 pinctrl-0 = <&pinctrl_pwm3>;
545 status = "okay";
546};
547
548&pwm4 {
549 pinctrl-names = "default";
550 pinctrl-0 = <&pinctrl_pwm4>;
551 status = "okay";
552};
553
554&ssi1 {
Troy Kiskya177f182013-12-16 18:13:03 -0700555 status = "okay";
556};
557
558&uart1 {
559 pinctrl-names = "default";
560 pinctrl-0 = <&pinctrl_uart1>;
561 status = "okay";
562};
563
564&uart2 {
565 pinctrl-names = "default";
566 pinctrl-0 = <&pinctrl_uart2>;
567 status = "okay";
568};
569
570&usbh1 {
571 status = "okay";
572};
573
574&usbotg {
575 vbus-supply = <&reg_usb_otg_vbus>;
576 pinctrl-names = "default";
577 pinctrl-0 = <&pinctrl_usbotg>;
578 disable-over-current;
579 status = "okay";
580};
581
582&usdhc3 {
583 pinctrl-names = "default";
584 pinctrl-0 = <&pinctrl_usdhc3>;
Dong Aisheng89c1a8cf2015-07-22 20:53:02 +0800585 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
Troy Kiskya177f182013-12-16 18:13:03 -0700586 vmmc-supply = <&reg_3p3v>;
587 status = "okay";
588};
589
590&usdhc4 {
591 pinctrl-names = "default";
592 pinctrl-0 = <&pinctrl_usdhc4>;
Dong Aisheng89c1a8cf2015-07-22 20:53:02 +0800593 cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
Troy Kiskya177f182013-12-16 18:13:03 -0700594 vmmc-supply = <&reg_3p3v>;
595 status = "okay";
596};