blob: ac48115429ede1b95221eaa5112b3a98fe8d75a0 [file] [log] [blame]
Ben Gamari20172632009-02-17 20:08:50 -05001/*
2 * Copyright © 2008 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
26 *
27 */
28
29#include <linux/seq_file.h>
Chris Wilsonf3cd4742009-10-13 22:20:20 +010030#include <linux/debugfs.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090031#include <linux/slab.h>
Ben Gamari20172632009-02-17 20:08:50 -050032#include "drmP.h"
33#include "drm.h"
Simon Farnsworth4e5359c2010-09-01 17:47:52 +010034#include "intel_drv.h"
Ben Gamari20172632009-02-17 20:08:50 -050035#include "i915_drm.h"
36#include "i915_drv.h"
37
38#define DRM_I915_RING_DEBUG 1
39
40
41#if defined(CONFIG_DEBUG_FS)
42
Chris Wilson82690bb2010-09-18 01:37:30 +010043#define RENDER_LIST 1
44#define BSD_LIST 2
45#define FLUSHING_LIST 3
46#define INACTIVE_LIST 4
Ben Gamari433e12f2009-02-17 20:08:51 -050047
Chris Wilson70d39fe2010-08-25 16:03:34 +010048static const char *yesno(int v)
49{
50 return v ? "yes" : "no";
51}
52
53static int i915_capabilities(struct seq_file *m, void *data)
54{
55 struct drm_info_node *node = (struct drm_info_node *) m->private;
56 struct drm_device *dev = node->minor->dev;
57 const struct intel_device_info *info = INTEL_INFO(dev);
58
59 seq_printf(m, "gen: %d\n", info->gen);
60#define B(x) seq_printf(m, #x ": %s\n", yesno(info->x))
61 B(is_mobile);
Chris Wilson70d39fe2010-08-25 16:03:34 +010062 B(is_i85x);
63 B(is_i915g);
Chris Wilson70d39fe2010-08-25 16:03:34 +010064 B(is_i945gm);
Chris Wilson70d39fe2010-08-25 16:03:34 +010065 B(is_g33);
66 B(need_gfx_hws);
67 B(is_g4x);
68 B(is_pineview);
69 B(is_broadwater);
70 B(is_crestline);
71 B(is_ironlake);
72 B(has_fbc);
73 B(has_rc6);
74 B(has_pipe_cxsr);
75 B(has_hotplug);
76 B(cursor_needs_physical);
77 B(has_overlay);
78 B(overlay_needs_physical);
Chris Wilsona6c45cf2010-09-17 00:32:17 +010079 B(supports_tv);
Chris Wilson70d39fe2010-08-25 16:03:34 +010080#undef B
81
82 return 0;
83}
84
Chris Wilsona6172a82009-02-11 14:26:38 +000085static const char *get_pin_flag(struct drm_i915_gem_object *obj_priv)
86{
87 if (obj_priv->user_pin_count > 0)
88 return "P";
89 else if (obj_priv->pin_count > 0)
90 return "p";
91 else
92 return " ";
93}
94
95static const char *get_tiling_flag(struct drm_i915_gem_object *obj_priv)
96{
97 switch (obj_priv->tiling_mode) {
98 default:
99 case I915_TILING_NONE: return " ";
100 case I915_TILING_X: return "X";
101 case I915_TILING_Y: return "Y";
102 }
103}
104
Chris Wilson37811fc2010-08-25 22:45:57 +0100105static void
106describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
107{
108 seq_printf(m, "%p: %s%s %8zd %08x %08x %d%s%s",
109 &obj->base,
110 get_pin_flag(obj),
111 get_tiling_flag(obj),
112 obj->base.size,
113 obj->base.read_domains,
114 obj->base.write_domain,
115 obj->last_rendering_seqno,
116 obj->dirty ? " dirty" : "",
117 obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
118 if (obj->base.name)
119 seq_printf(m, " (name: %d)", obj->base.name);
120 if (obj->fence_reg != I915_FENCE_REG_NONE)
121 seq_printf(m, " (fence: %d)", obj->fence_reg);
122 if (obj->gtt_space != NULL)
123 seq_printf(m, " (gtt_offset: %08x)", obj->gtt_offset);
124}
125
Ben Gamari433e12f2009-02-17 20:08:51 -0500126static int i915_gem_object_list_info(struct seq_file *m, void *data)
Ben Gamari20172632009-02-17 20:08:50 -0500127{
128 struct drm_info_node *node = (struct drm_info_node *) m->private;
Ben Gamari433e12f2009-02-17 20:08:51 -0500129 uintptr_t list = (uintptr_t) node->info_ent->data;
130 struct list_head *head;
Ben Gamari20172632009-02-17 20:08:50 -0500131 struct drm_device *dev = node->minor->dev;
132 drm_i915_private_t *dev_priv = dev->dev_private;
133 struct drm_i915_gem_object *obj_priv;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100134 int ret;
135
136 ret = mutex_lock_interruptible(&dev->struct_mutex);
137 if (ret)
138 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500139
Ben Gamari433e12f2009-02-17 20:08:51 -0500140 switch (list) {
Chris Wilson82690bb2010-09-18 01:37:30 +0100141 case RENDER_LIST:
142 seq_printf(m, "Render:\n");
Zou Nan hai852835f2010-05-21 09:08:56 +0800143 head = &dev_priv->render_ring.active_list;
Ben Gamari433e12f2009-02-17 20:08:51 -0500144 break;
Chris Wilson82690bb2010-09-18 01:37:30 +0100145 case BSD_LIST:
146 seq_printf(m, "BSD:\n");
147 head = &dev_priv->bsd_ring.active_list;
148 break;
Ben Gamari433e12f2009-02-17 20:08:51 -0500149 case INACTIVE_LIST:
Ben Gamaria17458f2009-07-01 15:01:36 -0400150 seq_printf(m, "Inactive:\n");
Ben Gamari433e12f2009-02-17 20:08:51 -0500151 head = &dev_priv->mm.inactive_list;
152 break;
153 case FLUSHING_LIST:
154 seq_printf(m, "Flushing:\n");
155 head = &dev_priv->mm.flushing_list;
156 break;
157 default:
Chris Wilsonde227ef2010-07-03 07:58:38 +0100158 mutex_unlock(&dev->struct_mutex);
159 return -EINVAL;
Ben Gamari433e12f2009-02-17 20:08:51 -0500160 }
161
Chris Wilsonde227ef2010-07-03 07:58:38 +0100162 list_for_each_entry(obj_priv, head, list) {
Chris Wilson37811fc2010-08-25 22:45:57 +0100163 seq_printf(m, " ");
164 describe_obj(m, obj_priv);
Eric Anholtf4ceda82009-02-17 23:53:41 -0800165 seq_printf(m, "\n");
Ben Gamari20172632009-02-17 20:08:50 -0500166 }
Carl Worth5e118f42009-03-20 11:54:25 -0700167
Chris Wilsonde227ef2010-07-03 07:58:38 +0100168 mutex_unlock(&dev->struct_mutex);
Ben Gamari20172632009-02-17 20:08:50 -0500169 return 0;
170}
171
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100172static int i915_gem_pageflip_info(struct seq_file *m, void *data)
173{
174 struct drm_info_node *node = (struct drm_info_node *) m->private;
175 struct drm_device *dev = node->minor->dev;
176 unsigned long flags;
177 struct intel_crtc *crtc;
178
179 list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
180 const char *pipe = crtc->pipe ? "B" : "A";
181 const char *plane = crtc->plane ? "B" : "A";
182 struct intel_unpin_work *work;
183
184 spin_lock_irqsave(&dev->event_lock, flags);
185 work = crtc->unpin_work;
186 if (work == NULL) {
187 seq_printf(m, "No flip due on pipe %s (plane %s)\n",
188 pipe, plane);
189 } else {
190 if (!work->pending) {
191 seq_printf(m, "Flip queued on pipe %s (plane %s)\n",
192 pipe, plane);
193 } else {
194 seq_printf(m, "Flip pending (waiting for vsync) on pipe %s (plane %s)\n",
195 pipe, plane);
196 }
197 if (work->enable_stall_check)
198 seq_printf(m, "Stall check enabled, ");
199 else
200 seq_printf(m, "Stall check waiting for page flip ioctl, ");
201 seq_printf(m, "%d prepares\n", work->pending);
202
203 if (work->old_fb_obj) {
204 struct drm_i915_gem_object *obj_priv = to_intel_bo(work->old_fb_obj);
205 if(obj_priv)
206 seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj_priv->gtt_offset );
207 }
208 if (work->pending_flip_obj) {
209 struct drm_i915_gem_object *obj_priv = to_intel_bo(work->pending_flip_obj);
210 if(obj_priv)
211 seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj_priv->gtt_offset );
212 }
213 }
214 spin_unlock_irqrestore(&dev->event_lock, flags);
215 }
216
217 return 0;
218}
219
Ben Gamari20172632009-02-17 20:08:50 -0500220static int i915_gem_request_info(struct seq_file *m, void *data)
221{
222 struct drm_info_node *node = (struct drm_info_node *) m->private;
223 struct drm_device *dev = node->minor->dev;
224 drm_i915_private_t *dev_priv = dev->dev_private;
225 struct drm_i915_gem_request *gem_request;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100226 int ret;
227
228 ret = mutex_lock_interruptible(&dev->struct_mutex);
229 if (ret)
230 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500231
232 seq_printf(m, "Request:\n");
Zou Nan hai852835f2010-05-21 09:08:56 +0800233 list_for_each_entry(gem_request, &dev_priv->render_ring.request_list,
234 list) {
Ben Gamari20172632009-02-17 20:08:50 -0500235 seq_printf(m, " %d @ %d\n",
236 gem_request->seqno,
237 (int) (jiffies - gem_request->emitted_jiffies));
238 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100239 mutex_unlock(&dev->struct_mutex);
240
Ben Gamari20172632009-02-17 20:08:50 -0500241 return 0;
242}
243
244static int i915_gem_seqno_info(struct seq_file *m, void *data)
245{
246 struct drm_info_node *node = (struct drm_info_node *) m->private;
247 struct drm_device *dev = node->minor->dev;
248 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100249 int ret;
250
251 ret = mutex_lock_interruptible(&dev->struct_mutex);
252 if (ret)
253 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500254
Eric Anholte20f9c62010-05-26 14:51:06 -0700255 if (dev_priv->render_ring.status_page.page_addr != NULL) {
Ben Gamari20172632009-02-17 20:08:50 -0500256 seq_printf(m, "Current sequence: %d\n",
Zou Nan hai852835f2010-05-21 09:08:56 +0800257 i915_get_gem_seqno(dev, &dev_priv->render_ring));
Ben Gamari20172632009-02-17 20:08:50 -0500258 } else {
259 seq_printf(m, "Current sequence: hws uninitialized\n");
260 }
261 seq_printf(m, "Waiter sequence: %d\n",
262 dev_priv->mm.waiting_gem_seqno);
263 seq_printf(m, "IRQ sequence: %d\n", dev_priv->mm.irq_gem_seqno);
Chris Wilsonde227ef2010-07-03 07:58:38 +0100264
265 mutex_unlock(&dev->struct_mutex);
266
Ben Gamari20172632009-02-17 20:08:50 -0500267 return 0;
268}
269
270
271static int i915_interrupt_info(struct seq_file *m, void *data)
272{
273 struct drm_info_node *node = (struct drm_info_node *) m->private;
274 struct drm_device *dev = node->minor->dev;
275 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100276 int ret;
277
278 ret = mutex_lock_interruptible(&dev->struct_mutex);
279 if (ret)
280 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500281
Eric Anholtbad720f2009-10-22 16:11:14 -0700282 if (!HAS_PCH_SPLIT(dev)) {
Zhenyu Wang5f6a1692009-08-10 21:37:24 +0800283 seq_printf(m, "Interrupt enable: %08x\n",
284 I915_READ(IER));
285 seq_printf(m, "Interrupt identity: %08x\n",
286 I915_READ(IIR));
287 seq_printf(m, "Interrupt mask: %08x\n",
288 I915_READ(IMR));
289 seq_printf(m, "Pipe A stat: %08x\n",
290 I915_READ(PIPEASTAT));
291 seq_printf(m, "Pipe B stat: %08x\n",
292 I915_READ(PIPEBSTAT));
293 } else {
294 seq_printf(m, "North Display Interrupt enable: %08x\n",
295 I915_READ(DEIER));
296 seq_printf(m, "North Display Interrupt identity: %08x\n",
297 I915_READ(DEIIR));
298 seq_printf(m, "North Display Interrupt mask: %08x\n",
299 I915_READ(DEIMR));
300 seq_printf(m, "South Display Interrupt enable: %08x\n",
301 I915_READ(SDEIER));
302 seq_printf(m, "South Display Interrupt identity: %08x\n",
303 I915_READ(SDEIIR));
304 seq_printf(m, "South Display Interrupt mask: %08x\n",
305 I915_READ(SDEIMR));
306 seq_printf(m, "Graphics Interrupt enable: %08x\n",
307 I915_READ(GTIER));
308 seq_printf(m, "Graphics Interrupt identity: %08x\n",
309 I915_READ(GTIIR));
310 seq_printf(m, "Graphics Interrupt mask: %08x\n",
311 I915_READ(GTIMR));
312 }
Ben Gamari20172632009-02-17 20:08:50 -0500313 seq_printf(m, "Interrupts received: %d\n",
314 atomic_read(&dev_priv->irq_received));
Eric Anholte20f9c62010-05-26 14:51:06 -0700315 if (dev_priv->render_ring.status_page.page_addr != NULL) {
Ben Gamari20172632009-02-17 20:08:50 -0500316 seq_printf(m, "Current sequence: %d\n",
Zou Nan hai852835f2010-05-21 09:08:56 +0800317 i915_get_gem_seqno(dev, &dev_priv->render_ring));
Ben Gamari20172632009-02-17 20:08:50 -0500318 } else {
319 seq_printf(m, "Current sequence: hws uninitialized\n");
320 }
321 seq_printf(m, "Waiter sequence: %d\n",
322 dev_priv->mm.waiting_gem_seqno);
323 seq_printf(m, "IRQ sequence: %d\n",
324 dev_priv->mm.irq_gem_seqno);
Chris Wilsonde227ef2010-07-03 07:58:38 +0100325 mutex_unlock(&dev->struct_mutex);
326
Ben Gamari20172632009-02-17 20:08:50 -0500327 return 0;
328}
329
Chris Wilsona6172a82009-02-11 14:26:38 +0000330static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
331{
332 struct drm_info_node *node = (struct drm_info_node *) m->private;
333 struct drm_device *dev = node->minor->dev;
334 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100335 int i, ret;
336
337 ret = mutex_lock_interruptible(&dev->struct_mutex);
338 if (ret)
339 return ret;
Chris Wilsona6172a82009-02-11 14:26:38 +0000340
341 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
342 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
343 for (i = 0; i < dev_priv->num_fence_regs; i++) {
344 struct drm_gem_object *obj = dev_priv->fence_regs[i].obj;
345
346 if (obj == NULL) {
347 seq_printf(m, "Fenced object[%2d] = unused\n", i);
348 } else {
349 struct drm_i915_gem_object *obj_priv;
350
Daniel Vetter23010e42010-03-08 13:35:02 +0100351 obj_priv = to_intel_bo(obj);
Chris Wilsona6172a82009-02-11 14:26:38 +0000352 seq_printf(m, "Fenced object[%2d] = %p: %s "
Linus Torvalds0b4d5692009-03-27 17:02:09 -0700353 "%08x %08zx %08x %s %08x %08x %d",
Chris Wilsona6172a82009-02-11 14:26:38 +0000354 i, obj, get_pin_flag(obj_priv),
355 obj_priv->gtt_offset,
356 obj->size, obj_priv->stride,
357 get_tiling_flag(obj_priv),
358 obj->read_domains, obj->write_domain,
359 obj_priv->last_rendering_seqno);
360 if (obj->name)
361 seq_printf(m, " (name: %d)", obj->name);
362 seq_printf(m, "\n");
363 }
364 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100365 mutex_unlock(&dev->struct_mutex);
Chris Wilsona6172a82009-02-11 14:26:38 +0000366
367 return 0;
368}
369
Ben Gamari20172632009-02-17 20:08:50 -0500370static int i915_hws_info(struct seq_file *m, void *data)
371{
372 struct drm_info_node *node = (struct drm_info_node *) m->private;
373 struct drm_device *dev = node->minor->dev;
374 drm_i915_private_t *dev_priv = dev->dev_private;
375 int i;
376 volatile u32 *hws;
377
Eric Anholte20f9c62010-05-26 14:51:06 -0700378 hws = (volatile u32 *)dev_priv->render_ring.status_page.page_addr;
Ben Gamari20172632009-02-17 20:08:50 -0500379 if (hws == NULL)
380 return 0;
381
382 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
383 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
384 i * 4,
385 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
386 }
387 return 0;
388}
389
Ben Gamari6911a9b2009-04-02 11:24:54 -0700390static void i915_dump_pages(struct seq_file *m, struct page **pages, int page_count)
391{
392 int page, i;
393 uint32_t *mem;
394
395 for (page = 0; page < page_count; page++) {
Chris Wilsonde227ef2010-07-03 07:58:38 +0100396 mem = kmap(pages[page]);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700397 for (i = 0; i < PAGE_SIZE; i += 4)
398 seq_printf(m, "%08x : %08x\n", i, mem[i / 4]);
Chris Wilsonde227ef2010-07-03 07:58:38 +0100399 kunmap(pages[page]);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700400 }
401}
402
403static int i915_batchbuffer_info(struct seq_file *m, void *data)
404{
405 struct drm_info_node *node = (struct drm_info_node *) m->private;
406 struct drm_device *dev = node->minor->dev;
407 drm_i915_private_t *dev_priv = dev->dev_private;
408 struct drm_gem_object *obj;
409 struct drm_i915_gem_object *obj_priv;
410 int ret;
411
Chris Wilsonde227ef2010-07-03 07:58:38 +0100412 ret = mutex_lock_interruptible(&dev->struct_mutex);
413 if (ret)
414 return ret;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700415
Zou Nan hai852835f2010-05-21 09:08:56 +0800416 list_for_each_entry(obj_priv, &dev_priv->render_ring.active_list,
417 list) {
Daniel Vettera8089e82010-04-09 19:05:09 +0000418 obj = &obj_priv->base;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700419 if (obj->read_domains & I915_GEM_DOMAIN_COMMAND) {
Chris Wilson4bdadb92010-01-27 13:36:32 +0000420 ret = i915_gem_object_get_pages(obj, 0);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700421 if (ret) {
Chris Wilsonde227ef2010-07-03 07:58:38 +0100422 mutex_unlock(&dev->struct_mutex);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700423 return ret;
424 }
425
426 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj_priv->gtt_offset);
427 i915_dump_pages(m, obj_priv->pages, obj->size / PAGE_SIZE);
428
429 i915_gem_object_put_pages(obj);
430 }
431 }
432
Chris Wilsonde227ef2010-07-03 07:58:38 +0100433 mutex_unlock(&dev->struct_mutex);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700434
435 return 0;
436}
437
438static int i915_ringbuffer_data(struct seq_file *m, void *data)
439{
440 struct drm_info_node *node = (struct drm_info_node *) m->private;
441 struct drm_device *dev = node->minor->dev;
442 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100443 int ret;
444
445 ret = mutex_lock_interruptible(&dev->struct_mutex);
446 if (ret)
447 return ret;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700448
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800449 if (!dev_priv->render_ring.gem_object) {
Ben Gamari6911a9b2009-04-02 11:24:54 -0700450 seq_printf(m, "No ringbuffer setup\n");
Chris Wilsonde227ef2010-07-03 07:58:38 +0100451 } else {
452 u8 *virt = dev_priv->render_ring.virtual_start;
453 uint32_t off;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700454
Chris Wilsonde227ef2010-07-03 07:58:38 +0100455 for (off = 0; off < dev_priv->render_ring.size; off += 4) {
456 uint32_t *ptr = (uint32_t *)(virt + off);
457 seq_printf(m, "%08x : %08x\n", off, *ptr);
458 }
Ben Gamari6911a9b2009-04-02 11:24:54 -0700459 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100460 mutex_unlock(&dev->struct_mutex);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700461
462 return 0;
463}
464
465static int i915_ringbuffer_info(struct seq_file *m, void *data)
466{
467 struct drm_info_node *node = (struct drm_info_node *) m->private;
468 struct drm_device *dev = node->minor->dev;
469 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilson0ef82af2009-09-05 18:07:06 +0100470 unsigned int head, tail;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700471
472 head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
473 tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700474
475 seq_printf(m, "RingHead : %08x\n", head);
476 seq_printf(m, "RingTail : %08x\n", tail);
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800477 seq_printf(m, "RingSize : %08lx\n", dev_priv->render_ring.size);
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100478 seq_printf(m, "Acthd : %08x\n", I915_READ(INTEL_INFO(dev)->gen >= 4 ? ACTHD_I965 : ACTHD));
Ben Gamari6911a9b2009-04-02 11:24:54 -0700479
480 return 0;
481}
482
Chris Wilson9df30792010-02-18 10:24:56 +0000483static const char *pin_flag(int pinned)
484{
485 if (pinned > 0)
486 return " P";
487 else if (pinned < 0)
488 return " p";
489 else
490 return "";
491}
492
493static const char *tiling_flag(int tiling)
494{
495 switch (tiling) {
496 default:
497 case I915_TILING_NONE: return "";
498 case I915_TILING_X: return " X";
499 case I915_TILING_Y: return " Y";
500 }
501}
502
503static const char *dirty_flag(int dirty)
504{
505 return dirty ? " dirty" : "";
506}
507
508static const char *purgeable_flag(int purgeable)
509{
510 return purgeable ? " purgeable" : "";
511}
512
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700513static int i915_error_state(struct seq_file *m, void *unused)
514{
515 struct drm_info_node *node = (struct drm_info_node *) m->private;
516 struct drm_device *dev = node->minor->dev;
517 drm_i915_private_t *dev_priv = dev->dev_private;
518 struct drm_i915_error_state *error;
519 unsigned long flags;
Chris Wilson9df30792010-02-18 10:24:56 +0000520 int i, page, offset, elt;
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700521
522 spin_lock_irqsave(&dev_priv->error_lock, flags);
523 if (!dev_priv->first_error) {
524 seq_printf(m, "no error state collected\n");
525 goto out;
526 }
527
528 error = dev_priv->first_error;
529
Jesse Barnes8a905232009-07-11 16:48:03 -0400530 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
531 error->time.tv_usec);
Chris Wilson9df30792010-02-18 10:24:56 +0000532 seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700533 seq_printf(m, "EIR: 0x%08x\n", error->eir);
534 seq_printf(m, " PGTBL_ER: 0x%08x\n", error->pgtbl_er);
535 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
536 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir);
537 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr);
538 seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone);
539 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd);
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100540 if (INTEL_INFO(dev)->gen >= 4) {
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700541 seq_printf(m, " INSTPS: 0x%08x\n", error->instps);
542 seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
543 }
Chris Wilson9df30792010-02-18 10:24:56 +0000544 seq_printf(m, "seqno: 0x%08x\n", error->seqno);
545
546 if (error->active_bo_count) {
547 seq_printf(m, "Buffers [%d]:\n", error->active_bo_count);
548
549 for (i = 0; i < error->active_bo_count; i++) {
550 seq_printf(m, " %08x %8zd %08x %08x %08x%s%s%s%s",
551 error->active_bo[i].gtt_offset,
552 error->active_bo[i].size,
553 error->active_bo[i].read_domains,
554 error->active_bo[i].write_domain,
555 error->active_bo[i].seqno,
556 pin_flag(error->active_bo[i].pinned),
557 tiling_flag(error->active_bo[i].tiling),
558 dirty_flag(error->active_bo[i].dirty),
559 purgeable_flag(error->active_bo[i].purgeable));
560
561 if (error->active_bo[i].name)
562 seq_printf(m, " (name: %d)", error->active_bo[i].name);
563 if (error->active_bo[i].fence_reg != I915_FENCE_REG_NONE)
564 seq_printf(m, " (fence: %d)", error->active_bo[i].fence_reg);
565
566 seq_printf(m, "\n");
567 }
568 }
569
570 for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) {
571 if (error->batchbuffer[i]) {
572 struct drm_i915_error_object *obj = error->batchbuffer[i];
573
574 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
575 offset = 0;
576 for (page = 0; page < obj->page_count; page++) {
577 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
578 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
579 offset += 4;
580 }
581 }
582 }
583 }
584
585 if (error->ringbuffer) {
586 struct drm_i915_error_object *obj = error->ringbuffer;
587
588 seq_printf(m, "--- ringbuffer = 0x%08x\n", obj->gtt_offset);
589 offset = 0;
590 for (page = 0; page < obj->page_count; page++) {
591 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
592 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
593 offset += 4;
594 }
595 }
596 }
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700597
Chris Wilson6ef3d422010-08-04 20:26:07 +0100598 if (error->overlay)
599 intel_overlay_print_error_state(m, error->overlay);
600
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700601out:
602 spin_unlock_irqrestore(&dev_priv->error_lock, flags);
603
604 return 0;
605}
Ben Gamari6911a9b2009-04-02 11:24:54 -0700606
Jesse Barnesf97108d2010-01-29 11:27:07 -0800607static int i915_rstdby_delays(struct seq_file *m, void *unused)
608{
609 struct drm_info_node *node = (struct drm_info_node *) m->private;
610 struct drm_device *dev = node->minor->dev;
611 drm_i915_private_t *dev_priv = dev->dev_private;
612 u16 crstanddelay = I915_READ16(CRSTANDVID);
613
614 seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
615
616 return 0;
617}
618
619static int i915_cur_delayinfo(struct seq_file *m, void *unused)
620{
621 struct drm_info_node *node = (struct drm_info_node *) m->private;
622 struct drm_device *dev = node->minor->dev;
623 drm_i915_private_t *dev_priv = dev->dev_private;
624 u16 rgvswctl = I915_READ16(MEMSWCTL);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700625 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800626
Jesse Barnes7648fa92010-05-20 14:28:11 -0700627 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
628 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
629 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
630 MEMSTAT_VID_SHIFT);
631 seq_printf(m, "Current P-state: %d\n",
632 (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800633
634 return 0;
635}
636
637static int i915_delayfreq_table(struct seq_file *m, void *unused)
638{
639 struct drm_info_node *node = (struct drm_info_node *) m->private;
640 struct drm_device *dev = node->minor->dev;
641 drm_i915_private_t *dev_priv = dev->dev_private;
642 u32 delayfreq;
643 int i;
644
645 for (i = 0; i < 16; i++) {
646 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700647 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
648 (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800649 }
650
651 return 0;
652}
653
654static inline int MAP_TO_MV(int map)
655{
656 return 1250 - (map * 25);
657}
658
659static int i915_inttoext_table(struct seq_file *m, void *unused)
660{
661 struct drm_info_node *node = (struct drm_info_node *) m->private;
662 struct drm_device *dev = node->minor->dev;
663 drm_i915_private_t *dev_priv = dev->dev_private;
664 u32 inttoext;
665 int i;
666
667 for (i = 1; i <= 32; i++) {
668 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
669 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
670 }
671
672 return 0;
673}
674
675static int i915_drpc_info(struct seq_file *m, void *unused)
676{
677 struct drm_info_node *node = (struct drm_info_node *) m->private;
678 struct drm_device *dev = node->minor->dev;
679 drm_i915_private_t *dev_priv = dev->dev_private;
680 u32 rgvmodectl = I915_READ(MEMMODECTL);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700681 u32 rstdbyctl = I915_READ(MCHBAR_RENDER_STANDBY);
682 u16 crstandvid = I915_READ16(CRSTANDVID);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800683
684 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
685 "yes" : "no");
686 seq_printf(m, "Boost freq: %d\n",
687 (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
688 MEMMODE_BOOST_FREQ_SHIFT);
689 seq_printf(m, "HW control enabled: %s\n",
690 rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
691 seq_printf(m, "SW control enabled: %s\n",
692 rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
693 seq_printf(m, "Gated voltage change: %s\n",
694 rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
695 seq_printf(m, "Starting frequency: P%d\n",
696 (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700697 seq_printf(m, "Max P-state: P%d\n",
Jesse Barnesf97108d2010-01-29 11:27:07 -0800698 (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700699 seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
700 seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
701 seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
702 seq_printf(m, "Render standby enabled: %s\n",
703 (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
Jesse Barnesf97108d2010-01-29 11:27:07 -0800704
705 return 0;
706}
707
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800708static int i915_fbc_status(struct seq_file *m, void *unused)
709{
710 struct drm_info_node *node = (struct drm_info_node *) m->private;
711 struct drm_device *dev = node->minor->dev;
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800712 drm_i915_private_t *dev_priv = dev->dev_private;
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800713
Adam Jacksonee5382a2010-04-23 11:17:39 -0400714 if (!I915_HAS_FBC(dev)) {
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800715 seq_printf(m, "FBC unsupported on this chipset\n");
716 return 0;
717 }
718
Adam Jacksonee5382a2010-04-23 11:17:39 -0400719 if (intel_fbc_enabled(dev)) {
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800720 seq_printf(m, "FBC enabled\n");
721 } else {
722 seq_printf(m, "FBC disabled: ");
723 switch (dev_priv->no_fbc_reason) {
Chris Wilsonbed4a672010-09-11 10:47:47 +0100724 case FBC_NO_OUTPUT:
725 seq_printf(m, "no outputs");
726 break;
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800727 case FBC_STOLEN_TOO_SMALL:
728 seq_printf(m, "not enough stolen memory");
729 break;
730 case FBC_UNSUPPORTED_MODE:
731 seq_printf(m, "mode not supported");
732 break;
733 case FBC_MODE_TOO_LARGE:
734 seq_printf(m, "mode too large");
735 break;
736 case FBC_BAD_PLANE:
737 seq_printf(m, "FBC unsupported on plane");
738 break;
739 case FBC_NOT_TILED:
740 seq_printf(m, "scanout buffer not tiled");
741 break;
Jesse Barnes9c928d12010-07-23 15:20:00 -0700742 case FBC_MULTIPLE_PIPES:
743 seq_printf(m, "multiple pipes are enabled");
744 break;
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800745 default:
746 seq_printf(m, "unknown reason");
747 }
748 seq_printf(m, "\n");
749 }
750 return 0;
751}
752
Jesse Barnes4a9bef32010-02-05 12:47:35 -0800753static int i915_sr_status(struct seq_file *m, void *unused)
754{
755 struct drm_info_node *node = (struct drm_info_node *) m->private;
756 struct drm_device *dev = node->minor->dev;
757 drm_i915_private_t *dev_priv = dev->dev_private;
758 bool sr_enabled = false;
759
Chris Wilson5ba2aaa2010-08-19 18:04:08 +0100760 if (IS_IRONLAKE(dev))
761 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100762 else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
Jesse Barnes4a9bef32010-02-05 12:47:35 -0800763 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
764 else if (IS_I915GM(dev))
765 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
766 else if (IS_PINEVIEW(dev))
767 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
768
Chris Wilson5ba2aaa2010-08-19 18:04:08 +0100769 seq_printf(m, "self-refresh: %s\n",
770 sr_enabled ? "enabled" : "disabled");
Jesse Barnes4a9bef32010-02-05 12:47:35 -0800771
772 return 0;
773}
774
Jesse Barnes7648fa92010-05-20 14:28:11 -0700775static int i915_emon_status(struct seq_file *m, void *unused)
776{
777 struct drm_info_node *node = (struct drm_info_node *) m->private;
778 struct drm_device *dev = node->minor->dev;
779 drm_i915_private_t *dev_priv = dev->dev_private;
780 unsigned long temp, chipset, gfx;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100781 int ret;
782
783 ret = mutex_lock_interruptible(&dev->struct_mutex);
784 if (ret)
785 return ret;
Jesse Barnes7648fa92010-05-20 14:28:11 -0700786
787 temp = i915_mch_val(dev_priv);
788 chipset = i915_chipset_val(dev_priv);
789 gfx = i915_gfx_val(dev_priv);
Chris Wilsonde227ef2010-07-03 07:58:38 +0100790 mutex_unlock(&dev->struct_mutex);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700791
792 seq_printf(m, "GMCH temp: %ld\n", temp);
793 seq_printf(m, "Chipset power: %ld\n", chipset);
794 seq_printf(m, "GFX power: %ld\n", gfx);
795 seq_printf(m, "Total power: %ld\n", chipset + gfx);
796
797 return 0;
798}
799
800static int i915_gfxec(struct seq_file *m, void *unused)
801{
802 struct drm_info_node *node = (struct drm_info_node *) m->private;
803 struct drm_device *dev = node->minor->dev;
804 drm_i915_private_t *dev_priv = dev->dev_private;
805
806 seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
807
808 return 0;
809}
810
Chris Wilson44834a62010-08-19 16:09:23 +0100811static int i915_opregion(struct seq_file *m, void *unused)
812{
813 struct drm_info_node *node = (struct drm_info_node *) m->private;
814 struct drm_device *dev = node->minor->dev;
815 drm_i915_private_t *dev_priv = dev->dev_private;
816 struct intel_opregion *opregion = &dev_priv->opregion;
817 int ret;
818
819 ret = mutex_lock_interruptible(&dev->struct_mutex);
820 if (ret)
821 return ret;
822
823 if (opregion->header)
824 seq_write(m, opregion->header, OPREGION_SIZE);
825
826 mutex_unlock(&dev->struct_mutex);
827
828 return 0;
829}
830
Chris Wilson37811fc2010-08-25 22:45:57 +0100831static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
832{
833 struct drm_info_node *node = (struct drm_info_node *) m->private;
834 struct drm_device *dev = node->minor->dev;
835 drm_i915_private_t *dev_priv = dev->dev_private;
836 struct intel_fbdev *ifbdev;
837 struct intel_framebuffer *fb;
838 int ret;
839
840 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
841 if (ret)
842 return ret;
843
844 ifbdev = dev_priv->fbdev;
845 fb = to_intel_framebuffer(ifbdev->helper.fb);
846
847 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
848 fb->base.width,
849 fb->base.height,
850 fb->base.depth,
851 fb->base.bits_per_pixel);
852 describe_obj(m, to_intel_bo(fb->obj));
853 seq_printf(m, "\n");
854
855 list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
856 if (&fb->base == ifbdev->helper.fb)
857 continue;
858
859 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
860 fb->base.width,
861 fb->base.height,
862 fb->base.depth,
863 fb->base.bits_per_pixel);
864 describe_obj(m, to_intel_bo(fb->obj));
865 seq_printf(m, "\n");
866 }
867
868 mutex_unlock(&dev->mode_config.mutex);
869
870 return 0;
871}
872
Chris Wilsonf3cd4742009-10-13 22:20:20 +0100873static int
874i915_wedged_open(struct inode *inode,
875 struct file *filp)
876{
877 filp->private_data = inode->i_private;
878 return 0;
879}
880
881static ssize_t
882i915_wedged_read(struct file *filp,
883 char __user *ubuf,
884 size_t max,
885 loff_t *ppos)
886{
887 struct drm_device *dev = filp->private_data;
888 drm_i915_private_t *dev_priv = dev->dev_private;
889 char buf[80];
890 int len;
891
892 len = snprintf(buf, sizeof (buf),
893 "wedged : %d\n",
894 atomic_read(&dev_priv->mm.wedged));
895
Dan Carpenterf4433a82010-09-08 21:44:47 +0200896 if (len > sizeof (buf))
897 len = sizeof (buf);
898
Chris Wilsonf3cd4742009-10-13 22:20:20 +0100899 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
900}
901
902static ssize_t
903i915_wedged_write(struct file *filp,
904 const char __user *ubuf,
905 size_t cnt,
906 loff_t *ppos)
907{
908 struct drm_device *dev = filp->private_data;
909 drm_i915_private_t *dev_priv = dev->dev_private;
910 char buf[20];
911 int val = 1;
912
913 if (cnt > 0) {
914 if (cnt > sizeof (buf) - 1)
915 return -EINVAL;
916
917 if (copy_from_user(buf, ubuf, cnt))
918 return -EFAULT;
919 buf[cnt] = 0;
920
921 val = simple_strtoul(buf, NULL, 0);
922 }
923
924 DRM_INFO("Manually setting wedged to %d\n", val);
925
926 atomic_set(&dev_priv->mm.wedged, val);
927 if (val) {
928 DRM_WAKEUP(&dev_priv->irq_queue);
929 queue_work(dev_priv->wq, &dev_priv->error_work);
930 }
931
932 return cnt;
933}
934
935static const struct file_operations i915_wedged_fops = {
936 .owner = THIS_MODULE,
937 .open = i915_wedged_open,
938 .read = i915_wedged_read,
939 .write = i915_wedged_write,
940};
941
942/* As the drm_debugfs_init() routines are called before dev->dev_private is
943 * allocated we need to hook into the minor for release. */
944static int
945drm_add_fake_info_node(struct drm_minor *minor,
946 struct dentry *ent,
947 const void *key)
948{
949 struct drm_info_node *node;
950
951 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
952 if (node == NULL) {
953 debugfs_remove(ent);
954 return -ENOMEM;
955 }
956
957 node->minor = minor;
958 node->dent = ent;
959 node->info_ent = (void *) key;
960 list_add(&node->list, &minor->debugfs_nodes.list);
961
962 return 0;
963}
964
965static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
966{
967 struct drm_device *dev = minor->dev;
968 struct dentry *ent;
969
970 ent = debugfs_create_file("i915_wedged",
971 S_IRUGO | S_IWUSR,
972 root, dev,
973 &i915_wedged_fops);
974 if (IS_ERR(ent))
975 return PTR_ERR(ent);
976
977 return drm_add_fake_info_node(minor, ent, &i915_wedged_fops);
978}
Ben Gamari9e3a6d12009-07-01 22:26:53 -0400979
Ben Gamari27c202a2009-07-01 22:26:52 -0400980static struct drm_info_list i915_debugfs_list[] = {
Chris Wilson70d39fe2010-08-25 16:03:34 +0100981 {"i915_capabilities", i915_capabilities, 0, 0},
Chris Wilson82690bb2010-09-18 01:37:30 +0100982 {"i915_gem_render_active", i915_gem_object_list_info, 0, (void *) RENDER_LIST},
983 {"i915_gem_bsd_active", i915_gem_object_list_info, 0, (void *) BSD_LIST},
Ben Gamari433e12f2009-02-17 20:08:51 -0500984 {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
985 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100986 {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -0500987 {"i915_gem_request", i915_gem_request_info, 0},
988 {"i915_gem_seqno", i915_gem_seqno_info, 0},
Chris Wilsona6172a82009-02-11 14:26:38 +0000989 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -0500990 {"i915_gem_interrupt", i915_interrupt_info, 0},
991 {"i915_gem_hws", i915_hws_info, 0},
Ben Gamari6911a9b2009-04-02 11:24:54 -0700992 {"i915_ringbuffer_data", i915_ringbuffer_data, 0},
993 {"i915_ringbuffer_info", i915_ringbuffer_info, 0},
994 {"i915_batchbuffers", i915_batchbuffer_info, 0},
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700995 {"i915_error_state", i915_error_state, 0},
Jesse Barnesf97108d2010-01-29 11:27:07 -0800996 {"i915_rstdby_delays", i915_rstdby_delays, 0},
997 {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
998 {"i915_delayfreq_table", i915_delayfreq_table, 0},
999 {"i915_inttoext_table", i915_inttoext_table, 0},
1000 {"i915_drpc_info", i915_drpc_info, 0},
Jesse Barnes7648fa92010-05-20 14:28:11 -07001001 {"i915_emon_status", i915_emon_status, 0},
1002 {"i915_gfxec", i915_gfxec, 0},
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001003 {"i915_fbc_status", i915_fbc_status, 0},
Jesse Barnes4a9bef32010-02-05 12:47:35 -08001004 {"i915_sr_status", i915_sr_status, 0},
Chris Wilson44834a62010-08-19 16:09:23 +01001005 {"i915_opregion", i915_opregion, 0},
Chris Wilson37811fc2010-08-25 22:45:57 +01001006 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -05001007};
Ben Gamari27c202a2009-07-01 22:26:52 -04001008#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
Ben Gamari20172632009-02-17 20:08:50 -05001009
Ben Gamari27c202a2009-07-01 22:26:52 -04001010int i915_debugfs_init(struct drm_minor *minor)
Ben Gamari20172632009-02-17 20:08:50 -05001011{
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001012 int ret;
1013
1014 ret = i915_wedged_create(minor->debugfs_root, minor);
1015 if (ret)
1016 return ret;
1017
Ben Gamari27c202a2009-07-01 22:26:52 -04001018 return drm_debugfs_create_files(i915_debugfs_list,
1019 I915_DEBUGFS_ENTRIES,
Ben Gamari20172632009-02-17 20:08:50 -05001020 minor->debugfs_root, minor);
1021}
1022
Ben Gamari27c202a2009-07-01 22:26:52 -04001023void i915_debugfs_cleanup(struct drm_minor *minor)
Ben Gamari20172632009-02-17 20:08:50 -05001024{
Ben Gamari27c202a2009-07-01 22:26:52 -04001025 drm_debugfs_remove_files(i915_debugfs_list,
1026 I915_DEBUGFS_ENTRIES, minor);
Kristian Høgsberg33db6792009-11-11 12:19:16 -05001027 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
1028 1, minor);
Ben Gamari20172632009-02-17 20:08:50 -05001029}
1030
1031#endif /* CONFIG_DEBUG_FS */