Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2012 Freescale Semiconductor, Inc. |
| 3 | * |
| 4 | * The code contained herein is licensed under the GNU General Public |
| 5 | * License. You may obtain a copy of the GNU General Public License |
| 6 | * Version 2 or later at the following locations: |
| 7 | * |
| 8 | * http://www.opensource.org/licenses/gpl-license.html |
| 9 | * http://www.gnu.org/copyleft/gpl.html |
| 10 | */ |
| 11 | |
| 12 | /include/ "skeleton.dtsi" |
| 13 | |
| 14 | / { |
| 15 | interrupt-parent = <&icoll>; |
| 16 | |
Shawn Guo | ce4c6f9 | 2012-05-04 14:32:35 +0800 | [diff] [blame] | 17 | aliases { |
| 18 | gpio0 = &gpio0; |
| 19 | gpio1 = &gpio1; |
| 20 | gpio2 = &gpio2; |
| 21 | }; |
| 22 | |
Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 23 | cpus { |
| 24 | cpu@0 { |
| 25 | compatible = "arm,arm926ejs"; |
| 26 | }; |
| 27 | }; |
| 28 | |
| 29 | apb@80000000 { |
| 30 | compatible = "simple-bus"; |
| 31 | #address-cells = <1>; |
| 32 | #size-cells = <1>; |
| 33 | reg = <0x80000000 0x80000>; |
| 34 | ranges; |
| 35 | |
| 36 | apbh@80000000 { |
| 37 | compatible = "simple-bus"; |
| 38 | #address-cells = <1>; |
| 39 | #size-cells = <1>; |
| 40 | reg = <0x80000000 0x40000>; |
| 41 | ranges; |
| 42 | |
| 43 | icoll: interrupt-controller@80000000 { |
| 44 | compatible = "fsl,imx23-icoll", "fsl,mxs-icoll"; |
| 45 | interrupt-controller; |
| 46 | #interrupt-cells = <1>; |
| 47 | reg = <0x80000000 0x2000>; |
| 48 | }; |
| 49 | |
| 50 | dma-apbh@80004000 { |
Dong Aisheng | 84f3570 | 2012-05-04 20:12:19 +0800 | [diff] [blame] | 51 | compatible = "fsl,imx23-dma-apbh"; |
Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 52 | reg = <0x80004000 2000>; |
Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 53 | }; |
| 54 | |
| 55 | ecc@80008000 { |
| 56 | reg = <0x80008000 2000>; |
| 57 | status = "disabled"; |
| 58 | }; |
| 59 | |
| 60 | bch@8000a000 { |
| 61 | reg = <0x8000a000 2000>; |
| 62 | status = "disabled"; |
| 63 | }; |
| 64 | |
Marek Vasut | a217c46 | 2012-06-09 01:21:55 +0200 | [diff] [blame] | 65 | gpmi-nand@8000c000 { |
Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 66 | reg = <0x8000c000 2000>; |
| 67 | status = "disabled"; |
| 68 | }; |
| 69 | |
| 70 | ssp0: ssp@80010000 { |
| 71 | reg = <0x80010000 2000>; |
Shawn Guo | be1ce30 | 2012-05-06 16:29:36 +0800 | [diff] [blame] | 72 | interrupts = <15 14>; |
| 73 | fsl,ssp-dma-channel = <1>; |
Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 74 | status = "disabled"; |
| 75 | }; |
| 76 | |
| 77 | etm@80014000 { |
| 78 | reg = <0x80014000 2000>; |
| 79 | status = "disabled"; |
| 80 | }; |
| 81 | |
| 82 | pinctrl@80018000 { |
| 83 | #address-cells = <1>; |
| 84 | #size-cells = <0>; |
Shawn Guo | ce4c6f9 | 2012-05-04 14:32:35 +0800 | [diff] [blame] | 85 | compatible = "fsl,imx23-pinctrl", "simple-bus"; |
Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 86 | reg = <0x80018000 2000>; |
| 87 | |
Shawn Guo | ce4c6f9 | 2012-05-04 14:32:35 +0800 | [diff] [blame] | 88 | gpio0: gpio@0 { |
| 89 | compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; |
| 90 | interrupts = <16>; |
| 91 | gpio-controller; |
| 92 | #gpio-cells = <2>; |
| 93 | interrupt-controller; |
| 94 | #interrupt-cells = <2>; |
| 95 | }; |
| 96 | |
| 97 | gpio1: gpio@1 { |
| 98 | compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; |
| 99 | interrupts = <17>; |
| 100 | gpio-controller; |
| 101 | #gpio-cells = <2>; |
| 102 | interrupt-controller; |
| 103 | #interrupt-cells = <2>; |
| 104 | }; |
| 105 | |
| 106 | gpio2: gpio@2 { |
| 107 | compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; |
| 108 | interrupts = <18>; |
| 109 | gpio-controller; |
| 110 | #gpio-cells = <2>; |
| 111 | interrupt-controller; |
| 112 | #interrupt-cells = <2>; |
| 113 | }; |
| 114 | |
Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 115 | duart_pins_a: duart@0 { |
| 116 | reg = <0>; |
Shawn Guo | f14da76 | 2012-06-28 11:44:57 +0800 | [diff] [blame^] | 117 | fsl,pinmux-ids = < |
| 118 | 0x11a2 /* MX23_PAD_PWM0__DUART_RX */ |
| 119 | 0x11b2 /* MX23_PAD_PWM1__DUART_TX */ |
| 120 | >; |
Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 121 | fsl,drive-strength = <0>; |
| 122 | fsl,voltage = <1>; |
| 123 | fsl,pull-up = <0>; |
| 124 | }; |
Shawn Guo | be1ce30 | 2012-05-06 16:29:36 +0800 | [diff] [blame] | 125 | |
| 126 | mmc0_8bit_pins_a: mmc0-8bit@0 { |
| 127 | reg = <0>; |
Shawn Guo | f14da76 | 2012-06-28 11:44:57 +0800 | [diff] [blame^] | 128 | fsl,pinmux-ids = < |
| 129 | 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */ |
| 130 | 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */ |
| 131 | 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */ |
| 132 | 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */ |
| 133 | 0x0082 /* MX23_PAD_GPMI_D08__SSP1_DATA4 */ |
| 134 | 0x0092 /* MX23_PAD_GPMI_D09__SSP1_DATA5 */ |
| 135 | 0x00a2 /* MX23_PAD_GPMI_D10__SSP1_DATA6 */ |
| 136 | 0x00b2 /* MX23_PAD_GPMI_D11__SSP1_DATA7 */ |
| 137 | 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */ |
| 138 | 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */ |
| 139 | 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */ |
| 140 | >; |
Shawn Guo | be1ce30 | 2012-05-06 16:29:36 +0800 | [diff] [blame] | 141 | fsl,drive-strength = <1>; |
| 142 | fsl,voltage = <1>; |
| 143 | fsl,pull-up = <1>; |
| 144 | }; |
| 145 | |
| 146 | mmc0_pins_fixup: mmc0-pins-fixup { |
Shawn Guo | f14da76 | 2012-06-28 11:44:57 +0800 | [diff] [blame^] | 147 | fsl,pinmux-ids = < |
| 148 | 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */ |
| 149 | 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */ |
| 150 | >; |
Shawn Guo | be1ce30 | 2012-05-06 16:29:36 +0800 | [diff] [blame] | 151 | fsl,pull-up = <0>; |
| 152 | }; |
Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 153 | }; |
| 154 | |
| 155 | digctl@8001c000 { |
| 156 | reg = <0x8001c000 2000>; |
| 157 | status = "disabled"; |
| 158 | }; |
| 159 | |
| 160 | emi@80020000 { |
| 161 | reg = <0x80020000 2000>; |
| 162 | status = "disabled"; |
| 163 | }; |
| 164 | |
| 165 | dma-apbx@80024000 { |
Dong Aisheng | 84f3570 | 2012-05-04 20:12:19 +0800 | [diff] [blame] | 166 | compatible = "fsl,imx23-dma-apbx"; |
Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 167 | reg = <0x80024000 2000>; |
Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 168 | }; |
| 169 | |
| 170 | dcp@80028000 { |
| 171 | reg = <0x80028000 2000>; |
| 172 | status = "disabled"; |
| 173 | }; |
| 174 | |
| 175 | pxp@8002a000 { |
| 176 | reg = <0x8002a000 2000>; |
| 177 | status = "disabled"; |
| 178 | }; |
| 179 | |
| 180 | ocotp@8002c000 { |
| 181 | reg = <0x8002c000 2000>; |
| 182 | status = "disabled"; |
| 183 | }; |
| 184 | |
| 185 | axi-ahb@8002e000 { |
| 186 | reg = <0x8002e000 2000>; |
| 187 | status = "disabled"; |
| 188 | }; |
| 189 | |
| 190 | lcdif@80030000 { |
| 191 | reg = <0x80030000 2000>; |
| 192 | status = "disabled"; |
| 193 | }; |
| 194 | |
| 195 | ssp1: ssp@80034000 { |
| 196 | reg = <0x80034000 2000>; |
Shawn Guo | be1ce30 | 2012-05-06 16:29:36 +0800 | [diff] [blame] | 197 | interrupts = <2 20>; |
| 198 | fsl,ssp-dma-channel = <2>; |
Shawn Guo | 2954ff3 | 2012-05-04 21:33:42 +0800 | [diff] [blame] | 199 | status = "disabled"; |
| 200 | }; |
| 201 | |
| 202 | tvenc@80038000 { |
| 203 | reg = <0x80038000 2000>; |
| 204 | status = "disabled"; |
| 205 | }; |
| 206 | }; |
| 207 | |
| 208 | apbx@80040000 { |
| 209 | compatible = "simple-bus"; |
| 210 | #address-cells = <1>; |
| 211 | #size-cells = <1>; |
| 212 | reg = <0x80040000 0x40000>; |
| 213 | ranges; |
| 214 | |
| 215 | clkctl@80040000 { |
| 216 | reg = <0x80040000 2000>; |
| 217 | status = "disabled"; |
| 218 | }; |
| 219 | |
| 220 | saif0: saif@80042000 { |
| 221 | reg = <0x80042000 2000>; |
| 222 | status = "disabled"; |
| 223 | }; |
| 224 | |
| 225 | power@80044000 { |
| 226 | reg = <0x80044000 2000>; |
| 227 | status = "disabled"; |
| 228 | }; |
| 229 | |
| 230 | saif1: saif@80046000 { |
| 231 | reg = <0x80046000 2000>; |
| 232 | status = "disabled"; |
| 233 | }; |
| 234 | |
| 235 | audio-out@80048000 { |
| 236 | reg = <0x80048000 2000>; |
| 237 | status = "disabled"; |
| 238 | }; |
| 239 | |
| 240 | audio-in@8004c000 { |
| 241 | reg = <0x8004c000 2000>; |
| 242 | status = "disabled"; |
| 243 | }; |
| 244 | |
| 245 | lradc@80050000 { |
| 246 | reg = <0x80050000 2000>; |
| 247 | status = "disabled"; |
| 248 | }; |
| 249 | |
| 250 | spdif@80054000 { |
| 251 | reg = <0x80054000 2000>; |
| 252 | status = "disabled"; |
| 253 | }; |
| 254 | |
| 255 | i2c@80058000 { |
| 256 | reg = <0x80058000 2000>; |
| 257 | status = "disabled"; |
| 258 | }; |
| 259 | |
| 260 | rtc@8005c000 { |
| 261 | reg = <0x8005c000 2000>; |
| 262 | status = "disabled"; |
| 263 | }; |
| 264 | |
| 265 | pwm@80064000 { |
| 266 | reg = <0x80064000 2000>; |
| 267 | status = "disabled"; |
| 268 | }; |
| 269 | |
| 270 | timrot@80068000 { |
| 271 | reg = <0x80068000 2000>; |
| 272 | status = "disabled"; |
| 273 | }; |
| 274 | |
| 275 | auart0: serial@8006c000 { |
| 276 | reg = <0x8006c000 0x2000>; |
| 277 | status = "disabled"; |
| 278 | }; |
| 279 | |
| 280 | auart1: serial@8006e000 { |
| 281 | reg = <0x8006e000 0x2000>; |
| 282 | status = "disabled"; |
| 283 | }; |
| 284 | |
| 285 | duart: serial@80070000 { |
| 286 | compatible = "arm,pl011", "arm,primecell"; |
| 287 | reg = <0x80070000 0x2000>; |
| 288 | interrupts = <0>; |
| 289 | status = "disabled"; |
| 290 | }; |
| 291 | |
| 292 | usbphy@8007c000 { |
| 293 | reg = <0x8007c000 0x2000>; |
| 294 | status = "disabled"; |
| 295 | }; |
| 296 | }; |
| 297 | }; |
| 298 | |
| 299 | ahb@80080000 { |
| 300 | compatible = "simple-bus"; |
| 301 | #address-cells = <1>; |
| 302 | #size-cells = <1>; |
| 303 | reg = <0x80080000 0x80000>; |
| 304 | ranges; |
| 305 | |
| 306 | usbctrl@80080000 { |
| 307 | reg = <0x80080000 0x10000>; |
| 308 | status = "disabled"; |
| 309 | }; |
| 310 | }; |
| 311 | }; |