blob: d05327caf69dbc18532478b122ea9834e67f1fd9 [file] [log] [blame]
Dan Williamsb2f46fd2009-07-14 12:20:36 -07001/*
2 * Copyright(c) 2007 Yuri Tikhonov <yur@emcraft.com>
3 * Copyright(c) 2009 Intel Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the Free
7 * Software Foundation; either version 2 of the License, or (at your option)
8 * any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc., 59
17 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 *
19 * The full GNU General Public License is included in this distribution in the
20 * file called COPYING.
21 */
22#include <linux/kernel.h>
23#include <linux/interrupt.h>
Paul Gortmaker4bb33cc2011-05-27 14:41:48 -040024#include <linux/module.h>
Dan Williamsb2f46fd2009-07-14 12:20:36 -070025#include <linux/dma-mapping.h>
26#include <linux/raid/pq.h>
27#include <linux/async_tx.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090028#include <linux/gfp.h>
Dan Williamsb2f46fd2009-07-14 12:20:36 -070029
30/**
Dan Williams030b0772009-10-19 18:09:32 -070031 * pq_scribble_page - space to hold throwaway P or Q buffer for
32 * synchronous gen_syndrome
Dan Williamsb2f46fd2009-07-14 12:20:36 -070033 */
Dan Williams030b0772009-10-19 18:09:32 -070034static struct page *pq_scribble_page;
Dan Williamsb2f46fd2009-07-14 12:20:36 -070035
Dan Williamsb2f46fd2009-07-14 12:20:36 -070036/* the struct page *blocks[] parameter passed to async_gen_syndrome()
37 * and async_syndrome_val() contains the 'P' destination address at
38 * blocks[disks-2] and the 'Q' destination address at blocks[disks-1]
39 *
40 * note: these are macros as they are used as lvalues
41 */
42#define P(b, d) (b[d-2])
43#define Q(b, d) (b[d-1])
44
45/**
46 * do_async_gen_syndrome - asynchronously calculate P and/or Q
47 */
48static __async_inline struct dma_async_tx_descriptor *
Dan Williams7476bd72013-10-18 19:35:29 +020049do_async_gen_syndrome(struct dma_chan *chan,
50 const unsigned char *scfs, int disks,
51 struct dmaengine_unmap_data *unmap,
52 enum dma_ctrl_flags dma_flags,
Dan Williamsb2f46fd2009-07-14 12:20:36 -070053 struct async_submit_ctl *submit)
54{
55 struct dma_async_tx_descriptor *tx = NULL;
56 struct dma_device *dma = chan->device;
Dan Williamsb2f46fd2009-07-14 12:20:36 -070057 enum async_tx_flags flags_orig = submit->flags;
58 dma_async_tx_callback cb_fn_orig = submit->cb_fn;
59 dma_async_tx_callback cb_param_orig = submit->cb_param;
60 int src_cnt = disks - 2;
Dan Williamsb2f46fd2009-07-14 12:20:36 -070061 unsigned short pq_src_cnt;
62 dma_addr_t dma_dest[2];
63 int src_off = 0;
Dan Williamsb2f46fd2009-07-14 12:20:36 -070064
Dan Williams7476bd72013-10-18 19:35:29 +020065 if (submit->flags & ASYNC_TX_FENCE)
66 dma_flags |= DMA_PREP_FENCE;
Dan Williamsb2f46fd2009-07-14 12:20:36 -070067
68 while (src_cnt > 0) {
69 submit->flags = flags_orig;
70 pq_src_cnt = min(src_cnt, dma_maxpq(dma, dma_flags));
71 /* if we are submitting additional pqs, leave the chain open,
72 * clear the callback parameters, and leave the destination
73 * buffers mapped
74 */
75 if (src_cnt > pq_src_cnt) {
76 submit->flags &= ~ASYNC_TX_ACK;
Dan Williams0403e382009-09-08 17:42:50 -070077 submit->flags |= ASYNC_TX_FENCE;
Dan Williamsb2f46fd2009-07-14 12:20:36 -070078 submit->cb_fn = NULL;
79 submit->cb_param = NULL;
80 } else {
Dan Williamsb2f46fd2009-07-14 12:20:36 -070081 submit->cb_fn = cb_fn_orig;
82 submit->cb_param = cb_param_orig;
83 if (cb_fn_orig)
84 dma_flags |= DMA_PREP_INTERRUPT;
85 }
86
Dan Williams7476bd72013-10-18 19:35:29 +020087 /* Drivers force forward progress in case they can not provide
88 * a descriptor
Dan Williamsb2f46fd2009-07-14 12:20:36 -070089 */
90 for (;;) {
Dan Williams7476bd72013-10-18 19:35:29 +020091 dma_dest[0] = unmap->addr[disks - 2];
92 dma_dest[1] = unmap->addr[disks - 1];
Dan Williamsb2f46fd2009-07-14 12:20:36 -070093 tx = dma->device_prep_dma_pq(chan, dma_dest,
Dan Williams7476bd72013-10-18 19:35:29 +020094 &unmap->addr[src_off],
Dan Williamsb2f46fd2009-07-14 12:20:36 -070095 pq_src_cnt,
Dan Williams7476bd72013-10-18 19:35:29 +020096 &scfs[src_off], unmap->len,
Dan Williamsb2f46fd2009-07-14 12:20:36 -070097 dma_flags);
98 if (likely(tx))
99 break;
100 async_tx_quiesce(&submit->depend_tx);
101 dma_async_issue_pending(chan);
102 }
103
Dan Williams7476bd72013-10-18 19:35:29 +0200104 dma_set_unmap(tx, unmap);
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700105 async_tx_submit(chan, tx, submit);
106 submit->depend_tx = tx;
107
108 /* drop completed sources */
109 src_cnt -= pq_src_cnt;
110 src_off += pq_src_cnt;
111
112 dma_flags |= DMA_PREP_CONTINUE;
113 }
114
115 return tx;
116}
117
118/**
119 * do_sync_gen_syndrome - synchronously calculate a raid6 syndrome
120 */
121static void
122do_sync_gen_syndrome(struct page **blocks, unsigned int offset, int disks,
123 size_t len, struct async_submit_ctl *submit)
124{
125 void **srcs;
126 int i;
127
128 if (submit->scribble)
129 srcs = submit->scribble;
130 else
131 srcs = (void **) blocks;
132
133 for (i = 0; i < disks; i++) {
NeilBrown5dd33c92009-10-16 16:40:25 +1100134 if (blocks[i] == NULL) {
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700135 BUG_ON(i > disks - 3); /* P or Q can't be zero */
NeilBrown5dd33c92009-10-16 16:40:25 +1100136 srcs[i] = (void*)raid6_empty_zero_page;
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700137 } else
138 srcs[i] = page_address(blocks[i]) + offset;
139 }
140 raid6_call.gen_syndrome(disks, len, srcs);
141 async_tx_sync_epilog(submit);
142}
143
144/**
145 * async_gen_syndrome - asynchronously calculate a raid6 syndrome
146 * @blocks: source blocks from idx 0..disks-3, P @ disks-2 and Q @ disks-1
147 * @offset: common offset into each block (src and dest) to start transaction
148 * @disks: number of blocks (including missing P or Q, see below)
149 * @len: length of operation in bytes
150 * @submit: submission/completion modifiers
151 *
152 * General note: This routine assumes a field of GF(2^8) with a
153 * primitive polynomial of 0x11d and a generator of {02}.
154 *
155 * 'disks' note: callers can optionally omit either P or Q (but not
156 * both) from the calculation by setting blocks[disks-2] or
157 * blocks[disks-1] to NULL. When P or Q is omitted 'len' must be <=
158 * PAGE_SIZE as a temporary buffer of this size is used in the
159 * synchronous path. 'disks' always accounts for both destination
Dan Williams56764702009-10-19 18:09:32 -0700160 * buffers. If any source buffers (blocks[i] where i < disks - 2) are
161 * set to NULL those buffers will be replaced with the raid6_zero_page
162 * in the synchronous path and omitted in the hardware-asynchronous
163 * path.
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700164 */
165struct dma_async_tx_descriptor *
166async_gen_syndrome(struct page **blocks, unsigned int offset, int disks,
167 size_t len, struct async_submit_ctl *submit)
168{
169 int src_cnt = disks - 2;
170 struct dma_chan *chan = async_tx_find_channel(submit, DMA_PQ,
171 &P(blocks, disks), 2,
172 blocks, src_cnt, len);
173 struct dma_device *device = chan ? chan->device : NULL;
Dan Williams7476bd72013-10-18 19:35:29 +0200174 struct dmaengine_unmap_data *unmap = NULL;
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700175
176 BUG_ON(disks > 255 || !(P(blocks, disks) || Q(blocks, disks)));
177
Dan Williams7476bd72013-10-18 19:35:29 +0200178 if (device)
179 unmap = dmaengine_get_unmap_data(device->dev, disks, GFP_NOIO);
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700180
Dan Williams7476bd72013-10-18 19:35:29 +0200181 if (unmap &&
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700182 (src_cnt <= dma_maxpq(device, 0) ||
Dan Williams83544ae2009-09-08 17:42:53 -0700183 dma_maxpq(device, DMA_PREP_CONTINUE) > 0) &&
184 is_dma_pq_aligned(device, offset, 0, len)) {
Dan Williams7476bd72013-10-18 19:35:29 +0200185 struct dma_async_tx_descriptor *tx;
186 enum dma_ctrl_flags dma_flags = 0;
187 unsigned char coefs[src_cnt];
188 int i, j;
189
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700190 /* run the p+q asynchronously */
191 pr_debug("%s: (async) disks: %d len: %zu\n",
192 __func__, disks, len);
Dan Williams7476bd72013-10-18 19:35:29 +0200193
194 /* convert source addresses being careful to collapse 'empty'
195 * sources and update the coefficients accordingly
196 */
197 unmap->len = len;
198 for (i = 0, j = 0; i < src_cnt; i++) {
199 if (blocks[i] == NULL)
200 continue;
201 unmap->addr[j] = dma_map_page(device->dev, blocks[i], offset,
202 len, DMA_TO_DEVICE);
203 coefs[j] = raid6_gfexp[i];
204 unmap->to_cnt++;
205 j++;
206 }
207
208 /*
209 * DMAs use destinations as sources,
210 * so use BIDIRECTIONAL mapping
211 */
212 unmap->bidi_cnt++;
213 if (P(blocks, disks))
214 unmap->addr[j++] = dma_map_page(device->dev, P(blocks, disks),
215 offset, len, DMA_BIDIRECTIONAL);
216 else {
217 unmap->addr[j++] = 0;
218 dma_flags |= DMA_PREP_PQ_DISABLE_P;
219 }
220
221 unmap->bidi_cnt++;
222 if (Q(blocks, disks))
223 unmap->addr[j++] = dma_map_page(device->dev, Q(blocks, disks),
224 offset, len, DMA_BIDIRECTIONAL);
225 else {
226 unmap->addr[j++] = 0;
227 dma_flags |= DMA_PREP_PQ_DISABLE_Q;
228 }
229
230 tx = do_async_gen_syndrome(chan, coefs, j, unmap, dma_flags, submit);
231 dmaengine_unmap_put(unmap);
232 return tx;
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700233 }
234
Dan Williams7476bd72013-10-18 19:35:29 +0200235 dmaengine_unmap_put(unmap);
236
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700237 /* run the pq synchronously */
238 pr_debug("%s: (sync) disks: %d len: %zu\n", __func__, disks, len);
239
240 /* wait for any prerequisite operations */
241 async_tx_quiesce(&submit->depend_tx);
242
243 if (!P(blocks, disks)) {
Dan Williams030b0772009-10-19 18:09:32 -0700244 P(blocks, disks) = pq_scribble_page;
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700245 BUG_ON(len + offset > PAGE_SIZE);
246 }
247 if (!Q(blocks, disks)) {
Dan Williams030b0772009-10-19 18:09:32 -0700248 Q(blocks, disks) = pq_scribble_page;
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700249 BUG_ON(len + offset > PAGE_SIZE);
250 }
251 do_sync_gen_syndrome(blocks, offset, disks, len, submit);
252
253 return NULL;
254}
255EXPORT_SYMBOL_GPL(async_gen_syndrome);
256
Dan Williams7b3cc2b2009-11-19 17:10:37 -0700257static inline struct dma_chan *
258pq_val_chan(struct async_submit_ctl *submit, struct page **blocks, int disks, size_t len)
259{
260 #ifdef CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA
261 return NULL;
262 #endif
263 return async_tx_find_channel(submit, DMA_PQ_VAL, NULL, 0, blocks,
264 disks, len);
265}
266
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700267/**
268 * async_syndrome_val - asynchronously validate a raid6 syndrome
269 * @blocks: source blocks from idx 0..disks-3, P @ disks-2 and Q @ disks-1
270 * @offset: common offset into each block (src and dest) to start transaction
271 * @disks: number of blocks (including missing P or Q, see below)
272 * @len: length of operation in bytes
273 * @pqres: on val failure SUM_CHECK_P_RESULT and/or SUM_CHECK_Q_RESULT are set
274 * @spare: temporary result buffer for the synchronous case
275 * @submit: submission / completion modifiers
276 *
277 * The same notes from async_gen_syndrome apply to the 'blocks',
278 * and 'disks' parameters of this routine. The synchronous path
279 * requires a temporary result buffer and submit->scribble to be
280 * specified.
281 */
282struct dma_async_tx_descriptor *
283async_syndrome_val(struct page **blocks, unsigned int offset, int disks,
284 size_t len, enum sum_check_flags *pqres, struct page *spare,
285 struct async_submit_ctl *submit)
286{
Dan Williams7b3cc2b2009-11-19 17:10:37 -0700287 struct dma_chan *chan = pq_val_chan(submit, blocks, disks, len);
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700288 struct dma_device *device = chan ? chan->device : NULL;
289 struct dma_async_tx_descriptor *tx;
NeilBrownb2141e62009-10-16 16:40:34 +1100290 unsigned char coefs[disks-2];
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700291 enum dma_ctrl_flags dma_flags = submit->cb_fn ? DMA_PREP_INTERRUPT : 0;
Dan Williams1786b942013-10-18 19:35:30 +0200292 struct dmaengine_unmap_data *unmap = NULL;
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700293
294 BUG_ON(disks < 4);
295
Dan Williams1786b942013-10-18 19:35:30 +0200296 if (device)
297 unmap = dmaengine_get_unmap_data(device->dev, disks, GFP_NOIO);
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700298
Dan Williams1786b942013-10-18 19:35:30 +0200299 if (unmap && disks <= dma_maxpq(device, 0) &&
Dan Williams83544ae2009-09-08 17:42:53 -0700300 is_dma_pq_aligned(device, offset, 0, len)) {
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700301 struct device *dev = device->dev;
Dan Williams1786b942013-10-18 19:35:30 +0200302 dma_addr_t pq[2];
303 int i, j = 0, src_cnt = 0;
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700304
305 pr_debug("%s: (async) disks: %d len: %zu\n",
306 __func__, disks, len);
Dan Williams1786b942013-10-18 19:35:30 +0200307
308 unmap->len = len;
309 for (i = 0; i < disks-2; i++)
310 if (likely(blocks[i])) {
311 unmap->addr[j] = dma_map_page(dev, blocks[i],
312 offset, len,
313 DMA_TO_DEVICE);
314 coefs[j] = raid6_gfexp[i];
315 unmap->to_cnt++;
316 src_cnt++;
317 j++;
318 }
319
320 if (!P(blocks, disks)) {
321 pq[0] = 0;
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700322 dma_flags |= DMA_PREP_PQ_DISABLE_P;
Dan Williams1786b942013-10-18 19:35:30 +0200323 } else {
Dan Williams56764702009-10-19 18:09:32 -0700324 pq[0] = dma_map_page(dev, P(blocks, disks),
NeilBrownb2141e62009-10-16 16:40:34 +1100325 offset, len,
326 DMA_TO_DEVICE);
Dan Williams1786b942013-10-18 19:35:30 +0200327 unmap->addr[j++] = pq[0];
328 unmap->to_cnt++;
329 }
330 if (!Q(blocks, disks)) {
331 pq[1] = 0;
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700332 dma_flags |= DMA_PREP_PQ_DISABLE_Q;
Dan Williams1786b942013-10-18 19:35:30 +0200333 } else {
Dan Williams56764702009-10-19 18:09:32 -0700334 pq[1] = dma_map_page(dev, Q(blocks, disks),
NeilBrownb2141e62009-10-16 16:40:34 +1100335 offset, len,
336 DMA_TO_DEVICE);
Dan Williams1786b942013-10-18 19:35:30 +0200337 unmap->addr[j++] = pq[1];
338 unmap->to_cnt++;
339 }
NeilBrownb2141e62009-10-16 16:40:34 +1100340
Dan Williams0403e382009-09-08 17:42:50 -0700341 if (submit->flags & ASYNC_TX_FENCE)
342 dma_flags |= DMA_PREP_FENCE;
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700343 for (;;) {
Dan Williams1786b942013-10-18 19:35:30 +0200344 tx = device->device_prep_dma_pq_val(chan, pq,
345 unmap->addr,
NeilBrownb2141e62009-10-16 16:40:34 +1100346 src_cnt,
347 coefs,
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700348 len, pqres,
349 dma_flags);
350 if (likely(tx))
351 break;
352 async_tx_quiesce(&submit->depend_tx);
353 dma_async_issue_pending(chan);
354 }
Dan Williams1786b942013-10-18 19:35:30 +0200355
356 dma_set_unmap(tx, unmap);
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700357 async_tx_submit(chan, tx, submit);
358
359 return tx;
360 } else {
361 struct page *p_src = P(blocks, disks);
362 struct page *q_src = Q(blocks, disks);
363 enum async_tx_flags flags_orig = submit->flags;
364 dma_async_tx_callback cb_fn_orig = submit->cb_fn;
365 void *scribble = submit->scribble;
366 void *cb_param_orig = submit->cb_param;
367 void *p, *q, *s;
368
369 pr_debug("%s: (sync) disks: %d len: %zu\n",
370 __func__, disks, len);
371
372 /* caller must provide a temporary result buffer and
373 * allow the input parameters to be preserved
374 */
375 BUG_ON(!spare || !scribble);
376
377 /* wait for any prerequisite operations */
378 async_tx_quiesce(&submit->depend_tx);
379
380 /* recompute p and/or q into the temporary buffer and then
381 * check to see the result matches the current value
382 */
383 tx = NULL;
384 *pqres = 0;
385 if (p_src) {
386 init_async_submit(submit, ASYNC_TX_XOR_ZERO_DST, NULL,
387 NULL, NULL, scribble);
388 tx = async_xor(spare, blocks, offset, disks-2, len, submit);
389 async_tx_quiesce(&tx);
390 p = page_address(p_src) + offset;
391 s = page_address(spare) + offset;
392 *pqres |= !!memcmp(p, s, len) << SUM_CHECK_P;
393 }
394
395 if (q_src) {
396 P(blocks, disks) = NULL;
397 Q(blocks, disks) = spare;
398 init_async_submit(submit, 0, NULL, NULL, NULL, scribble);
399 tx = async_gen_syndrome(blocks, offset, disks, len, submit);
400 async_tx_quiesce(&tx);
401 q = page_address(q_src) + offset;
402 s = page_address(spare) + offset;
403 *pqres |= !!memcmp(q, s, len) << SUM_CHECK_Q;
404 }
405
406 /* restore P, Q and submit */
407 P(blocks, disks) = p_src;
408 Q(blocks, disks) = q_src;
409
410 submit->cb_fn = cb_fn_orig;
411 submit->cb_param = cb_param_orig;
412 submit->flags = flags_orig;
413 async_tx_sync_epilog(submit);
414
415 return NULL;
416 }
417}
418EXPORT_SYMBOL_GPL(async_syndrome_val);
419
420static int __init async_pq_init(void)
421{
Dan Williams030b0772009-10-19 18:09:32 -0700422 pq_scribble_page = alloc_page(GFP_KERNEL);
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700423
Dan Williams030b0772009-10-19 18:09:32 -0700424 if (pq_scribble_page)
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700425 return 0;
426
427 pr_err("%s: failed to allocate required spare page\n", __func__);
428
429 return -ENOMEM;
430}
431
432static void __exit async_pq_exit(void)
433{
Dan Williams030b0772009-10-19 18:09:32 -0700434 put_page(pq_scribble_page);
Dan Williamsb2f46fd2009-07-14 12:20:36 -0700435}
436
437module_init(async_pq_init);
438module_exit(async_pq_exit);
439
440MODULE_DESCRIPTION("asynchronous raid6 syndrome generation/validation");
441MODULE_LICENSE("GPL");