blob: b245c38dbec3ae0341e853ce6ced3e831a930745 [file] [log] [blame]
Chris Leechc13c8262006-05-23 17:18:44 -07001/*
2 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the Free
6 * Software Foundation; either version 2 of the License, or (at your option)
7 * any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59
16 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called COPYING.
20 */
21
22/*
23 * This code implements the DMA subsystem. It provides a HW-neutral interface
24 * for other kernel code to use asynchronous memory copy capabilities,
25 * if present, and allows different HW DMA drivers to register as providing
26 * this capability.
27 *
28 * Due to the fact we are accelerating what is already a relatively fast
29 * operation, the code goes to great lengths to avoid additional overhead,
30 * such as locking.
31 *
32 * LOCKING:
33 *
Dan Williamsaa1e6f12009-01-06 11:38:17 -070034 * The subsystem keeps a global list of dma_device structs it is protected by a
35 * mutex, dma_list_mutex.
Chris Leechc13c8262006-05-23 17:18:44 -070036 *
Dan Williamsf27c5802009-01-06 11:38:18 -070037 * A subsystem can get access to a channel by calling dmaengine_get() followed
38 * by dma_find_channel(), or if it has need for an exclusive channel it can call
39 * dma_request_channel(). Once a channel is allocated a reference is taken
40 * against its corresponding driver to disable removal.
41 *
Chris Leechc13c8262006-05-23 17:18:44 -070042 * Each device has a channels list, which runs unlocked but is never modified
43 * once the device is registered, it's just setup by the driver.
44 *
Dan Williamsf27c5802009-01-06 11:38:18 -070045 * See Documentation/dmaengine.txt for more details
Chris Leechc13c8262006-05-23 17:18:44 -070046 */
47
48#include <linux/init.h>
49#include <linux/module.h>
Dan Williams7405f742007-01-02 11:10:43 -070050#include <linux/mm.h>
Chris Leechc13c8262006-05-23 17:18:44 -070051#include <linux/device.h>
52#include <linux/dmaengine.h>
53#include <linux/hardirq.h>
54#include <linux/spinlock.h>
55#include <linux/percpu.h>
56#include <linux/rcupdate.h>
57#include <linux/mutex.h>
Dan Williams7405f742007-01-02 11:10:43 -070058#include <linux/jiffies.h>
Dan Williams2ba05622009-01-06 11:38:14 -070059#include <linux/rculist.h>
Chris Leechc13c8262006-05-23 17:18:44 -070060
61static DEFINE_MUTEX(dma_list_mutex);
62static LIST_HEAD(dma_device_list);
Dan Williams6f49a572009-01-06 11:38:14 -070063static long dmaengine_ref_count;
Chris Leechc13c8262006-05-23 17:18:44 -070064
65/* --- sysfs implementation --- */
66
Tony Jones891f78e2007-09-25 02:03:03 +020067static ssize_t show_memcpy_count(struct device *dev, struct device_attribute *attr, char *buf)
Chris Leechc13c8262006-05-23 17:18:44 -070068{
Tony Jones891f78e2007-09-25 02:03:03 +020069 struct dma_chan *chan = to_dma_chan(dev);
Chris Leechc13c8262006-05-23 17:18:44 -070070 unsigned long count = 0;
71 int i;
72
Andrew Morton17f3ae02006-05-25 13:26:53 -070073 for_each_possible_cpu(i)
Chris Leechc13c8262006-05-23 17:18:44 -070074 count += per_cpu_ptr(chan->local, i)->memcpy_count;
75
76 return sprintf(buf, "%lu\n", count);
77}
78
Tony Jones891f78e2007-09-25 02:03:03 +020079static ssize_t show_bytes_transferred(struct device *dev, struct device_attribute *attr,
80 char *buf)
Chris Leechc13c8262006-05-23 17:18:44 -070081{
Tony Jones891f78e2007-09-25 02:03:03 +020082 struct dma_chan *chan = to_dma_chan(dev);
Chris Leechc13c8262006-05-23 17:18:44 -070083 unsigned long count = 0;
84 int i;
85
Andrew Morton17f3ae02006-05-25 13:26:53 -070086 for_each_possible_cpu(i)
Chris Leechc13c8262006-05-23 17:18:44 -070087 count += per_cpu_ptr(chan->local, i)->bytes_transferred;
88
89 return sprintf(buf, "%lu\n", count);
90}
91
Tony Jones891f78e2007-09-25 02:03:03 +020092static ssize_t show_in_use(struct device *dev, struct device_attribute *attr, char *buf)
Chris Leechc13c8262006-05-23 17:18:44 -070093{
Tony Jones891f78e2007-09-25 02:03:03 +020094 struct dma_chan *chan = to_dma_chan(dev);
Chris Leechc13c8262006-05-23 17:18:44 -070095
Dan Williams6f49a572009-01-06 11:38:14 -070096 return sprintf(buf, "%d\n", chan->client_count);
Chris Leechc13c8262006-05-23 17:18:44 -070097}
98
Tony Jones891f78e2007-09-25 02:03:03 +020099static struct device_attribute dma_attrs[] = {
Chris Leechc13c8262006-05-23 17:18:44 -0700100 __ATTR(memcpy_count, S_IRUGO, show_memcpy_count, NULL),
101 __ATTR(bytes_transferred, S_IRUGO, show_bytes_transferred, NULL),
102 __ATTR(in_use, S_IRUGO, show_in_use, NULL),
103 __ATTR_NULL
104};
105
Chris Leechc13c8262006-05-23 17:18:44 -0700106static struct class dma_devclass = {
Tony Jones891f78e2007-09-25 02:03:03 +0200107 .name = "dma",
108 .dev_attrs = dma_attrs,
Chris Leechc13c8262006-05-23 17:18:44 -0700109};
110
111/* --- client and device registration --- */
112
Dan Williams59b5ec22009-01-06 11:38:15 -0700113#define dma_device_satisfies_mask(device, mask) \
114 __dma_device_satisfies_mask((device), &(mask))
Dan Williamsd379b012007-07-09 11:56:42 -0700115static int
Dan Williams59b5ec22009-01-06 11:38:15 -0700116__dma_device_satisfies_mask(struct dma_device *device, dma_cap_mask_t *want)
Dan Williamsd379b012007-07-09 11:56:42 -0700117{
118 dma_cap_mask_t has;
119
Dan Williams59b5ec22009-01-06 11:38:15 -0700120 bitmap_and(has.bits, want->bits, device->cap_mask.bits,
Dan Williamsd379b012007-07-09 11:56:42 -0700121 DMA_TX_TYPE_END);
122 return bitmap_equal(want->bits, has.bits, DMA_TX_TYPE_END);
123}
124
Dan Williams6f49a572009-01-06 11:38:14 -0700125static struct module *dma_chan_to_owner(struct dma_chan *chan)
126{
127 return chan->device->dev->driver->owner;
128}
129
130/**
131 * balance_ref_count - catch up the channel reference count
132 * @chan - channel to balance ->client_count versus dmaengine_ref_count
133 *
134 * balance_ref_count must be called under dma_list_mutex
135 */
136static void balance_ref_count(struct dma_chan *chan)
137{
138 struct module *owner = dma_chan_to_owner(chan);
139
140 while (chan->client_count < dmaengine_ref_count) {
141 __module_get(owner);
142 chan->client_count++;
143 }
144}
145
146/**
147 * dma_chan_get - try to grab a dma channel's parent driver module
148 * @chan - channel to grab
149 *
150 * Must be called under dma_list_mutex
151 */
152static int dma_chan_get(struct dma_chan *chan)
153{
154 int err = -ENODEV;
155 struct module *owner = dma_chan_to_owner(chan);
156
157 if (chan->client_count) {
158 __module_get(owner);
159 err = 0;
160 } else if (try_module_get(owner))
161 err = 0;
162
163 if (err == 0)
164 chan->client_count++;
165
166 /* allocate upon first client reference */
167 if (chan->client_count == 1 && err == 0) {
Dan Williamsaa1e6f12009-01-06 11:38:17 -0700168 int desc_cnt = chan->device->device_alloc_chan_resources(chan);
Dan Williams6f49a572009-01-06 11:38:14 -0700169
170 if (desc_cnt < 0) {
171 err = desc_cnt;
172 chan->client_count = 0;
173 module_put(owner);
Dan Williams59b5ec22009-01-06 11:38:15 -0700174 } else if (!dma_has_cap(DMA_PRIVATE, chan->device->cap_mask))
Dan Williams6f49a572009-01-06 11:38:14 -0700175 balance_ref_count(chan);
176 }
177
178 return err;
179}
180
181/**
182 * dma_chan_put - drop a reference to a dma channel's parent driver module
183 * @chan - channel to release
184 *
185 * Must be called under dma_list_mutex
186 */
187static void dma_chan_put(struct dma_chan *chan)
188{
189 if (!chan->client_count)
190 return; /* this channel failed alloc_chan_resources */
191 chan->client_count--;
192 module_put(dma_chan_to_owner(chan));
193 if (chan->client_count == 0)
194 chan->device->device_free_chan_resources(chan);
195}
196
Dan Williams7405f742007-01-02 11:10:43 -0700197enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie)
198{
199 enum dma_status status;
200 unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
201
202 dma_async_issue_pending(chan);
203 do {
204 status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
205 if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
206 printk(KERN_ERR "dma_sync_wait_timeout!\n");
207 return DMA_ERROR;
208 }
209 } while (status == DMA_IN_PROGRESS);
210
211 return status;
212}
213EXPORT_SYMBOL(dma_sync_wait);
214
Chris Leechc13c8262006-05-23 17:18:44 -0700215/**
Dan Williamsbec08512009-01-06 11:38:14 -0700216 * dma_cap_mask_all - enable iteration over all operation types
217 */
218static dma_cap_mask_t dma_cap_mask_all;
219
220/**
221 * dma_chan_tbl_ent - tracks channel allocations per core/operation
222 * @chan - associated channel for this entry
223 */
224struct dma_chan_tbl_ent {
225 struct dma_chan *chan;
226};
227
228/**
229 * channel_table - percpu lookup table for memory-to-memory offload providers
230 */
231static struct dma_chan_tbl_ent *channel_table[DMA_TX_TYPE_END];
232
233static int __init dma_channel_table_init(void)
234{
235 enum dma_transaction_type cap;
236 int err = 0;
237
238 bitmap_fill(dma_cap_mask_all.bits, DMA_TX_TYPE_END);
239
Dan Williams59b5ec22009-01-06 11:38:15 -0700240 /* 'interrupt', 'private', and 'slave' are channel capabilities,
241 * but are not associated with an operation so they do not need
242 * an entry in the channel_table
Dan Williamsbec08512009-01-06 11:38:14 -0700243 */
244 clear_bit(DMA_INTERRUPT, dma_cap_mask_all.bits);
Dan Williams59b5ec22009-01-06 11:38:15 -0700245 clear_bit(DMA_PRIVATE, dma_cap_mask_all.bits);
Dan Williamsbec08512009-01-06 11:38:14 -0700246 clear_bit(DMA_SLAVE, dma_cap_mask_all.bits);
247
248 for_each_dma_cap_mask(cap, dma_cap_mask_all) {
249 channel_table[cap] = alloc_percpu(struct dma_chan_tbl_ent);
250 if (!channel_table[cap]) {
251 err = -ENOMEM;
252 break;
253 }
254 }
255
256 if (err) {
257 pr_err("dmaengine: initialization failure\n");
258 for_each_dma_cap_mask(cap, dma_cap_mask_all)
259 if (channel_table[cap])
260 free_percpu(channel_table[cap]);
261 }
262
263 return err;
264}
265subsys_initcall(dma_channel_table_init);
266
267/**
268 * dma_find_channel - find a channel to carry out the operation
269 * @tx_type: transaction type
270 */
271struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type)
272{
273 struct dma_chan *chan;
274 int cpu;
275
276 WARN_ONCE(dmaengine_ref_count == 0,
277 "client called %s without a reference", __func__);
278
279 cpu = get_cpu();
280 chan = per_cpu_ptr(channel_table[tx_type], cpu)->chan;
281 put_cpu();
282
283 return chan;
284}
285EXPORT_SYMBOL(dma_find_channel);
286
287/**
Dan Williams2ba05622009-01-06 11:38:14 -0700288 * dma_issue_pending_all - flush all pending operations across all channels
289 */
290void dma_issue_pending_all(void)
291{
292 struct dma_device *device;
293 struct dma_chan *chan;
294
295 WARN_ONCE(dmaengine_ref_count == 0,
296 "client called %s without a reference", __func__);
297
298 rcu_read_lock();
Dan Williams59b5ec22009-01-06 11:38:15 -0700299 list_for_each_entry_rcu(device, &dma_device_list, global_node) {
300 if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
301 continue;
Dan Williams2ba05622009-01-06 11:38:14 -0700302 list_for_each_entry(chan, &device->channels, device_node)
303 if (chan->client_count)
304 device->device_issue_pending(chan);
Dan Williams59b5ec22009-01-06 11:38:15 -0700305 }
Dan Williams2ba05622009-01-06 11:38:14 -0700306 rcu_read_unlock();
307}
308EXPORT_SYMBOL(dma_issue_pending_all);
309
310/**
Dan Williamsbec08512009-01-06 11:38:14 -0700311 * nth_chan - returns the nth channel of the given capability
312 * @cap: capability to match
313 * @n: nth channel desired
314 *
315 * Defaults to returning the channel with the desired capability and the
316 * lowest reference count when 'n' cannot be satisfied. Must be called
317 * under dma_list_mutex.
318 */
319static struct dma_chan *nth_chan(enum dma_transaction_type cap, int n)
320{
321 struct dma_device *device;
322 struct dma_chan *chan;
323 struct dma_chan *ret = NULL;
324 struct dma_chan *min = NULL;
325
326 list_for_each_entry(device, &dma_device_list, global_node) {
Dan Williams59b5ec22009-01-06 11:38:15 -0700327 if (!dma_has_cap(cap, device->cap_mask) ||
328 dma_has_cap(DMA_PRIVATE, device->cap_mask))
Dan Williamsbec08512009-01-06 11:38:14 -0700329 continue;
330 list_for_each_entry(chan, &device->channels, device_node) {
331 if (!chan->client_count)
332 continue;
333 if (!min)
334 min = chan;
335 else if (chan->table_count < min->table_count)
336 min = chan;
337
338 if (n-- == 0) {
339 ret = chan;
340 break; /* done */
341 }
342 }
343 if (ret)
344 break; /* done */
345 }
346
347 if (!ret)
348 ret = min;
349
350 if (ret)
351 ret->table_count++;
352
353 return ret;
354}
355
356/**
357 * dma_channel_rebalance - redistribute the available channels
358 *
359 * Optimize for cpu isolation (each cpu gets a dedicated channel for an
360 * operation type) in the SMP case, and operation isolation (avoid
361 * multi-tasking channels) in the non-SMP case. Must be called under
362 * dma_list_mutex.
363 */
364static void dma_channel_rebalance(void)
365{
366 struct dma_chan *chan;
367 struct dma_device *device;
368 int cpu;
369 int cap;
370 int n;
371
372 /* undo the last distribution */
373 for_each_dma_cap_mask(cap, dma_cap_mask_all)
374 for_each_possible_cpu(cpu)
375 per_cpu_ptr(channel_table[cap], cpu)->chan = NULL;
376
Dan Williams59b5ec22009-01-06 11:38:15 -0700377 list_for_each_entry(device, &dma_device_list, global_node) {
378 if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
379 continue;
Dan Williamsbec08512009-01-06 11:38:14 -0700380 list_for_each_entry(chan, &device->channels, device_node)
381 chan->table_count = 0;
Dan Williams59b5ec22009-01-06 11:38:15 -0700382 }
Dan Williamsbec08512009-01-06 11:38:14 -0700383
384 /* don't populate the channel_table if no clients are available */
385 if (!dmaengine_ref_count)
386 return;
387
388 /* redistribute available channels */
389 n = 0;
390 for_each_dma_cap_mask(cap, dma_cap_mask_all)
391 for_each_online_cpu(cpu) {
392 if (num_possible_cpus() > 1)
393 chan = nth_chan(cap, n++);
394 else
395 chan = nth_chan(cap, -1);
396
397 per_cpu_ptr(channel_table[cap], cpu)->chan = chan;
398 }
399}
400
Dan Williams59b5ec22009-01-06 11:38:15 -0700401static struct dma_chan *private_candidate(dma_cap_mask_t *mask, struct dma_device *dev)
402{
403 struct dma_chan *chan;
404 struct dma_chan *ret = NULL;
405
406 if (!__dma_device_satisfies_mask(dev, mask)) {
407 pr_debug("%s: wrong capabilities\n", __func__);
408 return NULL;
409 }
410 /* devices with multiple channels need special handling as we need to
411 * ensure that all channels are either private or public.
412 */
413 if (dev->chancnt > 1 && !dma_has_cap(DMA_PRIVATE, dev->cap_mask))
414 list_for_each_entry(chan, &dev->channels, device_node) {
415 /* some channels are already publicly allocated */
416 if (chan->client_count)
417 return NULL;
418 }
419
420 list_for_each_entry(chan, &dev->channels, device_node) {
421 if (chan->client_count) {
422 pr_debug("%s: %s busy\n",
423 __func__, dev_name(&chan->dev));
424 continue;
425 }
426 ret = chan;
427 break;
428 }
429
430 return ret;
431}
432
433/**
434 * dma_request_channel - try to allocate an exclusive channel
435 * @mask: capabilities that the channel must satisfy
436 * @fn: optional callback to disposition available channels
437 * @fn_param: opaque parameter to pass to dma_filter_fn
438 */
439struct dma_chan *__dma_request_channel(dma_cap_mask_t *mask, dma_filter_fn fn, void *fn_param)
440{
441 struct dma_device *device, *_d;
442 struct dma_chan *chan = NULL;
443 enum dma_state_client ack;
444 int err;
445
446 /* Find a channel */
447 mutex_lock(&dma_list_mutex);
448 list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
449 chan = private_candidate(mask, device);
450 if (!chan)
451 continue;
452
453 if (fn)
454 ack = fn(chan, fn_param);
455 else
456 ack = DMA_ACK;
457
458 if (ack == DMA_ACK) {
459 /* Found a suitable channel, try to grab, prep, and
460 * return it. We first set DMA_PRIVATE to disable
461 * balance_ref_count as this channel will not be
462 * published in the general-purpose allocator
463 */
464 dma_cap_set(DMA_PRIVATE, device->cap_mask);
465 err = dma_chan_get(chan);
466
467 if (err == -ENODEV) {
468 pr_debug("%s: %s module removed\n", __func__,
469 dev_name(&chan->dev));
470 list_del_rcu(&device->global_node);
471 } else if (err)
472 pr_err("dmaengine: failed to get %s: (%d)\n",
473 dev_name(&chan->dev), err);
474 else
475 break;
476 } else if (ack == DMA_DUP) {
477 pr_debug("%s: %s filter said DMA_DUP\n",
478 __func__, dev_name(&chan->dev));
479 } else if (ack == DMA_NAK) {
480 pr_debug("%s: %s filter said DMA_NAK\n",
481 __func__, dev_name(&chan->dev));
482 break;
483 } else
484 WARN_ONCE(1, "filter_fn: unknown response?\n");
485 chan = NULL;
486 }
487 mutex_unlock(&dma_list_mutex);
488
489 pr_debug("%s: %s (%s)\n", __func__, chan ? "success" : "fail",
490 chan ? dev_name(&chan->dev) : NULL);
491
492 return chan;
493}
494EXPORT_SYMBOL_GPL(__dma_request_channel);
495
496void dma_release_channel(struct dma_chan *chan)
497{
498 mutex_lock(&dma_list_mutex);
499 WARN_ONCE(chan->client_count != 1,
500 "chan reference count %d != 1\n", chan->client_count);
501 dma_chan_put(chan);
502 mutex_unlock(&dma_list_mutex);
503}
504EXPORT_SYMBOL_GPL(dma_release_channel);
505
Dan Williamsbec08512009-01-06 11:38:14 -0700506/**
Dan Williams209b84a2009-01-06 11:38:17 -0700507 * dmaengine_get - register interest in dma_channels
Chris Leechc13c8262006-05-23 17:18:44 -0700508 */
Dan Williams209b84a2009-01-06 11:38:17 -0700509void dmaengine_get(void)
Chris Leechc13c8262006-05-23 17:18:44 -0700510{
Dan Williams6f49a572009-01-06 11:38:14 -0700511 struct dma_device *device, *_d;
512 struct dma_chan *chan;
513 int err;
514
Chris Leechc13c8262006-05-23 17:18:44 -0700515 mutex_lock(&dma_list_mutex);
Dan Williams6f49a572009-01-06 11:38:14 -0700516 dmaengine_ref_count++;
517
518 /* try to grab channels */
Dan Williams59b5ec22009-01-06 11:38:15 -0700519 list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
520 if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
521 continue;
Dan Williams6f49a572009-01-06 11:38:14 -0700522 list_for_each_entry(chan, &device->channels, device_node) {
523 err = dma_chan_get(chan);
524 if (err == -ENODEV) {
525 /* module removed before we could use it */
Dan Williams2ba05622009-01-06 11:38:14 -0700526 list_del_rcu(&device->global_node);
Dan Williams6f49a572009-01-06 11:38:14 -0700527 break;
528 } else if (err)
529 pr_err("dmaengine: failed to get %s: (%d)\n",
530 dev_name(&chan->dev), err);
531 }
Dan Williams59b5ec22009-01-06 11:38:15 -0700532 }
Dan Williams6f49a572009-01-06 11:38:14 -0700533
Dan Williamsbec08512009-01-06 11:38:14 -0700534 /* if this is the first reference and there were channels
535 * waiting we need to rebalance to get those channels
536 * incorporated into the channel table
537 */
538 if (dmaengine_ref_count == 1)
539 dma_channel_rebalance();
Chris Leechc13c8262006-05-23 17:18:44 -0700540 mutex_unlock(&dma_list_mutex);
Chris Leechc13c8262006-05-23 17:18:44 -0700541}
Dan Williams209b84a2009-01-06 11:38:17 -0700542EXPORT_SYMBOL(dmaengine_get);
Chris Leechc13c8262006-05-23 17:18:44 -0700543
544/**
Dan Williams209b84a2009-01-06 11:38:17 -0700545 * dmaengine_put - let dma drivers be removed when ref_count == 0
Chris Leechc13c8262006-05-23 17:18:44 -0700546 */
Dan Williams209b84a2009-01-06 11:38:17 -0700547void dmaengine_put(void)
Chris Leechc13c8262006-05-23 17:18:44 -0700548{
Dan Williamsd379b012007-07-09 11:56:42 -0700549 struct dma_device *device;
Chris Leechc13c8262006-05-23 17:18:44 -0700550 struct dma_chan *chan;
551
Chris Leechc13c8262006-05-23 17:18:44 -0700552 mutex_lock(&dma_list_mutex);
Dan Williams6f49a572009-01-06 11:38:14 -0700553 dmaengine_ref_count--;
554 BUG_ON(dmaengine_ref_count < 0);
555 /* drop channel references */
Dan Williams59b5ec22009-01-06 11:38:15 -0700556 list_for_each_entry(device, &dma_device_list, global_node) {
557 if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
558 continue;
Dan Williams6f49a572009-01-06 11:38:14 -0700559 list_for_each_entry(chan, &device->channels, device_node)
560 dma_chan_put(chan);
Dan Williams59b5ec22009-01-06 11:38:15 -0700561 }
Chris Leechc13c8262006-05-23 17:18:44 -0700562 mutex_unlock(&dma_list_mutex);
Chris Leechc13c8262006-05-23 17:18:44 -0700563}
Dan Williams209b84a2009-01-06 11:38:17 -0700564EXPORT_SYMBOL(dmaengine_put);
Chris Leechc13c8262006-05-23 17:18:44 -0700565
566/**
Randy Dunlap65088712006-07-03 19:45:31 -0700567 * dma_async_device_register - registers DMA devices found
Chris Leechc13c8262006-05-23 17:18:44 -0700568 * @device: &dma_device
569 */
570int dma_async_device_register(struct dma_device *device)
571{
572 static int id;
Jeff Garzikff487fb2007-03-08 09:57:34 -0800573 int chancnt = 0, rc;
Chris Leechc13c8262006-05-23 17:18:44 -0700574 struct dma_chan* chan;
575
576 if (!device)
577 return -ENODEV;
578
Dan Williams7405f742007-01-02 11:10:43 -0700579 /* validate device routines */
580 BUG_ON(dma_has_cap(DMA_MEMCPY, device->cap_mask) &&
581 !device->device_prep_dma_memcpy);
582 BUG_ON(dma_has_cap(DMA_XOR, device->cap_mask) &&
583 !device->device_prep_dma_xor);
584 BUG_ON(dma_has_cap(DMA_ZERO_SUM, device->cap_mask) &&
585 !device->device_prep_dma_zero_sum);
586 BUG_ON(dma_has_cap(DMA_MEMSET, device->cap_mask) &&
587 !device->device_prep_dma_memset);
Zhang Wei9b941c62008-03-13 17:45:28 -0700588 BUG_ON(dma_has_cap(DMA_INTERRUPT, device->cap_mask) &&
Dan Williams7405f742007-01-02 11:10:43 -0700589 !device->device_prep_dma_interrupt);
Haavard Skinnemoendc0ee6432008-07-08 11:59:35 -0700590 BUG_ON(dma_has_cap(DMA_SLAVE, device->cap_mask) &&
591 !device->device_prep_slave_sg);
592 BUG_ON(dma_has_cap(DMA_SLAVE, device->cap_mask) &&
593 !device->device_terminate_all);
Dan Williams7405f742007-01-02 11:10:43 -0700594
595 BUG_ON(!device->device_alloc_chan_resources);
596 BUG_ON(!device->device_free_chan_resources);
Dan Williams7405f742007-01-02 11:10:43 -0700597 BUG_ON(!device->device_is_tx_complete);
598 BUG_ON(!device->device_issue_pending);
599 BUG_ON(!device->dev);
600
Dan Williamsb0b42b12008-12-03 17:17:07 -0700601 mutex_lock(&dma_list_mutex);
Chris Leechc13c8262006-05-23 17:18:44 -0700602 device->dev_id = id++;
Dan Williamsb0b42b12008-12-03 17:17:07 -0700603 mutex_unlock(&dma_list_mutex);
Chris Leechc13c8262006-05-23 17:18:44 -0700604
605 /* represent channels in sysfs. Probably want devs too */
606 list_for_each_entry(chan, &device->channels, device_node) {
607 chan->local = alloc_percpu(typeof(*chan->local));
608 if (chan->local == NULL)
609 continue;
610
611 chan->chan_id = chancnt++;
Tony Jones891f78e2007-09-25 02:03:03 +0200612 chan->dev.class = &dma_devclass;
Haavard Skinnemoen1099dc72008-07-08 11:58:05 -0700613 chan->dev.parent = device->dev;
Kay Sievers06190d82008-11-11 13:12:33 -0700614 dev_set_name(&chan->dev, "dma%dchan%d",
615 device->dev_id, chan->chan_id);
Chris Leechc13c8262006-05-23 17:18:44 -0700616
Tony Jones891f78e2007-09-25 02:03:03 +0200617 rc = device_register(&chan->dev);
Jeff Garzikff487fb2007-03-08 09:57:34 -0800618 if (rc) {
Jeff Garzikff487fb2007-03-08 09:57:34 -0800619 free_percpu(chan->local);
620 chan->local = NULL;
621 goto err_out;
622 }
Dan Williams7cc5bf92008-07-08 11:58:21 -0700623 chan->client_count = 0;
Chris Leechc13c8262006-05-23 17:18:44 -0700624 }
Dan Williams59b5ec22009-01-06 11:38:15 -0700625 device->chancnt = chancnt;
Chris Leechc13c8262006-05-23 17:18:44 -0700626
627 mutex_lock(&dma_list_mutex);
Dan Williams59b5ec22009-01-06 11:38:15 -0700628 /* take references on public channels */
629 if (dmaengine_ref_count && !dma_has_cap(DMA_PRIVATE, device->cap_mask))
Dan Williams6f49a572009-01-06 11:38:14 -0700630 list_for_each_entry(chan, &device->channels, device_node) {
631 /* if clients are already waiting for channels we need
632 * to take references on their behalf
633 */
634 if (dma_chan_get(chan) == -ENODEV) {
635 /* note we can only get here for the first
636 * channel as the remaining channels are
637 * guaranteed to get a reference
638 */
639 rc = -ENODEV;
640 mutex_unlock(&dma_list_mutex);
641 goto err_out;
642 }
643 }
Dan Williams2ba05622009-01-06 11:38:14 -0700644 list_add_tail_rcu(&device->global_node, &dma_device_list);
Dan Williamsbec08512009-01-06 11:38:14 -0700645 dma_channel_rebalance();
Chris Leechc13c8262006-05-23 17:18:44 -0700646 mutex_unlock(&dma_list_mutex);
647
Chris Leechc13c8262006-05-23 17:18:44 -0700648 return 0;
Jeff Garzikff487fb2007-03-08 09:57:34 -0800649
650err_out:
651 list_for_each_entry(chan, &device->channels, device_node) {
652 if (chan->local == NULL)
653 continue;
Tony Jones891f78e2007-09-25 02:03:03 +0200654 device_unregister(&chan->dev);
Jeff Garzikff487fb2007-03-08 09:57:34 -0800655 free_percpu(chan->local);
656 }
657 return rc;
Chris Leechc13c8262006-05-23 17:18:44 -0700658}
David Brownell765e3d82007-03-16 13:38:05 -0800659EXPORT_SYMBOL(dma_async_device_register);
Chris Leechc13c8262006-05-23 17:18:44 -0700660
661/**
Dan Williams6f49a572009-01-06 11:38:14 -0700662 * dma_async_device_unregister - unregister a DMA device
Randy Dunlap65088712006-07-03 19:45:31 -0700663 * @device: &dma_device
Dan Williamsf27c5802009-01-06 11:38:18 -0700664 *
665 * This routine is called by dma driver exit routines, dmaengine holds module
666 * references to prevent it being called while channels are in use.
Randy Dunlap65088712006-07-03 19:45:31 -0700667 */
668void dma_async_device_unregister(struct dma_device *device)
Chris Leechc13c8262006-05-23 17:18:44 -0700669{
670 struct dma_chan *chan;
Chris Leechc13c8262006-05-23 17:18:44 -0700671
672 mutex_lock(&dma_list_mutex);
Dan Williams2ba05622009-01-06 11:38:14 -0700673 list_del_rcu(&device->global_node);
Dan Williamsbec08512009-01-06 11:38:14 -0700674 dma_channel_rebalance();
Chris Leechc13c8262006-05-23 17:18:44 -0700675 mutex_unlock(&dma_list_mutex);
676
677 list_for_each_entry(chan, &device->channels, device_node) {
Dan Williams6f49a572009-01-06 11:38:14 -0700678 WARN_ONCE(chan->client_count,
679 "%s called while %d clients hold a reference\n",
680 __func__, chan->client_count);
Tony Jones891f78e2007-09-25 02:03:03 +0200681 device_unregister(&chan->dev);
Chris Leechc13c8262006-05-23 17:18:44 -0700682 }
Chris Leechc13c8262006-05-23 17:18:44 -0700683}
David Brownell765e3d82007-03-16 13:38:05 -0800684EXPORT_SYMBOL(dma_async_device_unregister);
Chris Leechc13c8262006-05-23 17:18:44 -0700685
Dan Williams7405f742007-01-02 11:10:43 -0700686/**
687 * dma_async_memcpy_buf_to_buf - offloaded copy between virtual addresses
688 * @chan: DMA channel to offload copy to
689 * @dest: destination address (virtual)
690 * @src: source address (virtual)
691 * @len: length
692 *
693 * Both @dest and @src must be mappable to a bus address according to the
694 * DMA mapping API rules for streaming mappings.
695 * Both @dest and @src must stay memory resident (kernel memory or locked
696 * user space pages).
697 */
698dma_cookie_t
699dma_async_memcpy_buf_to_buf(struct dma_chan *chan, void *dest,
700 void *src, size_t len)
701{
702 struct dma_device *dev = chan->device;
703 struct dma_async_tx_descriptor *tx;
Dan Williams00367312008-02-02 19:49:57 -0700704 dma_addr_t dma_dest, dma_src;
Dan Williams7405f742007-01-02 11:10:43 -0700705 dma_cookie_t cookie;
706 int cpu;
707
Dan Williams00367312008-02-02 19:49:57 -0700708 dma_src = dma_map_single(dev->dev, src, len, DMA_TO_DEVICE);
709 dma_dest = dma_map_single(dev->dev, dest, len, DMA_FROM_DEVICE);
Dan Williams636bdea2008-04-17 20:17:26 -0700710 tx = dev->device_prep_dma_memcpy(chan, dma_dest, dma_src, len,
711 DMA_CTRL_ACK);
Dan Williams00367312008-02-02 19:49:57 -0700712
713 if (!tx) {
714 dma_unmap_single(dev->dev, dma_src, len, DMA_TO_DEVICE);
715 dma_unmap_single(dev->dev, dma_dest, len, DMA_FROM_DEVICE);
Dan Williams7405f742007-01-02 11:10:43 -0700716 return -ENOMEM;
Dan Williams00367312008-02-02 19:49:57 -0700717 }
Dan Williams7405f742007-01-02 11:10:43 -0700718
Dan Williams7405f742007-01-02 11:10:43 -0700719 tx->callback = NULL;
Dan Williams7405f742007-01-02 11:10:43 -0700720 cookie = tx->tx_submit(tx);
721
722 cpu = get_cpu();
723 per_cpu_ptr(chan->local, cpu)->bytes_transferred += len;
724 per_cpu_ptr(chan->local, cpu)->memcpy_count++;
725 put_cpu();
726
727 return cookie;
728}
729EXPORT_SYMBOL(dma_async_memcpy_buf_to_buf);
730
731/**
732 * dma_async_memcpy_buf_to_pg - offloaded copy from address to page
733 * @chan: DMA channel to offload copy to
734 * @page: destination page
735 * @offset: offset in page to copy to
736 * @kdata: source address (virtual)
737 * @len: length
738 *
739 * Both @page/@offset and @kdata must be mappable to a bus address according
740 * to the DMA mapping API rules for streaming mappings.
741 * Both @page/@offset and @kdata must stay memory resident (kernel memory or
742 * locked user space pages)
743 */
744dma_cookie_t
745dma_async_memcpy_buf_to_pg(struct dma_chan *chan, struct page *page,
746 unsigned int offset, void *kdata, size_t len)
747{
748 struct dma_device *dev = chan->device;
749 struct dma_async_tx_descriptor *tx;
Dan Williams00367312008-02-02 19:49:57 -0700750 dma_addr_t dma_dest, dma_src;
Dan Williams7405f742007-01-02 11:10:43 -0700751 dma_cookie_t cookie;
752 int cpu;
753
Dan Williams00367312008-02-02 19:49:57 -0700754 dma_src = dma_map_single(dev->dev, kdata, len, DMA_TO_DEVICE);
755 dma_dest = dma_map_page(dev->dev, page, offset, len, DMA_FROM_DEVICE);
Dan Williams636bdea2008-04-17 20:17:26 -0700756 tx = dev->device_prep_dma_memcpy(chan, dma_dest, dma_src, len,
757 DMA_CTRL_ACK);
Dan Williams00367312008-02-02 19:49:57 -0700758
759 if (!tx) {
760 dma_unmap_single(dev->dev, dma_src, len, DMA_TO_DEVICE);
761 dma_unmap_page(dev->dev, dma_dest, len, DMA_FROM_DEVICE);
Dan Williams7405f742007-01-02 11:10:43 -0700762 return -ENOMEM;
Dan Williams00367312008-02-02 19:49:57 -0700763 }
Dan Williams7405f742007-01-02 11:10:43 -0700764
Dan Williams7405f742007-01-02 11:10:43 -0700765 tx->callback = NULL;
Dan Williams7405f742007-01-02 11:10:43 -0700766 cookie = tx->tx_submit(tx);
767
768 cpu = get_cpu();
769 per_cpu_ptr(chan->local, cpu)->bytes_transferred += len;
770 per_cpu_ptr(chan->local, cpu)->memcpy_count++;
771 put_cpu();
772
773 return cookie;
774}
775EXPORT_SYMBOL(dma_async_memcpy_buf_to_pg);
776
777/**
778 * dma_async_memcpy_pg_to_pg - offloaded copy from page to page
779 * @chan: DMA channel to offload copy to
780 * @dest_pg: destination page
781 * @dest_off: offset in page to copy to
782 * @src_pg: source page
783 * @src_off: offset in page to copy from
784 * @len: length
785 *
786 * Both @dest_page/@dest_off and @src_page/@src_off must be mappable to a bus
787 * address according to the DMA mapping API rules for streaming mappings.
788 * Both @dest_page/@dest_off and @src_page/@src_off must stay memory resident
789 * (kernel memory or locked user space pages).
790 */
791dma_cookie_t
792dma_async_memcpy_pg_to_pg(struct dma_chan *chan, struct page *dest_pg,
793 unsigned int dest_off, struct page *src_pg, unsigned int src_off,
794 size_t len)
795{
796 struct dma_device *dev = chan->device;
797 struct dma_async_tx_descriptor *tx;
Dan Williams00367312008-02-02 19:49:57 -0700798 dma_addr_t dma_dest, dma_src;
Dan Williams7405f742007-01-02 11:10:43 -0700799 dma_cookie_t cookie;
800 int cpu;
801
Dan Williams00367312008-02-02 19:49:57 -0700802 dma_src = dma_map_page(dev->dev, src_pg, src_off, len, DMA_TO_DEVICE);
803 dma_dest = dma_map_page(dev->dev, dest_pg, dest_off, len,
804 DMA_FROM_DEVICE);
Dan Williams636bdea2008-04-17 20:17:26 -0700805 tx = dev->device_prep_dma_memcpy(chan, dma_dest, dma_src, len,
806 DMA_CTRL_ACK);
Dan Williams00367312008-02-02 19:49:57 -0700807
808 if (!tx) {
809 dma_unmap_page(dev->dev, dma_src, len, DMA_TO_DEVICE);
810 dma_unmap_page(dev->dev, dma_dest, len, DMA_FROM_DEVICE);
Dan Williams7405f742007-01-02 11:10:43 -0700811 return -ENOMEM;
Dan Williams00367312008-02-02 19:49:57 -0700812 }
Dan Williams7405f742007-01-02 11:10:43 -0700813
Dan Williams7405f742007-01-02 11:10:43 -0700814 tx->callback = NULL;
Dan Williams7405f742007-01-02 11:10:43 -0700815 cookie = tx->tx_submit(tx);
816
817 cpu = get_cpu();
818 per_cpu_ptr(chan->local, cpu)->bytes_transferred += len;
819 per_cpu_ptr(chan->local, cpu)->memcpy_count++;
820 put_cpu();
821
822 return cookie;
823}
824EXPORT_SYMBOL(dma_async_memcpy_pg_to_pg);
825
826void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx,
827 struct dma_chan *chan)
828{
829 tx->chan = chan;
830 spin_lock_init(&tx->lock);
Dan Williams7405f742007-01-02 11:10:43 -0700831}
832EXPORT_SYMBOL(dma_async_tx_descriptor_init);
833
Dan Williams07f22112009-01-05 17:14:31 -0700834/* dma_wait_for_async_tx - spin wait for a transaction to complete
835 * @tx: in-flight transaction to wait on
836 *
837 * This routine assumes that tx was obtained from a call to async_memcpy,
838 * async_xor, async_memset, etc which ensures that tx is "in-flight" (prepped
839 * and submitted). Walking the parent chain is only meant to cover for DMA
840 * drivers that do not implement the DMA_INTERRUPT capability and may race with
841 * the driver's descriptor cleanup routine.
842 */
843enum dma_status
844dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx)
845{
846 enum dma_status status;
847 struct dma_async_tx_descriptor *iter;
848 struct dma_async_tx_descriptor *parent;
849
850 if (!tx)
851 return DMA_SUCCESS;
852
853 WARN_ONCE(tx->parent, "%s: speculatively walking dependency chain for"
854 " %s\n", __func__, dev_name(&tx->chan->dev));
855
856 /* poll through the dependency chain, return when tx is complete */
857 do {
858 iter = tx;
859
860 /* find the root of the unsubmitted dependency chain */
861 do {
862 parent = iter->parent;
863 if (!parent)
864 break;
865 else
866 iter = parent;
867 } while (parent);
868
869 /* there is a small window for ->parent == NULL and
870 * ->cookie == -EBUSY
871 */
872 while (iter->cookie == -EBUSY)
873 cpu_relax();
874
875 status = dma_sync_wait(iter->chan, iter->cookie);
876 } while (status == DMA_IN_PROGRESS || (iter != tx));
877
878 return status;
879}
880EXPORT_SYMBOL_GPL(dma_wait_for_async_tx);
881
882/* dma_run_dependencies - helper routine for dma drivers to process
883 * (start) dependent operations on their target channel
884 * @tx: transaction with dependencies
885 */
886void dma_run_dependencies(struct dma_async_tx_descriptor *tx)
887{
888 struct dma_async_tx_descriptor *dep = tx->next;
889 struct dma_async_tx_descriptor *dep_next;
890 struct dma_chan *chan;
891
892 if (!dep)
893 return;
894
895 chan = dep->chan;
896
897 /* keep submitting up until a channel switch is detected
898 * in that case we will be called again as a result of
899 * processing the interrupt from async_tx_channel_switch
900 */
901 for (; dep; dep = dep_next) {
902 spin_lock_bh(&dep->lock);
903 dep->parent = NULL;
904 dep_next = dep->next;
905 if (dep_next && dep_next->chan == chan)
906 dep->next = NULL; /* ->next will be submitted */
907 else
908 dep_next = NULL; /* submit current dep and terminate */
909 spin_unlock_bh(&dep->lock);
910
911 dep->tx_submit(dep);
912 }
913
914 chan->device->device_issue_pending(chan);
915}
916EXPORT_SYMBOL_GPL(dma_run_dependencies);
917
Chris Leechc13c8262006-05-23 17:18:44 -0700918static int __init dma_bus_init(void)
919{
920 mutex_init(&dma_list_mutex);
921 return class_register(&dma_devclass);
922}
Chris Leechc13c8262006-05-23 17:18:44 -0700923subsys_initcall(dma_bus_init);
924
Dan Williamsbec08512009-01-06 11:38:14 -0700925