blob: 3e8500ecf5988fc5d96d12ef76ca9835f0dcf806 [file] [log] [blame]
Tomas Winklera55360e2008-05-05 10:22:28 +08001/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
Emmanuel Grumbach1781a072008-06-30 17:23:09 +080030#include <linux/etherdevice.h>
Tomas Winklera55360e2008-05-05 10:22:28 +080031#include <net/mac80211.h>
32#include "iwl-eeprom.h"
33#include "iwl-dev.h"
34#include "iwl-core.h"
35#include "iwl-sta.h"
36#include "iwl-io.h"
Tomas Winklerc1354752008-05-29 16:35:04 +080037#include "iwl-calib.h"
Tomas Winklera55360e2008-05-05 10:22:28 +080038#include "iwl-helpers.h"
39/************************** RX-FUNCTIONS ****************************/
40/*
41 * Rx theory of operation
42 *
43 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
44 * each of which point to Receive Buffers to be filled by the NIC. These get
45 * used not only for Rx frames, but for any command response or notification
46 * from the NIC. The driver and NIC manage the Rx buffers by means
47 * of indexes into the circular buffer.
48 *
49 * Rx Queue Indexes
50 * The host/firmware share two index registers for managing the Rx buffers.
51 *
52 * The READ index maps to the first position that the firmware may be writing
53 * to -- the driver can read up to (but not including) this position and get
54 * good data.
55 * The READ index is managed by the firmware once the card is enabled.
56 *
57 * The WRITE index maps to the last position the driver has read from -- the
58 * position preceding WRITE is the last slot the firmware can place a packet.
59 *
60 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
61 * WRITE = READ.
62 *
63 * During initialization, the host sets up the READ queue position to the first
64 * INDEX position, and WRITE to the last (READ - 1 wrapped)
65 *
66 * When the firmware places a packet in a buffer, it will advance the READ index
67 * and fire the RX interrupt. The driver can then query the READ index and
68 * process as many packets as possible, moving the WRITE index forward as it
69 * resets the Rx queue buffers with new memory.
70 *
71 * The management in the driver is as follows:
72 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
73 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
74 * to replenish the iwl->rxq->rx_free.
75 * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
76 * iwl->rxq is replenished and the READ INDEX is updated (updating the
77 * 'processed' and 'read' driver indexes as well)
78 * + A received packet is processed and handed to the kernel network stack,
79 * detached from the iwl->rxq. The driver 'processed' index is updated.
80 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
81 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
82 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
83 * were enough free buffers and RX_STALLED is set it is cleared.
84 *
85 *
86 * Driver sequence:
87 *
88 * iwl_rx_queue_alloc() Allocates rx_free
89 * iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
90 * iwl_rx_queue_restock
91 * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
92 * queue, updates firmware pointers, and updates
93 * the WRITE index. If insufficient rx_free buffers
94 * are available, schedules iwl_rx_replenish
95 *
96 * -- enable interrupts --
97 * ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
98 * READ INDEX, detaching the SKB from the pool.
99 * Moves the packet buffer from queue to rx_used.
100 * Calls iwl_rx_queue_restock to refill any empty
101 * slots.
102 * ...
103 *
104 */
105
106/**
107 * iwl_rx_queue_space - Return number of free slots available in queue.
108 */
109int iwl_rx_queue_space(const struct iwl_rx_queue *q)
110{
111 int s = q->read - q->write;
112 if (s <= 0)
113 s += RX_QUEUE_SIZE;
114 /* keep some buffer to not confuse full and empty queue */
115 s -= 2;
116 if (s < 0)
117 s = 0;
118 return s;
119}
120EXPORT_SYMBOL(iwl_rx_queue_space);
121
122/**
123 * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
124 */
125int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
126{
127 u32 reg = 0;
128 int ret = 0;
129 unsigned long flags;
130
131 spin_lock_irqsave(&q->lock, flags);
132
133 if (q->need_update == 0)
134 goto exit_unlock;
135
136 /* If power-saving is in use, make sure device is awake */
137 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
138 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
139
140 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
141 iwl_set_bit(priv, CSR_GP_CNTRL,
142 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
143 goto exit_unlock;
144 }
145
146 ret = iwl_grab_nic_access(priv);
147 if (ret)
148 goto exit_unlock;
149
150 /* Device expects a multiple of 8 */
151 iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
152 q->write & ~0x7);
153 iwl_release_nic_access(priv);
154
155 /* Else device is assumed to be awake */
156 } else
157 /* Device expects a multiple of 8 */
158 iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
159
160
161 q->need_update = 0;
162
163 exit_unlock:
164 spin_unlock_irqrestore(&q->lock, flags);
165 return ret;
166}
167EXPORT_SYMBOL(iwl_rx_queue_update_write_ptr);
168/**
169 * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
170 */
171static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
172 dma_addr_t dma_addr)
173{
174 return cpu_to_le32((u32)(dma_addr >> 8));
175}
176
177/**
178 * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
179 *
180 * If there are slots in the RX queue that need to be restocked,
181 * and we have free pre-allocated buffers, fill the ranks as much
182 * as we can, pulling from rx_free.
183 *
184 * This moves the 'write' index forward to catch up with 'processed', and
185 * also updates the memory address in the firmware to reference the new
186 * target buffer.
187 */
188int iwl_rx_queue_restock(struct iwl_priv *priv)
189{
190 struct iwl_rx_queue *rxq = &priv->rxq;
191 struct list_head *element;
192 struct iwl_rx_mem_buffer *rxb;
193 unsigned long flags;
194 int write;
195 int ret = 0;
196
197 spin_lock_irqsave(&rxq->lock, flags);
198 write = rxq->write & ~0x7;
199 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
200 /* Get next free Rx buffer, remove from free list */
201 element = rxq->rx_free.next;
202 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
203 list_del(element);
204
205 /* Point to Rx buffer via next RBD in circular buffer */
206 rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->dma_addr);
207 rxq->queue[rxq->write] = rxb;
208 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
209 rxq->free_count--;
210 }
211 spin_unlock_irqrestore(&rxq->lock, flags);
212 /* If the pre-allocated buffer pool is dropping low, schedule to
213 * refill it */
214 if (rxq->free_count <= RX_LOW_WATERMARK)
215 queue_work(priv->workqueue, &priv->rx_replenish);
216
217
218 /* If we've added more space for the firmware to place data, tell it.
219 * Increment device's write pointer in multiples of 8. */
220 if ((write != (rxq->write & ~0x7))
221 || (abs(rxq->write - rxq->read) > 7)) {
222 spin_lock_irqsave(&rxq->lock, flags);
223 rxq->need_update = 1;
224 spin_unlock_irqrestore(&rxq->lock, flags);
225 ret = iwl_rx_queue_update_write_ptr(priv, rxq);
226 }
227
228 return ret;
229}
230EXPORT_SYMBOL(iwl_rx_queue_restock);
231
232
233/**
234 * iwl_rx_replenish - Move all used packet from rx_used to rx_free
235 *
236 * When moving to rx_free an SKB is allocated for the slot.
237 *
238 * Also restock the Rx queue via iwl_rx_queue_restock.
239 * This is called as a scheduled work item (except for during initialization)
240 */
241void iwl_rx_allocate(struct iwl_priv *priv)
242{
243 struct iwl_rx_queue *rxq = &priv->rxq;
244 struct list_head *element;
245 struct iwl_rx_mem_buffer *rxb;
246 unsigned long flags;
247 spin_lock_irqsave(&rxq->lock, flags);
248 while (!list_empty(&rxq->rx_used)) {
249 element = rxq->rx_used.next;
250 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
251
252 /* Alloc a new receive buffer */
253 rxb->skb = alloc_skb(priv->hw_params.rx_buf_size,
254 __GFP_NOWARN | GFP_ATOMIC);
255 if (!rxb->skb) {
256 if (net_ratelimit())
257 printk(KERN_CRIT DRV_NAME
258 ": Can not allocate SKB buffers\n");
259 /* We don't reschedule replenish work here -- we will
260 * call the restock method and if it still needs
261 * more buffers it will schedule replenish */
262 break;
263 }
264 priv->alloc_rxb_skb++;
265 list_del(element);
266
267 /* Get physical address of RB/SKB */
268 rxb->dma_addr =
269 pci_map_single(priv->pci_dev, rxb->skb->data,
270 priv->hw_params.rx_buf_size, PCI_DMA_FROMDEVICE);
271 list_add_tail(&rxb->list, &rxq->rx_free);
272 rxq->free_count++;
273 }
274 spin_unlock_irqrestore(&rxq->lock, flags);
275}
276EXPORT_SYMBOL(iwl_rx_allocate);
277
278void iwl_rx_replenish(struct iwl_priv *priv)
279{
280 unsigned long flags;
281
282 iwl_rx_allocate(priv);
283
284 spin_lock_irqsave(&priv->lock, flags);
285 iwl_rx_queue_restock(priv);
286 spin_unlock_irqrestore(&priv->lock, flags);
287}
288EXPORT_SYMBOL(iwl_rx_replenish);
289
290
291/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
292 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
293 * This free routine walks the list of POOL entries and if SKB is set to
294 * non NULL it is unmapped and freed
295 */
296void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
297{
298 int i;
299 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
300 if (rxq->pool[i].skb != NULL) {
301 pci_unmap_single(priv->pci_dev,
302 rxq->pool[i].dma_addr,
303 priv->hw_params.rx_buf_size,
304 PCI_DMA_FROMDEVICE);
305 dev_kfree_skb(rxq->pool[i].skb);
306 }
307 }
308
309 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
310 rxq->dma_addr);
311 rxq->bd = NULL;
312}
313EXPORT_SYMBOL(iwl_rx_queue_free);
314
315int iwl_rx_queue_alloc(struct iwl_priv *priv)
316{
317 struct iwl_rx_queue *rxq = &priv->rxq;
318 struct pci_dev *dev = priv->pci_dev;
319 int i;
320
321 spin_lock_init(&rxq->lock);
322 INIT_LIST_HEAD(&rxq->rx_free);
323 INIT_LIST_HEAD(&rxq->rx_used);
324
325 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
326 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
327 if (!rxq->bd)
328 return -ENOMEM;
329
330 /* Fill the rx_used queue with _all_ of the Rx buffers */
331 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
332 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
333
334 /* Set us so that we have processed and used all buffers, but have
335 * not restocked the Rx queue with fresh buffers */
336 rxq->read = rxq->write = 0;
337 rxq->free_count = 0;
338 rxq->need_update = 0;
339 return 0;
340}
341EXPORT_SYMBOL(iwl_rx_queue_alloc);
342
343void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
344{
345 unsigned long flags;
346 int i;
347 spin_lock_irqsave(&rxq->lock, flags);
348 INIT_LIST_HEAD(&rxq->rx_free);
349 INIT_LIST_HEAD(&rxq->rx_used);
350 /* Fill the rx_used queue with _all_ of the Rx buffers */
351 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
352 /* In the reset function, these buffers may have been allocated
353 * to an SKB, so we need to unmap and free potential storage */
354 if (rxq->pool[i].skb != NULL) {
355 pci_unmap_single(priv->pci_dev,
356 rxq->pool[i].dma_addr,
357 priv->hw_params.rx_buf_size,
358 PCI_DMA_FROMDEVICE);
359 priv->alloc_rxb_skb--;
360 dev_kfree_skb(rxq->pool[i].skb);
361 rxq->pool[i].skb = NULL;
362 }
363 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
364 }
365
366 /* Set us so that we have processed and used all buffers, but have
367 * not restocked the Rx queue with fresh buffers */
368 rxq->read = rxq->write = 0;
369 rxq->free_count = 0;
370 spin_unlock_irqrestore(&rxq->lock, flags);
371}
372EXPORT_SYMBOL(iwl_rx_queue_reset);
373
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800374int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
375{
376 int ret;
377 unsigned long flags;
378 unsigned int rb_size;
379
380 spin_lock_irqsave(&priv->lock, flags);
381 ret = iwl_grab_nic_access(priv);
382 if (ret) {
383 spin_unlock_irqrestore(&priv->lock, flags);
384 return ret;
385 }
386
387 if (priv->cfg->mod_params->amsdu_size_8K)
388 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
389 else
390 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
391
392 /* Stop Rx DMA */
393 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
394
395 /* Reset driver's Rx queue write index */
396 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
397
398 /* Tell device where to find RBD circular buffer in DRAM */
399 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
400 rxq->dma_addr >> 8);
401
402 /* Tell device where in DRAM to update its Rx status */
403 iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
Ron Rindjunskyd67f5482008-05-05 10:22:49 +0800404 (priv->shared_phys + priv->rb_closed_offset) >> 4);
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800405
406 /* Enable Rx DMA, enable host interrupt, Rx buffer size 4k, 256 RBDs */
407 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
408 FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
409 FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
410 rb_size |
411 /* 0x10 << 4 | */
412 (RX_QUEUE_SIZE_LOG <<
413 FH_RCSR_RX_CONFIG_RBDCB_SIZE_BITSHIFT));
414
415 /*
416 * iwl_write32(priv,CSR_INT_COAL_REG,0);
417 */
418
419 iwl_release_nic_access(priv);
420 spin_unlock_irqrestore(&priv->lock, flags);
421
422 return 0;
423}
424
Tomas Winklerb3bbacb2008-05-29 16:35:01 +0800425int iwl_rxq_stop(struct iwl_priv *priv)
426{
427 int ret;
428 unsigned long flags;
429
430 spin_lock_irqsave(&priv->lock, flags);
431 ret = iwl_grab_nic_access(priv);
432 if (unlikely(ret)) {
433 spin_unlock_irqrestore(&priv->lock, flags);
434 return ret;
435 }
436
437 /* stop Rx DMA */
438 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
439 ret = iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
440 (1 << 24), 1000);
441 if (ret < 0)
442 IWL_ERROR("Can't stop Rx DMA.\n");
443
444 iwl_release_nic_access(priv);
445 spin_unlock_irqrestore(&priv->lock, flags);
446
447 return 0;
448}
449EXPORT_SYMBOL(iwl_rxq_stop);
450
Tomas Winklerc1354752008-05-29 16:35:04 +0800451void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
452 struct iwl_rx_mem_buffer *rxb)
453
454{
Tomas Winklerc1354752008-05-29 16:35:04 +0800455 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
456 struct iwl4965_missed_beacon_notif *missed_beacon;
457
458 missed_beacon = &pkt->u.missed_beacon;
459 if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
460 IWL_DEBUG_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
461 le32_to_cpu(missed_beacon->consequtive_missed_beacons),
462 le32_to_cpu(missed_beacon->total_missed_becons),
463 le32_to_cpu(missed_beacon->num_recvd_beacons),
464 le32_to_cpu(missed_beacon->num_expected_beacons));
465 if (!test_bit(STATUS_SCANNING, &priv->status))
466 iwl_init_sensitivity(priv);
467 }
Tomas Winklerc1354752008-05-29 16:35:04 +0800468}
469EXPORT_SYMBOL(iwl_rx_missed_beacon_notif);
Emmanuel Grumbach8f91aec2008-06-30 17:23:07 +0800470
Ron Rindjunsky0c705152008-06-30 17:23:12 +0800471int iwl_rx_agg_start(struct iwl_priv *priv, const u8 *addr, int tid, u16 ssn)
472{
473 unsigned long flags;
474 int sta_id;
475
476 sta_id = iwl_find_station(priv, addr);
477 if (sta_id == IWL_INVALID_STATION)
478 return -ENXIO;
479
480 spin_lock_irqsave(&priv->sta_lock, flags);
481 priv->stations[sta_id].sta.station_flags_msk = 0;
482 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
483 priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
484 priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
485 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
486 spin_unlock_irqrestore(&priv->sta_lock, flags);
487
488 return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
489 CMD_ASYNC);
490}
491EXPORT_SYMBOL(iwl_rx_agg_start);
492
493int iwl_rx_agg_stop(struct iwl_priv *priv, const u8 *addr, int tid)
494{
495 unsigned long flags;
496 int sta_id;
497
498 sta_id = iwl_find_station(priv, addr);
499 if (sta_id == IWL_INVALID_STATION)
500 return -ENXIO;
501
502 spin_lock_irqsave(&priv->sta_lock, flags);
503 priv->stations[sta_id].sta.station_flags_msk = 0;
504 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
505 priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
506 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
507 spin_unlock_irqrestore(&priv->sta_lock, flags);
508
509 return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
510 CMD_ASYNC);
511}
512EXPORT_SYMBOL(iwl_rx_agg_stop);
513
Emmanuel Grumbach8f91aec2008-06-30 17:23:07 +0800514
515/* Calculate noise level, based on measurements during network silence just
516 * before arriving beacon. This measurement can be done only if we know
517 * exactly when to expect beacons, therefore only when we're associated. */
518static void iwl_rx_calc_noise(struct iwl_priv *priv)
519{
520 struct statistics_rx_non_phy *rx_info
521 = &(priv->statistics.rx.general);
522 int num_active_rx = 0;
523 int total_silence = 0;
524 int bcn_silence_a =
525 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
526 int bcn_silence_b =
527 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
528 int bcn_silence_c =
529 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
530
531 if (bcn_silence_a) {
532 total_silence += bcn_silence_a;
533 num_active_rx++;
534 }
535 if (bcn_silence_b) {
536 total_silence += bcn_silence_b;
537 num_active_rx++;
538 }
539 if (bcn_silence_c) {
540 total_silence += bcn_silence_c;
541 num_active_rx++;
542 }
543
544 /* Average among active antennas */
545 if (num_active_rx)
546 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
547 else
548 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
549
550 IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
551 bcn_silence_a, bcn_silence_b, bcn_silence_c,
552 priv->last_rx_noise);
553}
554
555#define REG_RECALIB_PERIOD (60)
556
557void iwl_rx_statistics(struct iwl_priv *priv,
558 struct iwl_rx_mem_buffer *rxb)
559{
Zhu Yi52256402008-06-30 17:23:31 +0800560 int change;
Emmanuel Grumbach8f91aec2008-06-30 17:23:07 +0800561 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
562
563 IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
564 (int)sizeof(priv->statistics), pkt->len);
565
Zhu Yi52256402008-06-30 17:23:31 +0800566 change = ((priv->statistics.general.temperature !=
567 pkt->u.stats.general.temperature) ||
568 ((priv->statistics.flag &
569 STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
570 (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
571
Emmanuel Grumbach8f91aec2008-06-30 17:23:07 +0800572 memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
573
574 set_bit(STATUS_STATISTICS, &priv->status);
575
576 /* Reschedule the statistics timer to occur in
577 * REG_RECALIB_PERIOD seconds to ensure we get a
578 * thermal update even if the uCode doesn't give
579 * us one */
580 mod_timer(&priv->statistics_periodic, jiffies +
581 msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
582
583 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
584 (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
585 iwl_rx_calc_noise(priv);
586 queue_work(priv->workqueue, &priv->run_time_calib_work);
587 }
588
589 iwl_leds_background(priv);
590
Zhu Yi52256402008-06-30 17:23:31 +0800591 if (priv->cfg->ops->lib->temperature && change)
592 priv->cfg->ops->lib->temperature(priv);
Emmanuel Grumbach8f91aec2008-06-30 17:23:07 +0800593}
594EXPORT_SYMBOL(iwl_rx_statistics);
Emmanuel Grumbach1781a072008-06-30 17:23:09 +0800595
596#define PERFECT_RSSI (-20) /* dBm */
597#define WORST_RSSI (-95) /* dBm */
598#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
599
600/* Calculate an indication of rx signal quality (a percentage, not dBm!).
601 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
602 * about formulas used below. */
603static int iwl_calc_sig_qual(int rssi_dbm, int noise_dbm)
604{
605 int sig_qual;
606 int degradation = PERFECT_RSSI - rssi_dbm;
607
608 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
609 * as indicator; formula is (signal dbm - noise dbm).
610 * SNR at or above 40 is a great signal (100%).
611 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
612 * Weakest usable signal is usually 10 - 15 dB SNR. */
613 if (noise_dbm) {
614 if (rssi_dbm - noise_dbm >= 40)
615 return 100;
616 else if (rssi_dbm < noise_dbm)
617 return 0;
618 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
619
620 /* Else use just the signal level.
621 * This formula is a least squares fit of data points collected and
622 * compared with a reference system that had a percentage (%) display
623 * for signal quality. */
624 } else
625 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
626 (15 * RSSI_RANGE + 62 * degradation)) /
627 (RSSI_RANGE * RSSI_RANGE);
628
629 if (sig_qual > 100)
630 sig_qual = 100;
631 else if (sig_qual < 1)
632 sig_qual = 0;
633
634 return sig_qual;
635}
636
637#ifdef CONFIG_IWLWIFI_DEBUG
638
639/**
640 * iwl_dbg_report_frame - dump frame to syslog during debug sessions
641 *
642 * You may hack this function to show different aspects of received frames,
643 * including selective frame dumps.
644 * group100 parameter selects whether to show 1 out of 100 good frames.
645 *
646 * TODO: This was originally written for 3945, need to audit for
647 * proper operation with 4965.
648 */
649static void iwl_dbg_report_frame(struct iwl_priv *priv,
650 struct iwl_rx_packet *pkt,
651 struct ieee80211_hdr *header, int group100)
652{
653 u32 to_us;
654 u32 print_summary = 0;
655 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
656 u32 hundred = 0;
657 u32 dataframe = 0;
658 __le16 fc;
659 u16 seq_ctl;
660 u16 channel;
661 u16 phy_flags;
662 int rate_sym;
663 u16 length;
664 u16 status;
665 u16 bcn_tmr;
666 u32 tsf_low;
667 u64 tsf;
668 u8 rssi;
669 u8 agc;
670 u16 sig_avg;
671 u16 noise_diff;
672 struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
673 struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
674 struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
675 u8 *data = IWL_RX_DATA(pkt);
676
677 if (likely(!(priv->debug_level & IWL_DL_RX)))
678 return;
679
680 /* MAC header */
681 fc = header->frame_control;
682 seq_ctl = le16_to_cpu(header->seq_ctrl);
683
684 /* metadata */
685 channel = le16_to_cpu(rx_hdr->channel);
686 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
687 rate_sym = rx_hdr->rate;
688 length = le16_to_cpu(rx_hdr->len);
689
690 /* end-of-frame status and timestamp */
691 status = le32_to_cpu(rx_end->status);
692 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
693 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
694 tsf = le64_to_cpu(rx_end->timestamp);
695
696 /* signal statistics */
697 rssi = rx_stats->rssi;
698 agc = rx_stats->agc;
699 sig_avg = le16_to_cpu(rx_stats->sig_avg);
700 noise_diff = le16_to_cpu(rx_stats->noise_diff);
701
702 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
703
704 /* if data frame is to us and all is good,
705 * (optionally) print summary for only 1 out of every 100 */
706 if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
707 cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
708 dataframe = 1;
709 if (!group100)
710 print_summary = 1; /* print each frame */
711 else if (priv->framecnt_to_us < 100) {
712 priv->framecnt_to_us++;
713 print_summary = 0;
714 } else {
715 priv->framecnt_to_us = 0;
716 print_summary = 1;
717 hundred = 1;
718 }
719 } else {
720 /* print summary for all other frames */
721 print_summary = 1;
722 }
723
724 if (print_summary) {
725 char *title;
726 int rate_idx;
727 u32 bitrate;
728
729 if (hundred)
730 title = "100Frames";
731 else if (ieee80211_has_retry(fc))
732 title = "Retry";
733 else if (ieee80211_is_assoc_resp(fc))
734 title = "AscRsp";
735 else if (ieee80211_is_reassoc_resp(fc))
736 title = "RasRsp";
737 else if (ieee80211_is_probe_resp(fc)) {
738 title = "PrbRsp";
739 print_dump = 1; /* dump frame contents */
740 } else if (ieee80211_is_beacon(fc)) {
741 title = "Beacon";
742 print_dump = 1; /* dump frame contents */
743 } else if (ieee80211_is_atim(fc))
744 title = "ATIM";
745 else if (ieee80211_is_auth(fc))
746 title = "Auth";
747 else if (ieee80211_is_deauth(fc))
748 title = "DeAuth";
749 else if (ieee80211_is_disassoc(fc))
750 title = "DisAssoc";
751 else
752 title = "Frame";
753
754 rate_idx = iwl_hwrate_to_plcp_idx(rate_sym);
755 if (unlikely(rate_idx == -1))
756 bitrate = 0;
757 else
758 bitrate = iwl_rates[rate_idx].ieee / 2;
759
760 /* print frame summary.
761 * MAC addresses show just the last byte (for brevity),
762 * but you can hack it to show more, if you'd like to. */
763 if (dataframe)
764 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
765 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
766 title, le16_to_cpu(fc), header->addr1[5],
767 length, rssi, channel, bitrate);
768 else {
769 /* src/dst addresses assume managed mode */
770 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
771 "src=0x%02x, rssi=%u, tim=%lu usec, "
772 "phy=0x%02x, chnl=%d\n",
773 title, le16_to_cpu(fc), header->addr1[5],
774 header->addr3[5], rssi,
775 tsf_low - priv->scan_start_tsf,
776 phy_flags, channel);
777 }
778 }
779 if (print_dump)
780 iwl_print_hex_dump(priv, IWL_DL_RX, data, length);
781}
782#else
783static inline void iwl_dbg_report_frame(struct iwl_priv *priv,
784 struct iwl_rx_packet *pkt,
785 struct ieee80211_hdr *header,
786 int group100)
787{
788}
789#endif
790
791static void iwl_add_radiotap(struct iwl_priv *priv,
792 struct sk_buff *skb,
793 struct iwl4965_rx_phy_res *rx_start,
794 struct ieee80211_rx_status *stats,
795 u32 ampdu_status)
796{
797 s8 signal = stats->signal;
798 s8 noise = 0;
799 int rate = stats->rate_idx;
800 u64 tsf = stats->mactime;
801 __le16 antenna;
802 __le16 phy_flags_hw = rx_start->phy_flags;
803 struct iwl4965_rt_rx_hdr {
804 struct ieee80211_radiotap_header rt_hdr;
805 __le64 rt_tsf; /* TSF */
806 u8 rt_flags; /* radiotap packet flags */
807 u8 rt_rate; /* rate in 500kb/s */
808 __le16 rt_channelMHz; /* channel in MHz */
809 __le16 rt_chbitmask; /* channel bitfield */
810 s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
811 s8 rt_dbmnoise;
812 u8 rt_antenna; /* antenna number */
813 } __attribute__ ((packed)) *iwl4965_rt;
814
815 /* TODO: We won't have enough headroom for HT frames. Fix it later. */
816 if (skb_headroom(skb) < sizeof(*iwl4965_rt)) {
817 if (net_ratelimit())
818 printk(KERN_ERR "not enough headroom [%d] for "
819 "radiotap head [%zd]\n",
820 skb_headroom(skb), sizeof(*iwl4965_rt));
821 return;
822 }
823
824 /* put radiotap header in front of 802.11 header and data */
825 iwl4965_rt = (void *)skb_push(skb, sizeof(*iwl4965_rt));
826
827 /* initialise radiotap header */
828 iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
829 iwl4965_rt->rt_hdr.it_pad = 0;
830
831 /* total header + data */
832 put_unaligned(cpu_to_le16(sizeof(*iwl4965_rt)),
833 &iwl4965_rt->rt_hdr.it_len);
834
835 /* Indicate all the fields we add to the radiotap header */
836 put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
837 (1 << IEEE80211_RADIOTAP_FLAGS) |
838 (1 << IEEE80211_RADIOTAP_RATE) |
839 (1 << IEEE80211_RADIOTAP_CHANNEL) |
840 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
841 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
842 (1 << IEEE80211_RADIOTAP_ANTENNA)),
843 &iwl4965_rt->rt_hdr.it_present);
844
845 /* Zero the flags, we'll add to them as we go */
846 iwl4965_rt->rt_flags = 0;
847
848 put_unaligned(cpu_to_le64(tsf), &iwl4965_rt->rt_tsf);
849
850 iwl4965_rt->rt_dbmsignal = signal;
851 iwl4965_rt->rt_dbmnoise = noise;
852
853 /* Convert the channel frequency and set the flags */
854 put_unaligned(cpu_to_le16(stats->freq), &iwl4965_rt->rt_channelMHz);
855 if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
856 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
857 IEEE80211_CHAN_5GHZ),
858 &iwl4965_rt->rt_chbitmask);
859 else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
860 put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
861 IEEE80211_CHAN_2GHZ),
862 &iwl4965_rt->rt_chbitmask);
863 else /* 802.11g */
864 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
865 IEEE80211_CHAN_2GHZ),
866 &iwl4965_rt->rt_chbitmask);
867
868 if (rate == -1)
869 iwl4965_rt->rt_rate = 0;
870 else
871 iwl4965_rt->rt_rate = iwl_rates[rate].ieee;
872
873 /*
874 * "antenna number"
875 *
876 * It seems that the antenna field in the phy flags value
877 * is actually a bitfield. This is undefined by radiotap,
878 * it wants an actual antenna number but I always get "7"
879 * for most legacy frames I receive indicating that the
880 * same frame was received on all three RX chains.
881 *
882 * I think this field should be removed in favour of a
883 * new 802.11n radiotap field "RX chains" that is defined
884 * as a bitmask.
885 */
886 antenna = phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK;
887 iwl4965_rt->rt_antenna = le16_to_cpu(antenna) >> 4;
888
889 /* set the preamble flag if appropriate */
890 if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
891 iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
892
893 stats->flag |= RX_FLAG_RADIOTAP;
894}
895
896static void iwl_update_rx_stats(struct iwl_priv *priv, u16 fc, u16 len)
897{
898 /* 0 - mgmt, 1 - cnt, 2 - data */
899 int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
900 priv->rx_stats[idx].cnt++;
901 priv->rx_stats[idx].bytes += len;
902}
903
904/*
905 * returns non-zero if packet should be dropped
906 */
907static int iwl_set_decrypted_flag(struct iwl_priv *priv,
908 struct ieee80211_hdr *hdr,
909 u32 decrypt_res,
910 struct ieee80211_rx_status *stats)
911{
912 u16 fc = le16_to_cpu(hdr->frame_control);
913
914 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
915 return 0;
916
917 if (!(fc & IEEE80211_FCTL_PROTECTED))
918 return 0;
919
920 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
921 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
922 case RX_RES_STATUS_SEC_TYPE_TKIP:
923 /* The uCode has got a bad phase 1 Key, pushes the packet.
924 * Decryption will be done in SW. */
925 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
926 RX_RES_STATUS_BAD_KEY_TTAK)
927 break;
928
929 case RX_RES_STATUS_SEC_TYPE_WEP:
930 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
931 RX_RES_STATUS_BAD_ICV_MIC) {
932 /* bad ICV, the packet is destroyed since the
933 * decryption is inplace, drop it */
934 IWL_DEBUG_RX("Packet destroyed\n");
935 return -1;
936 }
937 case RX_RES_STATUS_SEC_TYPE_CCMP:
938 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
939 RX_RES_STATUS_DECRYPT_OK) {
940 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
941 stats->flag |= RX_FLAG_DECRYPTED;
942 }
943 break;
944
945 default:
946 break;
947 }
948 return 0;
949}
950
951static u32 iwl_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
952{
953 u32 decrypt_out = 0;
954
955 if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
956 RX_RES_STATUS_STATION_FOUND)
957 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
958 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
959
960 decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
961
962 /* packet was not encrypted */
963 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
964 RX_RES_STATUS_SEC_TYPE_NONE)
965 return decrypt_out;
966
967 /* packet was encrypted with unknown alg */
968 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
969 RX_RES_STATUS_SEC_TYPE_ERR)
970 return decrypt_out;
971
972 /* decryption was not done in HW */
973 if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
974 RX_MPDU_RES_STATUS_DEC_DONE_MSK)
975 return decrypt_out;
976
977 switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
978
979 case RX_RES_STATUS_SEC_TYPE_CCMP:
980 /* alg is CCM: check MIC only */
981 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
982 /* Bad MIC */
983 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
984 else
985 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
986
987 break;
988
989 case RX_RES_STATUS_SEC_TYPE_TKIP:
990 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
991 /* Bad TTAK */
992 decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
993 break;
994 }
995 /* fall through if TTAK OK */
996 default:
997 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
998 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
999 else
1000 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
1001 break;
1002 };
1003
1004 IWL_DEBUG_RX("decrypt_in:0x%x decrypt_out = 0x%x\n",
1005 decrypt_in, decrypt_out);
1006
1007 return decrypt_out;
1008}
1009
Emmanuel Grumbach4b8817b2008-06-30 17:23:10 +08001010static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv,
Emmanuel Grumbach1781a072008-06-30 17:23:09 +08001011 int include_phy,
1012 struct iwl_rx_mem_buffer *rxb,
1013 struct ieee80211_rx_status *stats)
1014{
1015 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1016 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
1017 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
1018 struct ieee80211_hdr *hdr;
1019 u16 len;
1020 __le32 *rx_end;
1021 unsigned int skblen;
1022 u32 ampdu_status;
1023 u32 ampdu_status_legacy;
1024
1025 if (!include_phy && priv->last_phy_res[0])
1026 rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
1027
1028 if (!rx_start) {
1029 IWL_ERROR("MPDU frame without a PHY data\n");
1030 return;
1031 }
1032 if (include_phy) {
1033 hdr = (struct ieee80211_hdr *)((u8 *) &rx_start[1] +
1034 rx_start->cfg_phy_cnt);
1035
1036 len = le16_to_cpu(rx_start->byte_count);
1037
1038 rx_end = (__le32 *) ((u8 *) &pkt->u.raw[0] +
1039 sizeof(struct iwl4965_rx_phy_res) +
1040 rx_start->cfg_phy_cnt + len);
1041
1042 } else {
1043 struct iwl4965_rx_mpdu_res_start *amsdu =
1044 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
1045
1046 hdr = (struct ieee80211_hdr *)(pkt->u.raw +
1047 sizeof(struct iwl4965_rx_mpdu_res_start));
1048 len = le16_to_cpu(amsdu->byte_count);
1049 rx_start->byte_count = amsdu->byte_count;
1050 rx_end = (__le32 *) (((u8 *) hdr) + len);
1051 }
Emmanuel Grumbach1781a072008-06-30 17:23:09 +08001052
1053 ampdu_status = le32_to_cpu(*rx_end);
1054 skblen = ((u8 *) rx_end - (u8 *) &pkt->u.raw[0]) + sizeof(u32);
1055
1056 if (!include_phy) {
1057 /* New status scheme, need to translate */
1058 ampdu_status_legacy = ampdu_status;
1059 ampdu_status = iwl_translate_rx_status(priv, ampdu_status);
1060 }
1061
1062 /* start from MAC */
1063 skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
1064 skb_put(rxb->skb, len); /* end where data ends */
1065
1066 /* We only process data packets if the interface is open */
1067 if (unlikely(!priv->is_open)) {
1068 IWL_DEBUG_DROP_LIMIT
1069 ("Dropping packet while interface is not open.\n");
1070 return;
1071 }
1072
Emmanuel Grumbach1781a072008-06-30 17:23:09 +08001073 hdr = (struct ieee80211_hdr *)rxb->skb->data;
1074
1075 /* in case of HW accelerated crypto and bad decryption, drop */
1076 if (!priv->hw_params.sw_crypto &&
1077 iwl_set_decrypted_flag(priv, hdr, ampdu_status, stats))
1078 return;
1079
1080 if (priv->add_radiotap)
1081 iwl_add_radiotap(priv, rxb->skb, rx_start, stats, ampdu_status);
1082
1083 iwl_update_rx_stats(priv, le16_to_cpu(hdr->frame_control), len);
1084 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
1085 priv->alloc_rxb_skb--;
1086 rxb->skb = NULL;
1087}
1088
1089/* Calc max signal level (dBm) among 3 possible receivers */
1090static int iwl_calc_rssi(struct iwl_priv *priv,
1091 struct iwl4965_rx_phy_res *rx_resp)
1092{
1093 /* data from PHY/DSP regarding signal strength, etc.,
1094 * contents are always there, not configurable by host. */
1095 struct iwl4965_rx_non_cfg_phy *ncphy =
1096 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy;
1097 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK)
1098 >> IWL_AGC_DB_POS;
1099
1100 u32 valid_antennae =
1101 (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK)
1102 >> RX_PHY_FLAGS_ANTENNAE_OFFSET;
1103 u8 max_rssi = 0;
1104 u32 i;
1105
1106 /* Find max rssi among 3 possible receivers.
1107 * These values are measured by the digital signal processor (DSP).
1108 * They should stay fairly constant even as the signal strength varies,
1109 * if the radio's automatic gain control (AGC) is working right.
1110 * AGC value (see below) will provide the "interesting" info. */
1111 for (i = 0; i < 3; i++)
1112 if (valid_antennae & (1 << i))
1113 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
1114
1115 IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
1116 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
1117 max_rssi, agc);
1118
1119 /* dBm = max_rssi dB - agc dB - constant.
1120 * Higher AGC (higher radio gain) means lower signal. */
1121 return max_rssi - agc - IWL_RSSI_OFFSET;
1122}
1123
1124static void iwl_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id)
1125{
1126 unsigned long flags;
1127
1128 spin_lock_irqsave(&priv->sta_lock, flags);
1129 priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
1130 priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
1131 priv->stations[sta_id].sta.sta.modify_mask = 0;
1132 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1133 spin_unlock_irqrestore(&priv->sta_lock, flags);
1134
1135 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
1136}
1137
1138static void iwl_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr)
1139{
1140 /* FIXME: need locking over ps_status ??? */
1141 u8 sta_id = iwl_find_station(priv, addr);
1142
1143 if (sta_id != IWL_INVALID_STATION) {
1144 u8 sta_awake = priv->stations[sta_id].
1145 ps_status == STA_PS_STATUS_WAKE;
1146
1147 if (sta_awake && ps_bit)
1148 priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
1149 else if (!sta_awake && !ps_bit) {
1150 iwl_sta_modify_ps_wake(priv, sta_id);
1151 priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
1152 }
1153 }
1154}
1155
Emmanuel Grumbach4b8817b2008-06-30 17:23:10 +08001156/* This is necessary only for a number of statistics, see the caller. */
Emmanuel Grumbach1781a072008-06-30 17:23:09 +08001157static int iwl_is_network_packet(struct iwl_priv *priv,
1158 struct ieee80211_hdr *header)
1159{
1160 /* Filter incoming packets to determine if they are targeted toward
1161 * this network, discarding packets coming from ourselves */
1162 switch (priv->iw_mode) {
1163 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
Emmanuel Grumbach4b8817b2008-06-30 17:23:10 +08001164 /* packets to our IBSS update information */
1165 return !compare_ether_addr(header->addr3, priv->bssid);
Emmanuel Grumbach1781a072008-06-30 17:23:09 +08001166 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
Emmanuel Grumbach4b8817b2008-06-30 17:23:10 +08001167 /* packets to our IBSS update information */
1168 return !compare_ether_addr(header->addr2, priv->bssid);
Emmanuel Grumbach1781a072008-06-30 17:23:09 +08001169 default:
Emmanuel Grumbach4b8817b2008-06-30 17:23:10 +08001170 return 1;
Emmanuel Grumbach1781a072008-06-30 17:23:09 +08001171 }
Emmanuel Grumbach1781a072008-06-30 17:23:09 +08001172}
1173
1174/* Called for REPLY_RX (legacy ABG frames), or
1175 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
1176void iwl_rx_reply_rx(struct iwl_priv *priv,
1177 struct iwl_rx_mem_buffer *rxb)
1178{
1179 struct ieee80211_hdr *header;
1180 struct ieee80211_rx_status rx_status;
1181 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1182 /* Use phy data (Rx signal strength, etc.) contained within
1183 * this rx packet for legacy frames,
1184 * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
1185 int include_phy = (pkt->hdr.cmd == REPLY_RX);
1186 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
1187 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) :
1188 (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
1189 __le32 *rx_end;
1190 unsigned int len = 0;
1191 u16 fc;
1192 u8 network_packet;
1193
1194 rx_status.mactime = le64_to_cpu(rx_start->timestamp);
1195 rx_status.freq =
1196 ieee80211_channel_to_frequency(le16_to_cpu(rx_start->channel));
1197 rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
1198 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
1199 rx_status.rate_idx =
1200 iwl_hwrate_to_plcp_idx(le32_to_cpu(rx_start->rate_n_flags));
1201 if (rx_status.band == IEEE80211_BAND_5GHZ)
1202 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
1203
1204 rx_status.antenna = 0;
1205 rx_status.flag = 0;
Assaf Krauss2ff75b72008-06-30 17:23:17 +08001206 rx_status.flag |= RX_FLAG_TSFT;
Emmanuel Grumbach1781a072008-06-30 17:23:09 +08001207
1208 if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
1209 IWL_DEBUG_DROP("dsp size out of range [0,20]: %d/n",
1210 rx_start->cfg_phy_cnt);
1211 return;
1212 }
1213
1214 if (!include_phy) {
1215 if (priv->last_phy_res[0])
1216 rx_start = (struct iwl4965_rx_phy_res *)
1217 &priv->last_phy_res[1];
1218 else
1219 rx_start = NULL;
1220 }
1221
1222 if (!rx_start) {
1223 IWL_ERROR("MPDU frame without a PHY data\n");
1224 return;
1225 }
1226
1227 if (include_phy) {
1228 header = (struct ieee80211_hdr *)((u8 *) &rx_start[1]
1229 + rx_start->cfg_phy_cnt);
1230
1231 len = le16_to_cpu(rx_start->byte_count);
1232 rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt +
1233 sizeof(struct iwl4965_rx_phy_res) + len);
1234 } else {
1235 struct iwl4965_rx_mpdu_res_start *amsdu =
1236 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
1237
1238 header = (void *)(pkt->u.raw +
1239 sizeof(struct iwl4965_rx_mpdu_res_start));
1240 len = le16_to_cpu(amsdu->byte_count);
1241 rx_end = (__le32 *) (pkt->u.raw +
1242 sizeof(struct iwl4965_rx_mpdu_res_start) + len);
1243 }
1244
1245 if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
1246 !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
1247 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
1248 le32_to_cpu(*rx_end));
1249 return;
1250 }
1251
1252 priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
1253
1254 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
1255 rx_status.signal = iwl_calc_rssi(priv, rx_start);
1256
1257 /* Meaningful noise values are available only from beacon statistics,
1258 * which are gathered only when associated, and indicate noise
1259 * only for the associated network channel ...
1260 * Ignore these noise values while scanning (other channels) */
1261 if (iwl_is_associated(priv) &&
1262 !test_bit(STATUS_SCANNING, &priv->status)) {
1263 rx_status.noise = priv->last_rx_noise;
1264 rx_status.qual = iwl_calc_sig_qual(rx_status.signal,
1265 rx_status.noise);
1266 } else {
1267 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1268 rx_status.qual = iwl_calc_sig_qual(rx_status.signal, 0);
1269 }
1270
1271 /* Reset beacon noise level if not associated. */
1272 if (!iwl_is_associated(priv))
1273 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1274
1275 /* Set "1" to report good data frames in groups of 100 */
1276 /* FIXME: need to optimze the call: */
1277 iwl_dbg_report_frame(priv, pkt, header, 1);
1278
1279 IWL_DEBUG_STATS_LIMIT("Rssi %d, noise %d, qual %d, TSF %llu\n",
1280 rx_status.signal, rx_status.noise, rx_status.signal,
1281 (unsigned long long)rx_status.mactime);
1282
Emmanuel Grumbach4b8817b2008-06-30 17:23:10 +08001283 /* Take shortcut when only in monitor mode */
Emmanuel Grumbach1781a072008-06-30 17:23:09 +08001284 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
Emmanuel Grumbach4b8817b2008-06-30 17:23:10 +08001285 iwl_pass_packet_to_mac80211(priv, include_phy,
Emmanuel Grumbach1781a072008-06-30 17:23:09 +08001286 rxb, &rx_status);
1287 return;
1288 }
1289
1290 network_packet = iwl_is_network_packet(priv, header);
1291 if (network_packet) {
1292 priv->last_rx_rssi = rx_status.signal;
1293 priv->last_beacon_time = priv->ucode_beacon_time;
1294 priv->last_tsf = le64_to_cpu(rx_start->timestamp);
1295 }
1296
1297 fc = le16_to_cpu(header->frame_control);
1298 switch (fc & IEEE80211_FCTL_FTYPE) {
1299 case IEEE80211_FTYPE_MGMT:
Emmanuel Grumbach4b8817b2008-06-30 17:23:10 +08001300 case IEEE80211_FTYPE_DATA:
Emmanuel Grumbach1781a072008-06-30 17:23:09 +08001301 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
1302 iwl_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
1303 header->addr2);
Emmanuel Grumbach4b8817b2008-06-30 17:23:10 +08001304 /* fall through */
Emmanuel Grumbach1781a072008-06-30 17:23:09 +08001305 default:
Emmanuel Grumbach4b8817b2008-06-30 17:23:10 +08001306 iwl_pass_packet_to_mac80211(priv, include_phy, rxb,
1307 &rx_status);
Emmanuel Grumbach1781a072008-06-30 17:23:09 +08001308 break;
1309
1310 }
1311}
1312EXPORT_SYMBOL(iwl_rx_reply_rx);
1313
1314/* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
1315 * This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
1316void iwl_rx_reply_rx_phy(struct iwl_priv *priv,
1317 struct iwl_rx_mem_buffer *rxb)
1318{
1319 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1320 priv->last_phy_res[0] = 1;
1321 memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
1322 sizeof(struct iwl4965_rx_phy_res));
1323}
1324EXPORT_SYMBOL(iwl_rx_reply_rx_phy);