| Philipp Zabel | 5380a9a | 2015-09-30 13:55:17 +0100 | [diff] [blame] | 1 | Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings |
| 2 | |
| 3 | This binding represents the on-chip eFuse OTP controller found on |
| 4 | i.MX6Q/D, i.MX6DL/S, i.MX6SL, and i.MX6SX SoCs. |
| 5 | |
| 6 | Required properties: |
| 7 | - compatible: should be one of |
| 8 | "fsl,imx6q-ocotp" (i.MX6Q/D/DL/S), |
| 9 | "fsl,imx6sl-ocotp" (i.MX6SL), or |
| 10 | "fsl,imx6sx-ocotp" (i.MX6SX), followed by "syscon". |
| 11 | - reg: Should contain the register base and length. |
| 12 | - clocks: Should contain a phandle pointing to the gated peripheral clock. |
| 13 | |
| 14 | Example: |
| 15 | |
| 16 | ocotp: ocotp@021bc000 { |
| 17 | compatible = "fsl,imx6q-ocotp", "syscon"; |
| 18 | reg = <0x021bc000 0x4000>; |
| 19 | clocks = <&clks IMX6QDL_CLK_IIM>; |
| 20 | }; |