blob: 15ee38f7ad3f5525d044e496d93e460c8201082c [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 * Copyright (c) 1997-1998 Mark Lord
Sergei Shtylyov93c0b562008-01-10 23:03:42 +01003 * Copyright (c) 2007 MontaVista Software, Inc. <source@mvista.com>
Bartlomiej Zolnierkiewicz58f189f2008-02-01 23:09:33 +01004 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07005 * May be copied or modified under the terms of the GNU General Public License
6 *
7 * June 22, 2004 - get rid of check_region
Jesper Juhl59904152005-07-27 11:46:10 -07008 * - Jesper Juhl
Linus Torvalds1da177e2005-04-16 15:20:36 -07009 *
10 */
11
12/*
13 * This module provides support for the bus-master IDE DMA function
14 * of the Tekram TRM290 chip, used on a variety of PCI IDE add-on boards,
15 * including a "Precision Instruments" board. The TRM290 pre-dates
16 * the sff-8038 standard (ide-dma.c) by a few months, and differs
17 * significantly enough to warrant separate routines for some functions,
18 * while re-using others from ide-dma.c.
19 *
20 * EXPERIMENTAL! It works for me (a sample of one).
21 *
22 * Works reliably for me in DMA mode (READs only),
23 * DMA WRITEs are disabled by default (see #define below);
24 *
25 * DMA is not enabled automatically for this chipset,
26 * but can be turned on manually (with "hdparm -d1") at run time.
27 *
28 * I need volunteers with "spare" drives for further testing
29 * and development, and maybe to help figure out the peculiarities.
30 * Even knowing the registers (below), some things behave strangely.
31 */
32
33#define TRM290_NO_DMA_WRITES /* DMA writes seem unreliable sometimes */
34
35/*
36 * TRM-290 PCI-IDE2 Bus Master Chip
37 * ================================
38 * The configuration registers are addressed in normal I/O port space
39 * and are used as follows:
40 *
41 * trm290_base depends on jumper settings, and is probed for by ide-dma.c
42 *
43 * trm290_base+2 when WRITTEN: chiptest register (byte, write-only)
44 * bit7 must always be written as "1"
45 * bits6-2 undefined
46 * bit1 1=legacy_compatible_mode, 0=native_pci_mode
47 * bit0 1=test_mode, 0=normal(default)
48 *
49 * trm290_base+2 when READ: status register (byte, read-only)
50 * bits7-2 undefined
51 * bit1 channel0 busmaster interrupt status 0=none, 1=asserted
52 * bit0 channel0 interrupt status 0=none, 1=asserted
53 *
54 * trm290_base+3 Interrupt mask register
55 * bits7-5 undefined
56 * bit4 legacy_header: 1=present, 0=absent
57 * bit3 channel1 busmaster interrupt status 0=none, 1=asserted (read only)
58 * bit2 channel1 interrupt status 0=none, 1=asserted (read only)
59 * bit1 channel1 interrupt mask: 1=masked, 0=unmasked(default)
60 * bit0 channel0 interrupt mask: 1=masked, 0=unmasked(default)
61 *
62 * trm290_base+1 "CPR" Config Pointer Register (byte)
63 * bit7 1=autoincrement CPR bits 2-0 after each access of CDR
64 * bit6 1=min. 1 wait-state posted write cycle (default), 0=0 wait-state
65 * bit5 0=enabled master burst access (default), 1=disable (write only)
66 * bit4 PCI DEVSEL# timing select: 1=medium(default), 0=fast
67 * bit3 0=primary IDE channel, 1=secondary IDE channel
68 * bits2-0 register index for accesses through CDR port
69 *
70 * trm290_base+0 "CDR" Config Data Register (word)
71 * two sets of seven config registers,
72 * selected by CPR bit 3 (channel) and CPR bits 2-0 (index 0 to 6),
73 * each index defined below:
74 *
75 * Index-0 Base address register for command block (word)
76 * defaults: 0x1f0 for primary, 0x170 for secondary
77 *
78 * Index-1 general config register (byte)
79 * bit7 1=DMA enable, 0=DMA disable
80 * bit6 1=activate IDE_RESET, 0=no action (default)
81 * bit5 1=enable IORDY, 0=disable IORDY (default)
82 * bit4 0=16-bit data port(default), 1=8-bit (XT) data port
83 * bit3 interrupt polarity: 1=active_low, 0=active_high(default)
84 * bit2 power-saving-mode(?): 1=enable, 0=disable(default) (write only)
85 * bit1 bus_master_mode(?): 1=enable, 0=disable(default)
86 * bit0 enable_io_ports: 1=enable(default), 0=disable
87 *
88 * Index-2 read-ahead counter preload bits 0-7 (byte, write only)
89 * bits7-0 bits7-0 of readahead count
90 *
91 * Index-3 read-ahead config register (byte, write only)
92 * bit7 1=enable_readahead, 0=disable_readahead(default)
93 * bit6 1=clear_FIFO, 0=no_action
94 * bit5 undefined
95 * bit4 mode4 timing control: 1=enable, 0=disable(default)
96 * bit3 undefined
97 * bit2 undefined
98 * bits1-0 bits9-8 of read-ahead count
99 *
100 * Index-4 base address register for control block (word)
101 * defaults: 0x3f6 for primary, 0x376 for secondary
102 *
103 * Index-5 data port timings (shared by both drives) (byte)
104 * standard PCI "clk" (clock) counts, default value = 0xf5
105 *
106 * bits7-6 setup time: 00=1clk, 01=2clk, 10=3clk, 11=4clk
107 * bits5-3 hold time: 000=1clk, 001=2clk, 010=3clk,
108 * 011=4clk, 100=5clk, 101=6clk,
109 * 110=8clk, 111=12clk
110 * bits2-0 active time: 000=2clk, 001=3clk, 010=4clk,
111 * 011=5clk, 100=6clk, 101=8clk,
112 * 110=12clk, 111=16clk
113 *
114 * Index-6 command/control port timings (shared by both drives) (byte)
115 * same layout as Index-5, default value = 0xde
116 *
117 * Suggested CDR programming for PIO mode0 (600ns):
118 * 0x01f0,0x21,0xff,0x80,0x03f6,0xf5,0xde ; primary
119 * 0x0170,0x21,0xff,0x80,0x0376,0xf5,0xde ; secondary
120 *
121 * Suggested CDR programming for PIO mode3 (180ns):
122 * 0x01f0,0x21,0xff,0x80,0x03f6,0x09,0xde ; primary
123 * 0x0170,0x21,0xff,0x80,0x0376,0x09,0xde ; secondary
124 *
125 * Suggested CDR programming for PIO mode4 (120ns):
126 * 0x01f0,0x21,0xff,0x80,0x03f6,0x00,0xde ; primary
127 * 0x0170,0x21,0xff,0x80,0x0376,0x00,0xde ; secondary
128 *
129 */
130
Linus Torvalds1da177e2005-04-16 15:20:36 -0700131#include <linux/types.h>
132#include <linux/module.h>
133#include <linux/kernel.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134#include <linux/ioport.h>
135#include <linux/interrupt.h>
136#include <linux/blkdev.h>
137#include <linux/init.h>
138#include <linux/hdreg.h>
139#include <linux/pci.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -0700140#include <linux/ide.h>
141
142#include <asm/io.h>
143
144static void trm290_prepare_drive (ide_drive_t *drive, unsigned int use_dma)
145{
146 ide_hwif_t *hwif = HWIF(drive);
147 u16 reg = 0;
148 unsigned long flags;
149
150 /* select PIO or DMA */
151 reg = use_dma ? (0x21 | 0x82) : (0x21 & ~0x82);
152
153 local_irq_save(flags);
154
155 if (reg != hwif->select_data) {
156 hwif->select_data = reg;
157 /* set PIO/DMA */
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100158 outb(0x51 | (hwif->channel << 3), hwif->config_data + 1);
159 outw(reg & 0xff, hwif->config_data);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160 }
161
162 /* enable IRQ if not probing */
163 if (drive->present) {
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100164 reg = inw(hwif->config_data + 3);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700165 reg &= 0x13;
166 reg &= ~(1 << hwif->channel);
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100167 outw(reg, hwif->config_data + 3);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700168 }
169
170 local_irq_restore(flags);
171}
172
173static void trm290_selectproc (ide_drive_t *drive)
174{
175 trm290_prepare_drive(drive, drive->using_dma);
176}
177
Sergei Shtylyov93c0b562008-01-10 23:03:42 +0100178static void trm290_dma_exec_cmd(ide_drive_t *drive, u8 command)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179{
Bartlomiej Zolnierkiewiczc78d7172008-02-02 19:56:44 +0100180 ide_execute_command(drive, command, &ide_dma_intr, WAIT_CMD, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700181}
182
Sergei Shtylyov93c0b562008-01-10 23:03:42 +0100183static int trm290_dma_setup(ide_drive_t *drive)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700184{
185 ide_hwif_t *hwif = drive->hwif;
186 struct request *rq = hwif->hwgroup->rq;
187 unsigned int count, rw;
188
189 if (rq_data_dir(rq)) {
190#ifdef TRM290_NO_DMA_WRITES
191 /* always use PIO for writes */
192 trm290_prepare_drive(drive, 0); /* select PIO xfer */
193 return 1;
194#endif
195 rw = 1;
196 } else
197 rw = 2;
198
199 if (!(count = ide_build_dmatable(drive, rq))) {
200 /* try PIO instead of DMA */
201 trm290_prepare_drive(drive, 0); /* select PIO xfer */
202 return 1;
203 }
204 /* select DMA xfer */
205 trm290_prepare_drive(drive, 1);
Sergei Shtylyov4e5a68a2008-02-01 23:09:29 +0100206 outl(hwif->dmatable_dma | rw, hwif->dma_base);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700207 drive->waiting_for_dma = 1;
208 /* start DMA */
Sergei Shtylyov4e5a68a2008-02-01 23:09:29 +0100209 outw(count * 2 - 1, hwif->dma_base + 2);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700210 return 0;
211}
212
Sergei Shtylyov93c0b562008-01-10 23:03:42 +0100213static void trm290_dma_start(ide_drive_t *drive)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700214{
215}
216
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +0200217static int trm290_dma_end(ide_drive_t *drive)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218{
Sergei Shtylyov4e5a68a2008-02-01 23:09:29 +0100219 u16 status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700220
221 drive->waiting_for_dma = 0;
222 /* purge DMA mappings */
223 ide_destroy_dmatable(drive);
Sergei Shtylyov4e5a68a2008-02-01 23:09:29 +0100224 status = inw(HWIF(drive)->dma_base + 2);
225 return status != 0x00ff;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700226}
227
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +0200228static int trm290_dma_test_irq(ide_drive_t *drive)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700229{
Sergei Shtylyov4e5a68a2008-02-01 23:09:29 +0100230 u16 status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700231
Sergei Shtylyov4e5a68a2008-02-01 23:09:29 +0100232 status = inw(HWIF(drive)->dma_base + 2);
233 return status == 0x00ff;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700234}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700235
Bartlomiej Zolnierkiewicz15ce9262008-01-26 20:13:03 +0100236static void trm290_dma_host_set(ide_drive_t *drive, int on)
Sergei Shtylyov93c0b562008-01-10 23:03:42 +0100237{
238}
239
Linus Torvalds1da177e2005-04-16 15:20:36 -0700240static void __devinit init_hwif_trm290(ide_hwif_t *hwif)
241{
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +0100242 struct pci_dev *dev = to_pci_dev(hwif->dev);
Sergei Shtylyov4e5a68a2008-02-01 23:09:29 +0100243 unsigned int cfg_base = pci_resource_start(dev, 4);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700244 unsigned long flags;
245 u8 reg = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700246
Sergei Shtylyov4e5a68a2008-02-01 23:09:29 +0100247 if ((dev->class & 5) && cfg_base)
248 printk(KERN_INFO "TRM290: chip");
249 else {
250 cfg_base = 0x3df0;
251 printk(KERN_INFO "TRM290: using default");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700252 }
Sergei Shtylyov4e5a68a2008-02-01 23:09:29 +0100253 printk(KERN_CONT " config base at 0x%04x\n", cfg_base);
254 hwif->config_data = cfg_base;
255 hwif->dma_base = (cfg_base + 4) ^ (hwif->channel ? 0x80 : 0);
256
Bartlomiej Zolnierkiewiczb8e73fb2008-04-26 22:25:21 +0200257 printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n",
Sergei Shtylyov4e5a68a2008-02-01 23:09:29 +0100258 hwif->name, hwif->dma_base, hwif->dma_base + 3);
259
Bartlomiej Zolnierkiewiczb8e73fb2008-04-26 22:25:21 +0200260 if (ide_allocate_dma_engine(hwif))
Sergei Shtylyov4e5a68a2008-02-01 23:09:29 +0100261 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700262
263 local_irq_save(flags);
264 /* put config reg into first byte of hwif->select_data */
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100265 outb(0x51 | (hwif->channel << 3), hwif->config_data + 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700266 /* select PIO as default */
267 hwif->select_data = 0x21;
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100268 outb(hwif->select_data, hwif->config_data);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700269 /* get IRQ info */
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100270 reg = inb(hwif->config_data + 3);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700271 /* mask IRQs for both ports */
272 reg = (reg & 0x10) | 0x03;
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100273 outb(reg, hwif->config_data + 3);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700274 local_irq_restore(flags);
275
Sergei Shtylyov4e5a68a2008-02-01 23:09:29 +0100276 if (reg & 0x10)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700277 /* legacy mode */
278 hwif->irq = hwif->channel ? 15 : 14;
279 else if (!hwif->irq && hwif->mate && hwif->mate->irq)
280 /* sharing IRQ with mate */
281 hwif->irq = hwif->mate->irq;
282
Linus Torvalds1da177e2005-04-16 15:20:36 -0700283#if 1
284 {
285 /*
286 * My trm290-based card doesn't seem to work with all possible values
287 * for the control basereg, so this kludge ensures that we use only
288 * values that are known to work. Ugh. -ml
289 */
290 u16 new, old, compat = hwif->channel ? 0x374 : 0x3f4;
291 static u16 next_offset = 0;
292 u8 old_mask;
293
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100294 outb(0x54 | (hwif->channel << 3), hwif->config_data + 1);
295 old = inw(hwif->config_data);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700296 old &= ~1;
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100297 old_mask = inb(old + 2);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700298 if (old != compat && old_mask == 0xff) {
299 /* leave lower 10 bits untouched */
300 compat += (next_offset += 0x400);
301 hwif->io_ports[IDE_CONTROL_OFFSET] = compat + 2;
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100302 outw(compat | 1, hwif->config_data);
303 new = inw(hwif->config_data);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700304 printk(KERN_INFO "%s: control basereg workaround: "
305 "old=0x%04x, new=0x%04x\n",
306 hwif->name, old, new & ~1);
307 }
308 }
309#endif
310}
311
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200312static const struct ide_port_ops trm290_port_ops = {
313 .selectproc = trm290_selectproc,
314};
315
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +0200316static struct ide_dma_ops trm290_dma_ops = {
317 .dma_host_set = trm290_dma_host_set,
318 .dma_setup = trm290_dma_setup,
319 .dma_exec_cmd = trm290_dma_exec_cmd,
320 .dma_start = trm290_dma_start,
321 .dma_end = trm290_dma_end,
322 .dma_test_irq = trm290_dma_test_irq,
Bartlomiej Zolnierkiewiczf37afda2008-04-26 22:25:24 +0200323 .dma_lost_irq = ide_dma_lost_irq,
324 .dma_timeout = ide_dma_timeout,
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +0200325};
326
Bartlomiej Zolnierkiewicz85620432007-10-20 00:32:34 +0200327static const struct ide_port_info trm290_chipset __devinitdata = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700328 .name = "TRM290",
329 .init_hwif = init_hwif_trm290,
Bartlomiej Zolnierkiewicz528a5722007-10-20 00:32:30 +0200330 .chipset = ide_trm290,
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200331 .port_ops = &trm290_port_ops,
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +0200332 .dma_ops = &trm290_dma_ops,
Bartlomiej Zolnierkiewicz7cab14a2007-10-19 00:30:06 +0200333 .host_flags = IDE_HFLAG_NO_ATAPI_DMA |
Bartlomiej Zolnierkiewicz9ff6f722007-10-16 22:29:58 +0200334#if 0 /* play it safe for now */
Bartlomiej Zolnierkiewicz7cab14a2007-10-19 00:30:06 +0200335 IDE_HFLAG_TRUST_BIOS_FOR_DMA |
Bartlomiej Zolnierkiewicz9ff6f722007-10-16 22:29:58 +0200336#endif
Bartlomiej Zolnierkiewicz47b68782007-10-19 00:30:06 +0200337 IDE_HFLAG_NO_AUTODMA |
Bartlomiej Zolnierkiewicz238e4f12007-10-19 00:30:07 +0200338 IDE_HFLAG_NO_LBA48,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700339};
340
341static int __devinit trm290_init_one(struct pci_dev *dev, const struct pci_device_id *id)
342{
343 return ide_setup_pci_device(dev, &trm290_chipset);
344}
345
Bartlomiej Zolnierkiewicz9cbcc5e2007-10-16 22:29:56 +0200346static const struct pci_device_id trm290_pci_tbl[] = {
347 { PCI_VDEVICE(TEKRAM, PCI_DEVICE_ID_TEKRAM_DC290), 0 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700348 { 0, },
349};
350MODULE_DEVICE_TABLE(pci, trm290_pci_tbl);
351
352static struct pci_driver driver = {
353 .name = "TRM290_IDE",
354 .id_table = trm290_pci_tbl,
355 .probe = trm290_init_one,
356};
357
Bartlomiej Zolnierkiewicz82ab1ee2007-01-27 13:46:56 +0100358static int __init trm290_ide_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700359{
360 return ide_pci_register_driver(&driver);
361}
362
363module_init(trm290_ide_init);
364
365MODULE_AUTHOR("Mark Lord");
366MODULE_DESCRIPTION("PCI driver module for Tekram TRM290 IDE");
367MODULE_LICENSE("GPL");