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Kukjin Kimd11135c2011-02-14 14:59:52 +09001/* linux/arch/arm/mach-exynos4/mach-universal_c210.c
Kyungmin Park516607d2010-08-06 19:59:21 +09002 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8*/
9
Kyungmin Park34d79312010-08-21 09:49:49 +090010#include <linux/platform_device.h>
Kyungmin Park516607d2010-08-06 19:59:21 +090011#include <linux/serial_core.h>
Kyungmin Park34d79312010-08-21 09:49:49 +090012#include <linux/input.h>
Kyungmin Park3b7998f2010-10-08 22:34:56 +090013#include <linux/i2c.h>
Kyungmin Park34d79312010-08-21 09:49:49 +090014#include <linux/gpio_keys.h>
15#include <linux/gpio.h>
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +090016#include <linux/fb.h>
Marek Szyprowski4d838ec2011-03-04 10:19:52 +090017#include <linux/mfd/max8998.h>
Kyungmin Parka8928ce2010-12-22 13:34:23 +090018#include <linux/regulator/machine.h>
19#include <linux/regulator/fixed.h>
Marek Szyprowski4d838ec2011-03-04 10:19:52 +090020#include <linux/regulator/max8952.h>
Kyungmin Parka8928ce2010-12-22 13:34:23 +090021#include <linux/mmc/host.h>
Marek Szyprowskib908af42011-06-22 13:43:39 +090022#include <linux/i2c-gpio.h>
23#include <linux/i2c/mcs.h>
Marek Szyprowski0b398b62011-06-22 13:43:39 +090024#include <linux/i2c/atmel_mxt_ts.h>
Kyungmin Park516607d2010-08-06 19:59:21 +090025
26#include <asm/mach/arch.h>
27#include <asm/mach-types.h>
Kyungmin Park516607d2010-08-06 19:59:21 +090028
29#include <plat/regs-serial.h>
Kukjin Kimd11135c2011-02-14 14:59:52 +090030#include <plat/exynos4.h>
Kyungmin Park516607d2010-08-06 19:59:21 +090031#include <plat/cpu.h>
Kyungmin Parkacf5eda2010-10-08 22:34:52 +090032#include <plat/devs.h>
Marek Szyprowski4d838ec2011-03-04 10:19:52 +090033#include <plat/iic.h>
Marek Szyprowski0b398b62011-06-22 13:43:39 +090034#include <plat/gpio-cfg.h>
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +090035#include <plat/fb.h>
Kamil Debskib14f04d2011-07-21 16:43:20 +090036#include <plat/mfc.h>
Kyungmin Parka8928ce2010-12-22 13:34:23 +090037#include <plat/sdhci.h>
Kamil Debskib14f04d2011-07-21 16:43:20 +090038#include <plat/pd.h>
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +090039#include <plat/regs-fb-v4.h>
Kyungmin Park516607d2010-08-06 19:59:21 +090040
41#include <mach/map.h>
42
43/* Following are default values for UCON, ULCON and UFCON UART registers */
44#define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
45 S3C2410_UCON_RXILEVEL | \
46 S3C2410_UCON_TXIRQMODE | \
47 S3C2410_UCON_RXIRQMODE | \
48 S3C2410_UCON_RXFIFO_TOI | \
49 S3C2443_UCON_RXERR_IRQEN)
50
51#define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8
52
53#define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
54 S5PV210_UFCON_TXTRIG256 | \
55 S5PV210_UFCON_RXTRIG256)
56
57static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
58 [0] = {
59 .hwport = 0,
60 .ucon = UNIVERSAL_UCON_DEFAULT,
61 .ulcon = UNIVERSAL_ULCON_DEFAULT,
62 .ufcon = UNIVERSAL_UFCON_DEFAULT,
63 },
64 [1] = {
65 .hwport = 1,
66 .ucon = UNIVERSAL_UCON_DEFAULT,
67 .ulcon = UNIVERSAL_ULCON_DEFAULT,
68 .ufcon = UNIVERSAL_UFCON_DEFAULT,
69 },
70 [2] = {
71 .hwport = 2,
72 .ucon = UNIVERSAL_UCON_DEFAULT,
73 .ulcon = UNIVERSAL_ULCON_DEFAULT,
74 .ufcon = UNIVERSAL_UFCON_DEFAULT,
75 },
76 [3] = {
77 .hwport = 3,
78 .ucon = UNIVERSAL_UCON_DEFAULT,
79 .ulcon = UNIVERSAL_ULCON_DEFAULT,
80 .ufcon = UNIVERSAL_UFCON_DEFAULT,
81 },
82};
83
Marek Szyprowski4d838ec2011-03-04 10:19:52 +090084static struct regulator_consumer_supply max8952_consumer =
Kyungmin Parkc1a238a2011-08-11 16:36:41 +090085 REGULATOR_SUPPLY("vdd_arm", NULL);
Marek Szyprowski4d838ec2011-03-04 10:19:52 +090086
87static struct max8952_platform_data universal_max8952_pdata __initdata = {
88 .gpio_vid0 = EXYNOS4_GPX0(3),
89 .gpio_vid1 = EXYNOS4_GPX0(4),
90 .gpio_en = -1, /* Not controllable, set "Always High" */
91 .default_mode = 0, /* vid0 = 0, vid1 = 0 */
92 .dvs_mode = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
93 .sync_freq = 0, /* default: fastest */
94 .ramp_speed = 0, /* default: fastest */
95
96 .reg_data = {
97 .constraints = {
98 .name = "VARM_1.2V",
99 .min_uV = 770000,
100 .max_uV = 1400000,
101 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
102 .always_on = 1,
103 .boot_on = 1,
104 },
105 .num_consumer_supplies = 1,
106 .consumer_supplies = &max8952_consumer,
107 },
108};
109
110static struct regulator_consumer_supply lp3974_buck1_consumer =
Kyungmin Parkc1a238a2011-08-11 16:36:41 +0900111 REGULATOR_SUPPLY("vdd_int", NULL);
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900112
113static struct regulator_consumer_supply lp3974_buck2_consumer =
114 REGULATOR_SUPPLY("vddg3d", NULL);
115
116static struct regulator_init_data lp3974_buck1_data = {
117 .constraints = {
118 .name = "VINT_1.1V",
119 .min_uV = 750000,
120 .max_uV = 1500000,
121 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
122 REGULATOR_CHANGE_STATUS,
123 .boot_on = 1,
124 .state_mem = {
125 .disabled = 1,
126 },
127 },
128 .num_consumer_supplies = 1,
129 .consumer_supplies = &lp3974_buck1_consumer,
130};
131
132static struct regulator_init_data lp3974_buck2_data = {
133 .constraints = {
134 .name = "VG3D_1.1V",
135 .min_uV = 750000,
136 .max_uV = 1500000,
137 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
138 REGULATOR_CHANGE_STATUS,
139 .boot_on = 1,
140 .state_mem = {
141 .disabled = 1,
142 },
143 },
144 .num_consumer_supplies = 1,
145 .consumer_supplies = &lp3974_buck2_consumer,
146};
147
148static struct regulator_init_data lp3974_buck3_data = {
149 .constraints = {
150 .name = "VCC_1.8V",
151 .min_uV = 1800000,
152 .max_uV = 1800000,
153 .apply_uV = 1,
154 .always_on = 1,
155 .state_mem = {
156 .enabled = 1,
157 },
158 },
159};
160
161static struct regulator_init_data lp3974_buck4_data = {
162 .constraints = {
163 .name = "VMEM_1.2V",
164 .min_uV = 1200000,
165 .max_uV = 1200000,
166 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
167 .apply_uV = 1,
168 .state_mem = {
169 .disabled = 1,
170 },
171 },
172};
173
174static struct regulator_init_data lp3974_ldo2_data = {
175 .constraints = {
176 .name = "VALIVE_1.2V",
177 .min_uV = 1200000,
178 .max_uV = 1200000,
179 .apply_uV = 1,
180 .always_on = 1,
181 .state_mem = {
182 .enabled = 1,
183 },
184 },
185};
186
187static struct regulator_init_data lp3974_ldo3_data = {
188 .constraints = {
189 .name = "VUSB+MIPI_1.1V",
190 .min_uV = 1100000,
191 .max_uV = 1100000,
192 .apply_uV = 1,
193 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
194 .state_mem = {
195 .disabled = 1,
196 },
197 },
198};
199
200static struct regulator_init_data lp3974_ldo4_data = {
201 .constraints = {
202 .name = "VADC_3.3V",
203 .min_uV = 3300000,
204 .max_uV = 3300000,
205 .apply_uV = 1,
206 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
207 .state_mem = {
208 .disabled = 1,
209 },
210 },
211};
212
213static struct regulator_init_data lp3974_ldo5_data = {
214 .constraints = {
215 .name = "VTF_2.8V",
216 .min_uV = 2800000,
217 .max_uV = 2800000,
218 .apply_uV = 1,
219 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
220 .state_mem = {
221 .disabled = 1,
222 },
223 },
224};
225
226static struct regulator_init_data lp3974_ldo6_data = {
227 .constraints = {
228 .name = "LDO6",
229 .min_uV = 2000000,
230 .max_uV = 2000000,
231 .apply_uV = 1,
232 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
233 .state_mem = {
234 .disabled = 1,
235 },
236 },
237};
238
239static struct regulator_init_data lp3974_ldo7_data = {
240 .constraints = {
241 .name = "VLCD+VMIPI_1.8V",
242 .min_uV = 1800000,
243 .max_uV = 1800000,
244 .apply_uV = 1,
245 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
246 .state_mem = {
247 .disabled = 1,
248 },
249 },
250};
251
252static struct regulator_init_data lp3974_ldo8_data = {
253 .constraints = {
254 .name = "VUSB+VDAC_3.3V",
255 .min_uV = 3300000,
256 .max_uV = 3300000,
257 .apply_uV = 1,
258 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
259 .state_mem = {
260 .disabled = 1,
261 },
262 },
263};
264
265static struct regulator_init_data lp3974_ldo9_data = {
266 .constraints = {
267 .name = "VCC_2.8V",
268 .min_uV = 2800000,
269 .max_uV = 2800000,
270 .apply_uV = 1,
271 .always_on = 1,
272 .state_mem = {
273 .enabled = 1,
274 },
275 },
276};
277
278static struct regulator_init_data lp3974_ldo10_data = {
279 .constraints = {
280 .name = "VPLL_1.1V",
281 .min_uV = 1100000,
282 .max_uV = 1100000,
283 .boot_on = 1,
284 .apply_uV = 1,
285 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
286 .state_mem = {
287 .disabled = 1,
288 },
289 },
290};
291
292static struct regulator_init_data lp3974_ldo11_data = {
293 .constraints = {
294 .name = "CAM_AF_3.3V",
295 .min_uV = 3300000,
296 .max_uV = 3300000,
297 .apply_uV = 1,
298 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
299 .state_mem = {
300 .disabled = 1,
301 },
302 },
303};
304
305static struct regulator_init_data lp3974_ldo12_data = {
306 .constraints = {
307 .name = "PS_2.8V",
308 .min_uV = 2800000,
309 .max_uV = 2800000,
310 .apply_uV = 1,
311 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
312 .state_mem = {
313 .disabled = 1,
314 },
315 },
316};
317
318static struct regulator_init_data lp3974_ldo13_data = {
319 .constraints = {
320 .name = "VHIC_1.2V",
321 .min_uV = 1200000,
322 .max_uV = 1200000,
323 .apply_uV = 1,
324 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
325 .state_mem = {
326 .disabled = 1,
327 },
328 },
329};
330
331static struct regulator_init_data lp3974_ldo14_data = {
332 .constraints = {
333 .name = "CAM_I_HOST_1.8V",
334 .min_uV = 1800000,
335 .max_uV = 1800000,
336 .apply_uV = 1,
337 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
338 .state_mem = {
339 .disabled = 1,
340 },
341 },
342};
343
344static struct regulator_init_data lp3974_ldo15_data = {
345 .constraints = {
346 .name = "CAM_S_DIG+FM33_CORE_1.2V",
347 .min_uV = 1200000,
348 .max_uV = 1200000,
349 .apply_uV = 1,
350 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
351 .state_mem = {
352 .disabled = 1,
353 },
354 },
355};
356
357static struct regulator_init_data lp3974_ldo16_data = {
358 .constraints = {
359 .name = "CAM_S_ANA_2.8V",
360 .min_uV = 2800000,
361 .max_uV = 2800000,
362 .apply_uV = 1,
363 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
364 .state_mem = {
365 .disabled = 1,
366 },
367 },
368};
369
370static struct regulator_init_data lp3974_ldo17_data = {
371 .constraints = {
372 .name = "VCC_3.0V_LCD",
373 .min_uV = 3000000,
374 .max_uV = 3000000,
375 .apply_uV = 1,
376 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
377 .boot_on = 1,
378 .state_mem = {
379 .disabled = 1,
380 },
381 },
382};
383
384static struct regulator_init_data lp3974_32khz_ap_data = {
385 .constraints = {
386 .name = "32KHz AP",
387 .always_on = 1,
388 .state_mem = {
389 .enabled = 1,
390 },
391 },
392};
393
394static struct regulator_init_data lp3974_32khz_cp_data = {
395 .constraints = {
396 .name = "32KHz CP",
397 .state_mem = {
398 .disabled = 1,
399 },
400 },
401};
402
403static struct regulator_init_data lp3974_vichg_data = {
404 .constraints = {
405 .name = "VICHG",
406 .state_mem = {
407 .disabled = 1,
408 },
409 },
410};
411
412static struct regulator_init_data lp3974_esafeout1_data = {
413 .constraints = {
414 .name = "SAFEOUT1",
415 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
416 .state_mem = {
417 .enabled = 1,
418 },
419 },
420};
421
422static struct regulator_init_data lp3974_esafeout2_data = {
423 .constraints = {
424 .name = "SAFEOUT2",
425 .boot_on = 1,
426 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
427 .state_mem = {
428 .enabled = 1,
429 },
430 },
431};
432
433static struct max8998_regulator_data lp3974_regulators[] = {
434 { MAX8998_LDO2, &lp3974_ldo2_data },
435 { MAX8998_LDO3, &lp3974_ldo3_data },
436 { MAX8998_LDO4, &lp3974_ldo4_data },
437 { MAX8998_LDO5, &lp3974_ldo5_data },
438 { MAX8998_LDO6, &lp3974_ldo6_data },
439 { MAX8998_LDO7, &lp3974_ldo7_data },
440 { MAX8998_LDO8, &lp3974_ldo8_data },
441 { MAX8998_LDO9, &lp3974_ldo9_data },
442 { MAX8998_LDO10, &lp3974_ldo10_data },
443 { MAX8998_LDO11, &lp3974_ldo11_data },
444 { MAX8998_LDO12, &lp3974_ldo12_data },
445 { MAX8998_LDO13, &lp3974_ldo13_data },
446 { MAX8998_LDO14, &lp3974_ldo14_data },
447 { MAX8998_LDO15, &lp3974_ldo15_data },
448 { MAX8998_LDO16, &lp3974_ldo16_data },
449 { MAX8998_LDO17, &lp3974_ldo17_data },
450 { MAX8998_BUCK1, &lp3974_buck1_data },
451 { MAX8998_BUCK2, &lp3974_buck2_data },
452 { MAX8998_BUCK3, &lp3974_buck3_data },
453 { MAX8998_BUCK4, &lp3974_buck4_data },
454 { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data },
455 { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data },
456 { MAX8998_ENVICHG, &lp3974_vichg_data },
457 { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data },
458 { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data },
459};
460
461static struct max8998_platform_data universal_lp3974_pdata = {
462 .num_regulators = ARRAY_SIZE(lp3974_regulators),
463 .regulators = lp3974_regulators,
464 .buck1_voltage1 = 1100000, /* INT */
465 .buck1_voltage2 = 1000000,
466 .buck1_voltage3 = 1100000,
467 .buck1_voltage4 = 1000000,
468 .buck1_set1 = EXYNOS4_GPX0(5),
469 .buck1_set2 = EXYNOS4_GPX0(6),
470 .buck2_voltage1 = 1200000, /* G3D */
471 .buck2_voltage2 = 1100000,
472 .buck1_default_idx = 0,
473 .buck2_set3 = EXYNOS4_GPE2(0),
474 .buck2_default_idx = 0,
475 .wakeup = true,
476};
477
478/* GPIO I2C 5 (PMIC) */
479static struct i2c_board_info i2c5_devs[] __initdata = {
480 {
481 I2C_BOARD_INFO("max8952", 0xC0 >> 1),
482 .platform_data = &universal_max8952_pdata,
483 }, {
484 I2C_BOARD_INFO("lp3974", 0xCC >> 1),
485 .platform_data = &universal_lp3974_pdata,
486 },
487};
488
Marek Szyprowski0b398b62011-06-22 13:43:39 +0900489/* I2C3 (TSP) */
490static struct mxt_platform_data qt602240_platform_data = {
491 .x_line = 19,
492 .y_line = 11,
493 .x_size = 800,
494 .y_size = 480,
495 .blen = 0x11,
496 .threshold = 0x28,
497 .voltage = 2800000, /* 2.8V */
498 .orient = MXT_DIAGONAL,
499};
500
501static struct i2c_board_info i2c3_devs[] __initdata = {
502 {
503 I2C_BOARD_INFO("qt602240_ts", 0x4a),
504 .platform_data = &qt602240_platform_data,
505 },
506};
507
508static void __init universal_tsp_init(void)
509{
510 int gpio;
511
512 /* TSP_LDO_ON: XMDMADDR_11 */
513 gpio = EXYNOS4_GPE2(3);
514 gpio_request(gpio, "TSP_LDO_ON");
515 gpio_direction_output(gpio, 1);
516 gpio_export(gpio, 0);
517
518 /* TSP_INT: XMDMADDR_7 */
519 gpio = EXYNOS4_GPE1(7);
520 gpio_request(gpio, "TSP_INT");
521
522 s5p_register_gpio_interrupt(gpio);
523 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
524 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
525 i2c3_devs[0].irq = gpio_to_irq(gpio);
526}
527
528
Marek Szyprowskib908af42011-06-22 13:43:39 +0900529/* GPIO I2C 12 (3 Touchkey) */
530static uint32_t touchkey_keymap[] = {
531 /* MCS_KEY_MAP(value, keycode) */
532 MCS_KEY_MAP(0, KEY_MENU), /* KEY_SEND */
533 MCS_KEY_MAP(1, KEY_BACK), /* KEY_END */
534};
535
536static struct mcs_platform_data touchkey_data = {
537 .keymap = touchkey_keymap,
538 .keymap_size = ARRAY_SIZE(touchkey_keymap),
539 .key_maxval = 2,
540};
541
542/* GPIO I2C 3_TOUCH 2.8V */
543#define I2C_GPIO_BUS_12 12
544static struct i2c_gpio_platform_data i2c_gpio12_data = {
545 .sda_pin = EXYNOS4_GPE4(0), /* XMDMDATA_8 */
546 .scl_pin = EXYNOS4_GPE4(1), /* XMDMDATA_9 */
547};
548
549static struct platform_device i2c_gpio12 = {
550 .name = "i2c-gpio",
551 .id = I2C_GPIO_BUS_12,
552 .dev = {
553 .platform_data = &i2c_gpio12_data,
554 },
555};
556
557static struct i2c_board_info i2c_gpio12_devs[] __initdata = {
558 {
559 I2C_BOARD_INFO("mcs5080_touchkey", 0x20),
560 .platform_data = &touchkey_data,
561 },
562};
563
564static void __init universal_touchkey_init(void)
565{
566 int gpio;
567
568 gpio = EXYNOS4_GPE3(7); /* XMDMDATA_7 */
569 gpio_request(gpio, "3_TOUCH_INT");
570 s5p_register_gpio_interrupt(gpio);
571 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
572 i2c_gpio12_devs[0].irq = gpio_to_irq(gpio);
573
574 gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */
575 gpio_request(gpio, "3_TOUCH_EN");
576 gpio_direction_output(gpio, 1);
577}
578
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900579/* GPIO KEYS */
Kyungmin Park34d79312010-08-21 09:49:49 +0900580static struct gpio_keys_button universal_gpio_keys_tables[] = {
581 {
582 .code = KEY_VOLUMEUP,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900583 .gpio = EXYNOS4_GPX2(0), /* XEINT16 */
Kyungmin Park34d79312010-08-21 09:49:49 +0900584 .desc = "gpio-keys: KEY_VOLUMEUP",
585 .type = EV_KEY,
586 .active_low = 1,
587 .debounce_interval = 1,
588 }, {
589 .code = KEY_VOLUMEDOWN,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900590 .gpio = EXYNOS4_GPX2(1), /* XEINT17 */
Kyungmin Park34d79312010-08-21 09:49:49 +0900591 .desc = "gpio-keys: KEY_VOLUMEDOWN",
592 .type = EV_KEY,
593 .active_low = 1,
594 .debounce_interval = 1,
595 }, {
596 .code = KEY_CONFIG,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900597 .gpio = EXYNOS4_GPX2(2), /* XEINT18 */
Kyungmin Park34d79312010-08-21 09:49:49 +0900598 .desc = "gpio-keys: KEY_CONFIG",
599 .type = EV_KEY,
600 .active_low = 1,
601 .debounce_interval = 1,
602 }, {
603 .code = KEY_CAMERA,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900604 .gpio = EXYNOS4_GPX2(3), /* XEINT19 */
Kyungmin Park34d79312010-08-21 09:49:49 +0900605 .desc = "gpio-keys: KEY_CAMERA",
606 .type = EV_KEY,
607 .active_low = 1,
608 .debounce_interval = 1,
609 }, {
610 .code = KEY_OK,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900611 .gpio = EXYNOS4_GPX3(5), /* XEINT29 */
Kyungmin Park34d79312010-08-21 09:49:49 +0900612 .desc = "gpio-keys: KEY_OK",
613 .type = EV_KEY,
614 .active_low = 1,
615 .debounce_interval = 1,
616 },
617};
618
619static struct gpio_keys_platform_data universal_gpio_keys_data = {
620 .buttons = universal_gpio_keys_tables,
621 .nbuttons = ARRAY_SIZE(universal_gpio_keys_tables),
622};
623
624static struct platform_device universal_gpio_keys = {
625 .name = "gpio-keys",
626 .dev = {
627 .platform_data = &universal_gpio_keys_data,
628 },
629};
630
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900631/* eMMC */
632static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
633 .max_width = 8,
634 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
635 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
636 MMC_CAP_DISABLE),
637 .cd_type = S3C_SDHCI_CD_PERMANENT,
638 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
639};
640
641static struct regulator_consumer_supply mmc0_supplies[] = {
642 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
643};
644
645static struct regulator_init_data mmc0_fixed_voltage_init_data = {
646 .constraints = {
647 .name = "VMEM_VDD_2.8V",
648 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
649 },
650 .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies),
651 .consumer_supplies = mmc0_supplies,
652};
653
654static struct fixed_voltage_config mmc0_fixed_voltage_config = {
655 .supply_name = "MASSMEMORY_EN",
656 .microvolts = 2800000,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900657 .gpio = EXYNOS4_GPE1(3),
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900658 .enable_high = true,
659 .init_data = &mmc0_fixed_voltage_init_data,
660};
661
662static struct platform_device mmc0_fixed_voltage = {
663 .name = "reg-fixed-voltage",
664 .id = 0,
665 .dev = {
666 .platform_data = &mmc0_fixed_voltage_config,
667 },
668};
669
670/* SD */
671static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
672 .max_width = 4,
673 .host_caps = MMC_CAP_4_BIT_DATA |
674 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
675 MMC_CAP_DISABLE,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900676 .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900677 .ext_cd_gpio_invert = 1,
678 .cd_type = S3C_SDHCI_CD_GPIO,
679 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
680};
681
682/* WiFi */
683static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = {
684 .max_width = 4,
685 .host_caps = MMC_CAP_4_BIT_DATA |
686 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
687 MMC_CAP_DISABLE,
688 .cd_type = S3C_SDHCI_CD_EXTERNAL,
689};
690
691static void __init universal_sdhci_init(void)
692{
693 s3c_sdhci0_set_platdata(&universal_hsmmc0_data);
694 s3c_sdhci2_set_platdata(&universal_hsmmc2_data);
695 s3c_sdhci3_set_platdata(&universal_hsmmc3_data);
696}
697
Kyungmin Park3b7998f2010-10-08 22:34:56 +0900698/* I2C0 */
699static struct i2c_board_info i2c0_devs[] __initdata = {
700 /* Camera, To be updated */
701};
702
703/* I2C1 */
704static struct i2c_board_info i2c1_devs[] __initdata = {
705 /* Gyro, To be updated */
706};
707
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +0900708/* Frame Buffer */
709static struct s3c_fb_pd_win universal_fb_win0 = {
710 .win_mode = {
711 .left_margin = 16,
712 .right_margin = 16,
713 .upper_margin = 2,
714 .lower_margin = 28,
715 .hsync_len = 2,
716 .vsync_len = 1,
717 .xres = 480,
718 .yres = 800,
719 .refresh = 55,
720 },
721 .max_bpp = 32,
722 .default_bpp = 16,
723};
724
725static struct s3c_fb_platdata universal_lcd_pdata __initdata = {
726 .win[0] = &universal_fb_win0,
727 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
728 VIDCON0_CLKSEL_LCD,
729 .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
730 | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
731 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
732};
733
Kyungmin Park34d79312010-08-21 09:49:49 +0900734static struct platform_device *universal_devices[] __initdata = {
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900735 /* Samsung Platform Devices */
Marek Szyprowskiedd967b2011-06-22 13:43:39 +0900736 &s5p_device_fimc0,
737 &s5p_device_fimc1,
738 &s5p_device_fimc2,
739 &s5p_device_fimc3,
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900740 &mmc0_fixed_voltage,
741 &s3c_device_hsmmc0,
742 &s3c_device_hsmmc2,
743 &s3c_device_hsmmc3,
Marek Szyprowski0b398b62011-06-22 13:43:39 +0900744 &s3c_device_i2c3,
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900745 &s3c_device_i2c5,
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900746
747 /* Universal Devices */
Marek Szyprowskib908af42011-06-22 13:43:39 +0900748 &i2c_gpio12,
Kyungmin Park34d79312010-08-21 09:49:49 +0900749 &universal_gpio_keys,
Kyungmin Parkacf5eda2010-10-08 22:34:52 +0900750 &s5p_device_onenand,
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +0900751 &s5p_device_fimd0,
Kamil Debskib14f04d2011-07-21 16:43:20 +0900752 &s5p_device_mfc,
753 &s5p_device_mfc_l,
754 &s5p_device_mfc_r,
755 &exynos4_device_pd[PD_MFC],
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +0900756 &exynos4_device_pd[PD_LCD0],
Kyungmin Park34d79312010-08-21 09:49:49 +0900757};
758
Kyungmin Park516607d2010-08-06 19:59:21 +0900759static void __init universal_map_io(void)
760{
761 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
762 s3c24xx_init_clocks(24000000);
763 s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
764}
765
Kamil Debskib14f04d2011-07-21 16:43:20 +0900766static void __init universal_reserve(void)
767{
768 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
769}
770
Kyungmin Park516607d2010-08-06 19:59:21 +0900771static void __init universal_machine_init(void)
772{
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900773 universal_sdhci_init();
774
Kyungmin Park3b7998f2010-10-08 22:34:56 +0900775 i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs));
776 i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
777
Marek Szyprowski0b398b62011-06-22 13:43:39 +0900778 universal_tsp_init();
779 s3c_i2c3_set_platdata(NULL);
780 i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
781
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900782 s3c_i2c5_set_platdata(NULL);
783 i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
784
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +0900785 s5p_fimd0_set_platdata(&universal_lcd_pdata);
786
Marek Szyprowskib908af42011-06-22 13:43:39 +0900787 universal_touchkey_init();
788 i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,
789 ARRAY_SIZE(i2c_gpio12_devs));
790
Kyungmin Park34d79312010-08-21 09:49:49 +0900791 /* Last */
792 platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
Kamil Debskib14f04d2011-07-21 16:43:20 +0900793 s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +0900794 s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev;
Kyungmin Park516607d2010-08-06 19:59:21 +0900795}
796
797MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
798 /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
Kyungmin Park516607d2010-08-06 19:59:21 +0900799 .boot_params = S5P_PA_SDRAM + 0x100,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900800 .init_irq = exynos4_init_irq,
Kyungmin Park516607d2010-08-06 19:59:21 +0900801 .map_io = universal_map_io,
802 .init_machine = universal_machine_init,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900803 .timer = &exynos4_timer,
Kamil Debskib14f04d2011-07-21 16:43:20 +0900804 .reserve = &universal_reserve,
Kyungmin Park516607d2010-08-06 19:59:21 +0900805MACHINE_END