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gerrit-public.fairphone.software / kernel / msm-4.9 / f42e7662815647c1a6f73e160abcdf812d3057d2 / . / arch / arm / mach-omap2 / vp.h
blob: 7ce134f7de79031a6af9f245906ca0965ceb5e92 [file] [log] [blame]
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]1/*
2 * OMAP3/4 Voltage Processor (VP) structure and macro definitions
3 *
4 * Copyright (C) 2007, 2010 Texas Instruments, Inc.
5 * Rajendra Nayak <rnayak@ti.com>
6 * Lesly A M <x0080970@ti.com>
7 * Thara Gopinath <thara@ti.com>
8 *
9 * Copyright (C) 2008, 2011 Nokia Corporation
10 * Kalle Jokiniemi
11 * Paul Walmsley
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License version
15 * 2 as published by the Free Software Foundation.
16 */
17#ifndef __ARCH_ARM_MACH_OMAP2_VP_H
18#define __ARCH_ARM_MACH_OMAP2_VP_H
19
20#include <linux/kernel.h>
21
22/* XXX document */
23#define VP_IDLE_TIMEOUT 200
24#define VP_TRANXDONE_TIMEOUT 300
25
26
27/**
28 * struct omap_vp_common_data - register data common to all VDDs
29 * @vpconfig_errorgain_mask: ERRORGAIN bitmask in the PRM_VP*_CONFIG reg
30 * @vpconfig_initvoltage_mask: INITVOLTAGE bitmask in the PRM_VP*_CONFIG reg
31 * @vpconfig_timeouten_mask: TIMEOUT bitmask in the PRM_VP*_CONFIG reg
32 * @vpconfig_initvdd: INITVDD bitmask in the PRM_VP*_CONFIG reg
33 * @vpconfig_forceupdate: FORCEUPDATE bitmask in the PRM_VP*_CONFIG reg
34 * @vpconfig_vpenable: VPENABLE bitmask in the PRM_VP*_CONFIG reg
35 * @vpconfig_erroroffset_shift: ERROROFFSET field shift in PRM_VP*_CONFIG reg
36 * @vpconfig_errorgain_shift: ERRORGAIN field shift in PRM_VP*_CONFIG reg
37 * @vpconfig_initvoltage_shift: INITVOLTAGE field shift in PRM_VP*_CONFIG reg
38 * @vpconfig_stepmin_shift: VSTEPMIN field shift in the PRM_VP*_VSTEPMIN reg
39 * @vpconfig_smpswaittimemin_shift: SMPSWAITTIMEMIN field shift in PRM_VP*_VSTEPMIN reg
40 * @vpconfig_stepmax_shift: VSTEPMAX field shift in the PRM_VP*_VSTEPMAX reg
41 * @vpconfig_smpswaittimemax_shift: SMPSWAITTIMEMAX field shift in PRM_VP*_VSTEPMAX reg
42 * @vpconfig_vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg
43 * @vpconfig_vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg
44 * @vpconfig_vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg
45 *
46 * XXX It it not necessary to have both a mask and a shift for the same
47 * bitfield - remove one
48 * XXX Many of these fields are wrongly named -- e.g., vpconfig_smps* -- fix!
49 */
50struct omap_vp_common_data {
51 u32 vpconfig_errorgain_mask;
52 u32 vpconfig_initvoltage_mask;
53 u32 vpconfig_timeouten;
54 u32 vpconfig_initvdd;
55 u32 vpconfig_forceupdate;
56 u32 vpconfig_vpenable;
57 u8 vpconfig_erroroffset_shift;
58 u8 vpconfig_errorgain_shift;
59 u8 vpconfig_initvoltage_shift;
60 u8 vstepmin_stepmin_shift;
61 u8 vstepmin_smpswaittimemin_shift;
62 u8 vstepmax_stepmax_shift;
63 u8 vstepmax_smpswaittimemax_shift;
64 u8 vlimitto_vddmin_shift;
65 u8 vlimitto_vddmax_shift;
66 u8 vlimitto_timeout_shift;
67};
68
69/**
70 * struct omap_vp_prm_irqst_data - PRM_IRQSTATUS_MPU.VP_TRANXDONE_ST data
71 * @prm_irqst_reg: reg offset for PRM_IRQSTATUS_MPU from top of PRM
72 * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
73 *
74 * XXX prm_irqst_reg does not belong here
75 * XXX Note that on OMAP3, VP_TRANXDONE interrupt may not work due to a
76 * hardware bug
77 * XXX This structure is probably not needed
78 */
79struct omap_vp_prm_irqst_data {
80 u8 prm_irqst_reg;
81 u32 tranxdone_status;
82};
83
84/**
85 * struct omap_vp_instance_data - VP register offsets (per-VDD)
86 * @vp_common: pointer to struct omap_vp_common_data * for this SoC
87 * @prm_irqst_data: pointer to struct omap_vp_prm_irqst_data for this VDD
88 * @vpconfig: PRM_VP*_CONFIG reg offset from PRM start
89 * @vstepmin: PRM_VP*_VSTEPMIN reg offset from PRM start
90 * @vlimitto: PRM_VP*_VLIMITTO reg offset from PRM start
91 * @vstatus: PRM_VP*_VSTATUS reg offset from PRM start
92 * @voltage: PRM_VP*_VOLTAGE reg offset from PRM start
93 *
94 * XXX vp_common is probably not needed since it is per-SoC
95 */
96struct omap_vp_instance_data {
97 const struct omap_vp_common_data *vp_common;
98 const struct omap_vp_prm_irqst_data *prm_irqst_data;
99 u8 vpconfig;
100 u8 vstepmin;
101 u8 vstepmax;
102 u8 vlimitto;
103 u8 vstatus;
104 u8 voltage;
105};
106
107/**
108 * struct omap_vp_runtime_data - VP data populated at runtime by code
109 * @vpconfig_erroroffset: value of ERROROFFSET bitfield in PRM_VP*_CONFIG
110 * @vpconfig_errorgain: value of ERRORGAIN bitfield in PRM_VP*_CONFIG
111 * @vstepmin_smpswaittimemin: value of SMPSWAITTIMEMIN bitfield in PRM_VP*_VSTEPMIN
112 * @vstepmax_smpswaittimemax: value of SMPSWAITTIMEMAX bitfield in PRM_VP*_VSTEPMAX
113 * @vlimitto_timeout: value of TIMEOUT bitfield in PRM_VP*_VLIMITTO
114 * @vstepmin_stepmin: value of VSTEPMIN bitfield in PRM_VP*_VSTEPMIN
115 * @vstepmax_stepmax: value of VSTEPMAX bitfield in PRM_VP*_VSTEPMAX
116 * @vlimitto_vddmin: value of VDDMIN bitfield in PRM_VP*_VLIMITTO
117 * @vlimitto_vddmax: value of VDDMAX bitfield in PRM_VP*_VLIMITTO
118 *
119 * XXX Is this structure really needed? Why not just program the
120 * device directly? They are in PRM space, therefore in the WKUP
121 * powerdomain, so register contents should not be lost in off-mode.
122 * XXX Some of these fields are incorrectly named, e.g., vstep*
123 */
124struct omap_vp_runtime_data {
125 u32 vpconfig_erroroffset;
126 u16 vpconfig_errorgain;
127 u16 vstepmin_smpswaittimemin;
128 u16 vstepmax_smpswaittimemax;
129 u16 vlimitto_timeout;
130 u8 vstepmin_stepmin;
131 u8 vstepmax_stepmax;
132 u8 vlimitto_vddmin;
133 u8 vlimitto_vddmax;
134};
135
136extern struct omap_vp_instance_data omap3_vp1_data;
137extern struct omap_vp_instance_data omap3_vp2_data;
138
139extern struct omap_vp_instance_data omap4_vp_mpu_data;
140extern struct omap_vp_instance_data omap4_vp_iva_data;
141extern struct omap_vp_instance_data omap4_vp_core_data;
142
143#endif