blob: 11a6248cc1c1dd0af3a57ace1ec228ccdb3ed257 [file] [log] [blame]
Balaji Raof52046b2009-01-09 01:49:01 +01001/* NXP PCF50633 Power Management Unit (PMU) driver
2 *
3 * (C) 2006-2008 by Openmoko, Inc.
4 * Author: Harald Welte <laforge@openmoko.org>
5 * Balaji Rao <balajirrao@openmoko.org>
6 * All rights reserved.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/device.h>
17#include <linux/sysfs.h>
Balaji Raof52046b2009-01-09 01:49:01 +010018#include <linux/module.h>
19#include <linux/types.h>
20#include <linux/interrupt.h>
21#include <linux/workqueue.h>
22#include <linux/platform_device.h>
23#include <linux/i2c.h>
24#include <linux/irq.h>
25
26#include <linux/mfd/pcf50633/core.h>
27
28/* Two MBCS registers used during cold start */
29#define PCF50633_REG_MBCS1 0x4b
30#define PCF50633_REG_MBCS2 0x4c
31#define PCF50633_MBCS1_USBPRES 0x01
32#define PCF50633_MBCS1_ADAPTPRES 0x01
33
34static int __pcf50633_read(struct pcf50633 *pcf, u8 reg, int num, u8 *data)
35{
36 int ret;
37
38 ret = i2c_smbus_read_i2c_block_data(pcf->i2c_client, reg,
39 num, data);
40 if (ret < 0)
41 dev_err(pcf->dev, "Error reading %d regs at %d\n", num, reg);
42
43 return ret;
44}
45
46static int __pcf50633_write(struct pcf50633 *pcf, u8 reg, int num, u8 *data)
47{
48 int ret;
49
50 ret = i2c_smbus_write_i2c_block_data(pcf->i2c_client, reg,
51 num, data);
52 if (ret < 0)
53 dev_err(pcf->dev, "Error writing %d regs at %d\n", num, reg);
54
55 return ret;
56
57}
58
59/* Read a block of upto 32 regs */
60int pcf50633_read_block(struct pcf50633 *pcf, u8 reg,
61 int nr_regs, u8 *data)
62{
63 int ret;
64
65 mutex_lock(&pcf->lock);
66 ret = __pcf50633_read(pcf, reg, nr_regs, data);
67 mutex_unlock(&pcf->lock);
68
69 return ret;
70}
71EXPORT_SYMBOL_GPL(pcf50633_read_block);
72
73/* Write a block of upto 32 regs */
74int pcf50633_write_block(struct pcf50633 *pcf , u8 reg,
75 int nr_regs, u8 *data)
76{
77 int ret;
78
79 mutex_lock(&pcf->lock);
80 ret = __pcf50633_write(pcf, reg, nr_regs, data);
81 mutex_unlock(&pcf->lock);
82
83 return ret;
84}
85EXPORT_SYMBOL_GPL(pcf50633_write_block);
86
87u8 pcf50633_reg_read(struct pcf50633 *pcf, u8 reg)
88{
89 u8 val;
90
91 mutex_lock(&pcf->lock);
92 __pcf50633_read(pcf, reg, 1, &val);
93 mutex_unlock(&pcf->lock);
94
95 return val;
96}
97EXPORT_SYMBOL_GPL(pcf50633_reg_read);
98
99int pcf50633_reg_write(struct pcf50633 *pcf, u8 reg, u8 val)
100{
101 int ret;
102
103 mutex_lock(&pcf->lock);
104 ret = __pcf50633_write(pcf, reg, 1, &val);
105 mutex_unlock(&pcf->lock);
106
107 return ret;
108}
109EXPORT_SYMBOL_GPL(pcf50633_reg_write);
110
111int pcf50633_reg_set_bit_mask(struct pcf50633 *pcf, u8 reg, u8 mask, u8 val)
112{
113 int ret;
114 u8 tmp;
115
116 val &= mask;
117
118 mutex_lock(&pcf->lock);
119 ret = __pcf50633_read(pcf, reg, 1, &tmp);
120 if (ret < 0)
121 goto out;
122
123 tmp &= ~mask;
124 tmp |= val;
125 ret = __pcf50633_write(pcf, reg, 1, &tmp);
126
127out:
128 mutex_unlock(&pcf->lock);
129
130 return ret;
131}
132EXPORT_SYMBOL_GPL(pcf50633_reg_set_bit_mask);
133
134int pcf50633_reg_clear_bits(struct pcf50633 *pcf, u8 reg, u8 val)
135{
136 int ret;
137 u8 tmp;
138
139 mutex_lock(&pcf->lock);
140 ret = __pcf50633_read(pcf, reg, 1, &tmp);
141 if (ret < 0)
142 goto out;
143
144 tmp &= ~val;
145 ret = __pcf50633_write(pcf, reg, 1, &tmp);
146
147out:
148 mutex_unlock(&pcf->lock);
149
150 return ret;
151}
152EXPORT_SYMBOL_GPL(pcf50633_reg_clear_bits);
153
154/* sysfs attributes */
155static ssize_t show_dump_regs(struct device *dev, struct device_attribute *attr,
156 char *buf)
157{
158 struct pcf50633 *pcf = dev_get_drvdata(dev);
159 u8 dump[16];
160 int n, n1, idx = 0;
161 char *buf1 = buf;
162 static u8 address_no_read[] = { /* must be ascending */
163 PCF50633_REG_INT1,
164 PCF50633_REG_INT2,
165 PCF50633_REG_INT3,
166 PCF50633_REG_INT4,
167 PCF50633_REG_INT5,
168 0 /* terminator */
169 };
170
171 for (n = 0; n < 256; n += sizeof(dump)) {
172 for (n1 = 0; n1 < sizeof(dump); n1++)
173 if (n == address_no_read[idx]) {
174 idx++;
175 dump[n1] = 0x00;
176 } else
177 dump[n1] = pcf50633_reg_read(pcf, n + n1);
178
179 hex_dump_to_buffer(dump, sizeof(dump), 16, 1, buf1, 128, 0);
180 buf1 += strlen(buf1);
181 *buf1++ = '\n';
182 *buf1 = '\0';
183 }
184
185 return buf1 - buf;
186}
187static DEVICE_ATTR(dump_regs, 0400, show_dump_regs, NULL);
188
189static ssize_t show_resume_reason(struct device *dev,
190 struct device_attribute *attr, char *buf)
191{
192 struct pcf50633 *pcf = dev_get_drvdata(dev);
193 int n;
194
195 n = sprintf(buf, "%02x%02x%02x%02x%02x\n",
196 pcf->resume_reason[0],
197 pcf->resume_reason[1],
198 pcf->resume_reason[2],
199 pcf->resume_reason[3],
200 pcf->resume_reason[4]);
201
202 return n;
203}
204static DEVICE_ATTR(resume_reason, 0400, show_resume_reason, NULL);
205
206static struct attribute *pcf_sysfs_entries[] = {
207 &dev_attr_dump_regs.attr,
208 &dev_attr_resume_reason.attr,
209 NULL,
210};
211
212static struct attribute_group pcf_attr_group = {
213 .name = NULL, /* put in device directory */
214 .attrs = pcf_sysfs_entries,
215};
216
217int pcf50633_register_irq(struct pcf50633 *pcf, int irq,
218 void (*handler) (int, void *), void *data)
219{
220 if (irq < 0 || irq > PCF50633_NUM_IRQ || !handler)
221 return -EINVAL;
222
223 if (WARN_ON(pcf->irq_handler[irq].handler))
224 return -EBUSY;
225
226 mutex_lock(&pcf->lock);
227 pcf->irq_handler[irq].handler = handler;
228 pcf->irq_handler[irq].data = data;
229 mutex_unlock(&pcf->lock);
230
231 return 0;
232}
233EXPORT_SYMBOL_GPL(pcf50633_register_irq);
234
235int pcf50633_free_irq(struct pcf50633 *pcf, int irq)
236{
237 if (irq < 0 || irq > PCF50633_NUM_IRQ)
238 return -EINVAL;
239
240 mutex_lock(&pcf->lock);
241 pcf->irq_handler[irq].handler = NULL;
242 mutex_unlock(&pcf->lock);
243
244 return 0;
245}
246EXPORT_SYMBOL_GPL(pcf50633_free_irq);
247
248static int __pcf50633_irq_mask_set(struct pcf50633 *pcf, int irq, u8 mask)
249{
250 u8 reg, bits, tmp;
251 int ret = 0, idx;
252
253 idx = irq >> 3;
254 reg = PCF50633_REG_INT1M + idx;
255 bits = 1 << (irq & 0x07);
256
257 mutex_lock(&pcf->lock);
258
259 if (mask) {
260 ret = __pcf50633_read(pcf, reg, 1, &tmp);
261 if (ret < 0)
262 goto out;
263
264 tmp |= bits;
265
266 ret = __pcf50633_write(pcf, reg, 1, &tmp);
267 if (ret < 0)
268 goto out;
269
270 pcf->mask_regs[idx] &= ~bits;
271 pcf->mask_regs[idx] |= bits;
272 } else {
273 ret = __pcf50633_read(pcf, reg, 1, &tmp);
274 if (ret < 0)
275 goto out;
276
277 tmp &= ~bits;
278
279 ret = __pcf50633_write(pcf, reg, 1, &tmp);
280 if (ret < 0)
281 goto out;
282
283 pcf->mask_regs[idx] &= ~bits;
284 }
285out:
286 mutex_unlock(&pcf->lock);
287
288 return ret;
289}
290
291int pcf50633_irq_mask(struct pcf50633 *pcf, int irq)
292{
293 dev_info(pcf->dev, "Masking IRQ %d\n", irq);
294
295 return __pcf50633_irq_mask_set(pcf, irq, 1);
296}
297EXPORT_SYMBOL_GPL(pcf50633_irq_mask);
298
299int pcf50633_irq_unmask(struct pcf50633 *pcf, int irq)
300{
301 dev_info(pcf->dev, "Unmasking IRQ %d\n", irq);
302
303 return __pcf50633_irq_mask_set(pcf, irq, 0);
304}
305EXPORT_SYMBOL_GPL(pcf50633_irq_unmask);
306
307int pcf50633_irq_mask_get(struct pcf50633 *pcf, int irq)
308{
309 u8 reg, bits;
310
311 reg = irq >> 3;
312 bits = 1 << (irq & 0x07);
313
314 return pcf->mask_regs[reg] & bits;
315}
316EXPORT_SYMBOL_GPL(pcf50633_irq_mask_get);
317
318static void pcf50633_irq_call_handler(struct pcf50633 *pcf, int irq)
319{
320 if (pcf->irq_handler[irq].handler)
321 pcf->irq_handler[irq].handler(irq, pcf->irq_handler[irq].data);
322}
323
324/* Maximum amount of time ONKEY is held before emergency action is taken */
325#define PCF50633_ONKEY1S_TIMEOUT 8
326
327static void pcf50633_irq_worker(struct work_struct *work)
328{
329 struct pcf50633 *pcf;
330 int ret, i, j;
331 u8 pcf_int[5], chgstat;
332
333 pcf = container_of(work, struct pcf50633, irq_work);
334
335 /* Read the 5 INT regs in one transaction */
336 ret = pcf50633_read_block(pcf, PCF50633_REG_INT1,
337 ARRAY_SIZE(pcf_int), pcf_int);
338 if (ret != ARRAY_SIZE(pcf_int)) {
339 dev_err(pcf->dev, "Error reading INT registers\n");
340
341 /*
342 * If this doesn't ACK the interrupt to the chip, we'll be
343 * called once again as we're level triggered.
344 */
345 goto out;
346 }
347
348 /* We immediately read the usb and adapter status. We thus make sure
349 * only of USBINS/USBREM IRQ handlers are called */
350 if (pcf_int[0] & (PCF50633_INT1_USBINS | PCF50633_INT1_USBREM)) {
351 chgstat = pcf50633_reg_read(pcf, PCF50633_REG_MBCS2);
352 if (chgstat & (0x3 << 4))
353 pcf_int[0] &= ~(1 << PCF50633_INT1_USBREM);
354 else
355 pcf_int[0] &= ~(1 << PCF50633_INT1_USBINS);
356 }
357
358 /* Make sure only one of ADPINS or ADPREM is set */
359 if (pcf_int[0] & (PCF50633_INT1_ADPINS | PCF50633_INT1_ADPREM)) {
360 chgstat = pcf50633_reg_read(pcf, PCF50633_REG_MBCS2);
361 if (chgstat & (0x3 << 4))
362 pcf_int[0] &= ~(1 << PCF50633_INT1_ADPREM);
363 else
364 pcf_int[0] &= ~(1 << PCF50633_INT1_ADPINS);
365 }
366
367 dev_dbg(pcf->dev, "INT1=0x%02x INT2=0x%02x INT3=0x%02x "
368 "INT4=0x%02x INT5=0x%02x\n", pcf_int[0],
369 pcf_int[1], pcf_int[2], pcf_int[3], pcf_int[4]);
370
371 /* Some revisions of the chip don't have a 8s standby mode on
372 * ONKEY1S press. We try to manually do it in such cases. */
373 if ((pcf_int[0] & PCF50633_INT1_SECOND) && pcf->onkey1s_held) {
374 dev_info(pcf->dev, "ONKEY1S held for %d secs\n",
375 pcf->onkey1s_held);
376 if (pcf->onkey1s_held++ == PCF50633_ONKEY1S_TIMEOUT)
377 if (pcf->pdata->force_shutdown)
378 pcf->pdata->force_shutdown(pcf);
379 }
380
381 if (pcf_int[2] & PCF50633_INT3_ONKEY1S) {
382 dev_info(pcf->dev, "ONKEY1S held\n");
383 pcf->onkey1s_held = 1 ;
384
385 /* Unmask IRQ_SECOND */
386 pcf50633_reg_clear_bits(pcf, PCF50633_REG_INT1M,
387 PCF50633_INT1_SECOND);
388
389 /* Unmask IRQ_ONKEYR */
390 pcf50633_reg_clear_bits(pcf, PCF50633_REG_INT2M,
391 PCF50633_INT2_ONKEYR);
392 }
393
394 if ((pcf_int[1] & PCF50633_INT2_ONKEYR) && pcf->onkey1s_held) {
395 pcf->onkey1s_held = 0;
396
397 /* Mask SECOND and ONKEYR interrupts */
398 if (pcf->mask_regs[0] & PCF50633_INT1_SECOND)
399 pcf50633_reg_set_bit_mask(pcf,
400 PCF50633_REG_INT1M,
401 PCF50633_INT1_SECOND,
402 PCF50633_INT1_SECOND);
403
404 if (pcf->mask_regs[1] & PCF50633_INT2_ONKEYR)
405 pcf50633_reg_set_bit_mask(pcf,
406 PCF50633_REG_INT2M,
407 PCF50633_INT2_ONKEYR,
408 PCF50633_INT2_ONKEYR);
409 }
410
411 /* Have we just resumed ? */
412 if (pcf->is_suspended) {
413 pcf->is_suspended = 0;
414
415 /* Set the resume reason filtering out non resumers */
416 for (i = 0; i < ARRAY_SIZE(pcf_int); i++)
417 pcf->resume_reason[i] = pcf_int[i] &
418 pcf->pdata->resumers[i];
419
420 /* Make sure we don't pass on any ONKEY events to
421 * userspace now */
422 pcf_int[1] &= ~(PCF50633_INT2_ONKEYR | PCF50633_INT2_ONKEYF);
423 }
424
425 for (i = 0; i < ARRAY_SIZE(pcf_int); i++) {
426 /* Unset masked interrupts */
427 pcf_int[i] &= ~pcf->mask_regs[i];
428
429 for (j = 0; j < 8 ; j++)
430 if (pcf_int[i] & (1 << j))
431 pcf50633_irq_call_handler(pcf, (i * 8) + j);
432 }
433
434out:
435 put_device(pcf->dev);
436 enable_irq(pcf->irq);
437}
438
439static irqreturn_t pcf50633_irq(int irq, void *data)
440{
441 struct pcf50633 *pcf = data;
442
443 dev_dbg(pcf->dev, "pcf50633_irq\n");
444
445 get_device(pcf->dev);
Nelson Castillof43ab902009-05-12 13:26:47 -0700446 disable_irq_nosync(pcf->irq);
Balaji Raof52046b2009-01-09 01:49:01 +0100447 schedule_work(&pcf->irq_work);
448
449 return IRQ_HANDLED;
450}
451
452static void
453pcf50633_client_dev_register(struct pcf50633 *pcf, const char *name,
454 struct platform_device **pdev)
455{
456 struct pcf50633_subdev_pdata *subdev_pdata;
457 int ret;
458
459 *pdev = platform_device_alloc(name, -1);
460 if (!*pdev) {
461 dev_err(pcf->dev, "Falied to allocate %s\n", name);
462 return;
463 }
464
465 subdev_pdata = kmalloc(sizeof(*subdev_pdata), GFP_KERNEL);
466 if (!subdev_pdata) {
467 dev_err(pcf->dev, "Error allocating subdev pdata\n");
468 platform_device_put(*pdev);
469 }
470
471 subdev_pdata->pcf = pcf;
472 platform_device_add_data(*pdev, subdev_pdata, sizeof(*subdev_pdata));
473
474 (*pdev)->dev.parent = pcf->dev;
475
476 ret = platform_device_add(*pdev);
477 if (ret) {
478 dev_err(pcf->dev, "Failed to register %s: %d\n", name, ret);
479 platform_device_put(*pdev);
480 *pdev = NULL;
481 }
482}
483
484#ifdef CONFIG_PM
485static int pcf50633_suspend(struct device *dev, pm_message_t state)
486{
487 struct pcf50633 *pcf;
488 int ret = 0, i;
489 u8 res[5];
490
491 pcf = dev_get_drvdata(dev);
492
493 /* Make sure our interrupt handlers are not called
494 * henceforth */
495 disable_irq(pcf->irq);
496
497 /* Make sure that any running IRQ worker has quit */
498 cancel_work_sync(&pcf->irq_work);
499
500 /* Save the masks */
501 ret = pcf50633_read_block(pcf, PCF50633_REG_INT1M,
502 ARRAY_SIZE(pcf->suspend_irq_masks),
503 pcf->suspend_irq_masks);
504 if (ret < 0) {
505 dev_err(pcf->dev, "error saving irq masks\n");
506 goto out;
507 }
508
509 /* Write wakeup irq masks */
510 for (i = 0; i < ARRAY_SIZE(res); i++)
511 res[i] = ~pcf->pdata->resumers[i];
512
513 ret = pcf50633_write_block(pcf, PCF50633_REG_INT1M,
514 ARRAY_SIZE(res), &res[0]);
515 if (ret < 0) {
516 dev_err(pcf->dev, "error writing wakeup irq masks\n");
517 goto out;
518 }
519
520 pcf->is_suspended = 1;
521
522out:
523 return ret;
524}
525
526static int pcf50633_resume(struct device *dev)
527{
528 struct pcf50633 *pcf;
529 int ret;
530
531 pcf = dev_get_drvdata(dev);
532
533 /* Write the saved mask registers */
534 ret = pcf50633_write_block(pcf, PCF50633_REG_INT1M,
535 ARRAY_SIZE(pcf->suspend_irq_masks),
536 pcf->suspend_irq_masks);
537 if (ret < 0)
538 dev_err(pcf->dev, "Error restoring saved suspend masks\n");
539
540 /* Restore regulators' state */
541
542
543 get_device(pcf->dev);
544
545 /*
546 * Clear any pending interrupts and set resume reason if any.
547 * This will leave with enable_irq()
548 */
549 pcf50633_irq_worker(&pcf->irq_work);
550
551 return 0;
552}
553#else
554#define pcf50633_suspend NULL
555#define pcf50633_resume NULL
556#endif
557
558static int __devinit pcf50633_probe(struct i2c_client *client,
559 const struct i2c_device_id *ids)
560{
561 struct pcf50633 *pcf;
562 struct pcf50633_platform_data *pdata = client->dev.platform_data;
563 int i, ret = 0;
564 int version, variant;
565
566 pcf = kzalloc(sizeof(*pcf), GFP_KERNEL);
567 if (!pcf)
568 return -ENOMEM;
569
570 pcf->pdata = pdata;
571
572 mutex_init(&pcf->lock);
573
574 i2c_set_clientdata(client, pcf);
575 pcf->dev = &client->dev;
576 pcf->i2c_client = client;
577 pcf->irq = client->irq;
578
579 INIT_WORK(&pcf->irq_work, pcf50633_irq_worker);
580
581 version = pcf50633_reg_read(pcf, 0);
582 variant = pcf50633_reg_read(pcf, 1);
583 if (version < 0 || variant < 0) {
584 dev_err(pcf->dev, "Unable to probe pcf50633\n");
585 ret = -ENODEV;
586 goto err;
587 }
588
589 dev_info(pcf->dev, "Probed device version %d variant %d\n",
590 version, variant);
591
592 /* Enable all interrupts except RTC SECOND */
593 pcf->mask_regs[0] = 0x80;
594 pcf50633_reg_write(pcf, PCF50633_REG_INT1M, pcf->mask_regs[0]);
595 pcf50633_reg_write(pcf, PCF50633_REG_INT2M, 0x00);
596 pcf50633_reg_write(pcf, PCF50633_REG_INT3M, 0x00);
597 pcf50633_reg_write(pcf, PCF50633_REG_INT4M, 0x00);
598 pcf50633_reg_write(pcf, PCF50633_REG_INT5M, 0x00);
599
600 /* Create sub devices */
601 pcf50633_client_dev_register(pcf, "pcf50633-input",
602 &pcf->input_pdev);
603 pcf50633_client_dev_register(pcf, "pcf50633-rtc",
604 &pcf->rtc_pdev);
605 pcf50633_client_dev_register(pcf, "pcf50633-mbc",
606 &pcf->mbc_pdev);
607 pcf50633_client_dev_register(pcf, "pcf50633-adc",
608 &pcf->adc_pdev);
609
610 for (i = 0; i < PCF50633_NUM_REGULATORS; i++) {
611 struct platform_device *pdev;
612
613 pdev = platform_device_alloc("pcf50633-regltr", i);
614 if (!pdev) {
615 dev_err(pcf->dev, "Cannot create regulator\n");
616 continue;
617 }
618
619 pdev->dev.parent = pcf->dev;
620 pdev->dev.platform_data = &pdata->reg_init_data[i];
621 pdev->dev.driver_data = pcf;
622 pcf->regulator_pdev[i] = pdev;
623
624 platform_device_add(pdev);
625 }
626
627 if (client->irq) {
Balaji Raof52046b2009-01-09 01:49:01 +0100628 ret = request_irq(client->irq, pcf50633_irq,
629 IRQF_TRIGGER_LOW, "pcf50633", pcf);
630
631 if (ret) {
632 dev_err(pcf->dev, "Failed to request IRQ %d\n", ret);
633 goto err;
634 }
635 } else {
636 dev_err(pcf->dev, "No IRQ configured\n");
637 goto err;
638 }
639
640 if (enable_irq_wake(client->irq) < 0)
641 dev_err(pcf->dev, "IRQ %u cannot be enabled as wake-up source"
642 "in this hardware revision", client->irq);
643
644 ret = sysfs_create_group(&client->dev.kobj, &pcf_attr_group);
645 if (ret)
646 dev_err(pcf->dev, "error creating sysfs entries\n");
647
648 if (pdata->probe_done)
649 pdata->probe_done(pcf);
650
651 return 0;
652
653err:
654 kfree(pcf);
655 return ret;
656}
657
658static int __devexit pcf50633_remove(struct i2c_client *client)
659{
660 struct pcf50633 *pcf = i2c_get_clientdata(client);
661 int i;
662
663 free_irq(pcf->irq, pcf);
664
665 platform_device_unregister(pcf->input_pdev);
666 platform_device_unregister(pcf->rtc_pdev);
667 platform_device_unregister(pcf->mbc_pdev);
668 platform_device_unregister(pcf->adc_pdev);
669
670 for (i = 0; i < PCF50633_NUM_REGULATORS; i++)
671 platform_device_unregister(pcf->regulator_pdev[i]);
672
673 kfree(pcf);
674
675 return 0;
676}
677
678static struct i2c_device_id pcf50633_id_table[] = {
679 {"pcf50633", 0x73},
Jean Delvare8915e542009-02-17 09:07:02 +0100680 {/* end of list */}
Balaji Raof52046b2009-01-09 01:49:01 +0100681};
682
683static struct i2c_driver pcf50633_driver = {
684 .driver = {
685 .name = "pcf50633",
686 .suspend = pcf50633_suspend,
687 .resume = pcf50633_resume,
688 },
689 .id_table = pcf50633_id_table,
690 .probe = pcf50633_probe,
691 .remove = __devexit_p(pcf50633_remove),
692};
693
694static int __init pcf50633_init(void)
695{
696 return i2c_add_driver(&pcf50633_driver);
697}
698
699static void __exit pcf50633_exit(void)
700{
701 i2c_del_driver(&pcf50633_driver);
702}
703
704MODULE_DESCRIPTION("I2C chip driver for NXP PCF50633 PMU");
705MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
706MODULE_LICENSE("GPL");
707
708module_init(pcf50633_init);
709module_exit(pcf50633_exit);