blob: 58a2b88233e6653a1fc4bed5d5d932afc4b8f09f [file] [log] [blame]
Frank Li022d0712015-07-10 02:09:41 +08001/*
2 * Copyright (C) 2015 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#include <linux/irqchip.h>
Fugang Duan709bc062015-07-28 15:30:40 +08009#include <linux/mfd/syscon.h>
10#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
11#include <linux/micrel_phy.h>
Frank Li022d0712015-07-10 02:09:41 +080012#include <linux/of_platform.h>
Fugang Duan709bc062015-07-28 15:30:40 +080013#include <linux/phy.h>
14#include <linux/regmap.h>
Frank Li022d0712015-07-10 02:09:41 +080015#include <asm/mach/arch.h>
16#include <asm/mach/map.h>
17
18#include "common.h"
Anson Huang547e8f52016-08-29 23:41:12 +080019#include "cpuidle.h"
Frank Li022d0712015-07-10 02:09:41 +080020
Fugang Duan709bc062015-07-28 15:30:40 +080021static void __init imx6ul_enet_clk_init(void)
22{
23 struct regmap *gpr;
24
25 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6ul-iomuxc-gpr");
26 if (!IS_ERR(gpr))
27 regmap_update_bits(gpr, IOMUXC_GPR1, IMX6UL_GPR1_ENET_CLK_DIR,
28 IMX6UL_GPR1_ENET_CLK_OUTPUT);
29 else
30 pr_err("failed to find fsl,imx6ul-iomux-gpr regmap\n");
31
32}
33
34static int ksz8081_phy_fixup(struct phy_device *dev)
35{
36 if (dev && dev->interface == PHY_INTERFACE_MODE_MII) {
37 phy_write(dev, 0x1f, 0x8110);
38 phy_write(dev, 0x16, 0x201);
39 } else if (dev && dev->interface == PHY_INTERFACE_MODE_RMII) {
40 phy_write(dev, 0x1f, 0x8190);
41 phy_write(dev, 0x16, 0x202);
42 }
43
44 return 0;
45}
46
47static void __init imx6ul_enet_phy_init(void)
48{
Fabio Estevam6be4b0d2015-08-19 15:31:30 -030049 if (IS_BUILTIN(CONFIG_PHYLIB))
Fabio Estevam20c15222016-05-11 16:39:30 -030050 phy_register_fixup_for_uid(PHY_ID_KSZ8081, MICREL_PHY_ID_MASK,
Fabio Estevam6be4b0d2015-08-19 15:31:30 -030051 ksz8081_phy_fixup);
Fugang Duan709bc062015-07-28 15:30:40 +080052}
53
54static inline void imx6ul_enet_init(void)
55{
56 imx6ul_enet_clk_init();
57 imx6ul_enet_phy_init();
58}
59
Frank Li022d0712015-07-10 02:09:41 +080060static void __init imx6ul_init_machine(void)
61{
62 struct device *parent;
63
64 parent = imx_soc_device_init();
65 if (parent == NULL)
66 pr_warn("failed to initialize soc device\n");
67
Peter Chencfee6b582016-08-16 10:05:15 +080068 of_platform_default_populate(NULL, NULL, parent);
Fugang Duan709bc062015-07-28 15:30:40 +080069 imx6ul_enet_init();
Frank Li022d0712015-07-10 02:09:41 +080070 imx_anatop_init();
Anson Huangee4a5f82015-08-05 01:48:37 +080071 imx6ul_pm_init();
Frank Li022d0712015-07-10 02:09:41 +080072}
73
74static void __init imx6ul_init_irq(void)
75{
76 imx_init_revision_from_anatop();
77 imx_src_init();
78 irqchip_init();
Anson Huangee4a5f82015-08-05 01:48:37 +080079 imx6_pm_ccm_init("fsl,imx6ul-ccm");
Frank Li022d0712015-07-10 02:09:41 +080080}
81
Bai Ping7f730812015-10-09 23:35:30 +080082static void __init imx6ul_init_late(void)
83{
Anson Huang547e8f52016-08-29 23:41:12 +080084 imx6sx_cpuidle_init();
85
Bai Ping7f730812015-10-09 23:35:30 +080086 if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ))
87 platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0);
88}
89
Nicolas Pitre5d484172015-11-21 20:35:31 -050090static const char * const imx6ul_dt_compat[] __initconst = {
Frank Li022d0712015-07-10 02:09:41 +080091 "fsl,imx6ul",
92 NULL,
93};
94
95DT_MACHINE_START(IMX6UL, "Freescale i.MX6 Ultralite (Device Tree)")
96 .init_irq = imx6ul_init_irq,
97 .init_machine = imx6ul_init_machine,
Bai Ping7f730812015-10-09 23:35:30 +080098 .init_late = imx6ul_init_late,
Frank Li022d0712015-07-10 02:09:41 +080099 .dt_compat = imx6ul_dt_compat,
100MACHINE_END