| Paul Burton | 5f408eb | 2015-05-24 16:11:20 +0100 | [diff] [blame] | 1 | Ingenic SoC Interrupt Controller |
| 2 | |
| 3 | Required properties: |
| 4 | |
| 5 | - compatible : should be "ingenic,<socname>-intc". Valid strings are: |
| 6 | ingenic,jz4740-intc |
| 7 | ingenic,jz4770-intc |
| 8 | ingenic,jz4775-intc |
| 9 | ingenic,jz4780-intc |
| 10 | - reg : Specifies base physical address and size of the registers. |
| 11 | - interrupt-controller : Identifies the node as an interrupt controller |
| 12 | - #interrupt-cells : Specifies the number of cells needed to encode an |
| 13 | interrupt source. The value shall be 1. |
| 14 | - interrupt-parent : phandle of the CPU interrupt controller. |
| 15 | - interrupts : Specifies the CPU interrupt the controller is connected to. |
| 16 | |
| 17 | Example: |
| 18 | |
| 19 | intc: interrupt-controller@10001000 { |
| 20 | compatible = "ingenic,jz4740-intc"; |
| 21 | reg = <0x10001000 0x14>; |
| 22 | |
| 23 | interrupt-controller; |
| 24 | #interrupt-cells = <1>; |
| 25 | |
| 26 | interrupt-parent = <&cpuintc>; |
| 27 | interrupts = <2>; |
| 28 | }; |