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Mars Chengafc257b2015-07-14 14:58:12 +08001+Mediatek 65xx/67xx/81xx sysirq
Yingjoe Chenf4e27e32014-11-25 16:04:22 +08002
3Mediatek SOCs sysirq support controllable irq inverter for each GIC SPI
4interrupt.
5
6Required properties:
7- compatible: should be one of:
Eddie Huang83af2252015-12-01 10:14:00 +01008 "mediatek,mt8173-sysirq"
Yingjoe Chenf4e27e32014-11-25 16:04:22 +08009 "mediatek,mt8135-sysirq"
10 "mediatek,mt8127-sysirq"
Mars Chengafc257b2015-07-14 14:58:12 +080011 "mediatek,mt6795-sysirq"
Mars Cheng94613fa2016-06-29 10:09:32 +080012 "mediatek,mt6755-sysirq"
Howard Chen931ca3c2015-01-08 14:23:11 +080013 "mediatek,mt6592-sysirq"
Yingjoe Chenf4e27e32014-11-25 16:04:22 +080014 "mediatek,mt6589-sysirq"
15 "mediatek,mt6582-sysirq"
Mars Cheng69a462b2015-07-14 14:07:08 +080016 "mediatek,mt6580-sysirq"
Yingjoe Chenf4e27e32014-11-25 16:04:22 +080017 "mediatek,mt6577-sysirq"
Erin Lo02eca172015-10-20 14:34:30 +080018 "mediatek,mt2701-sysirq"
Yingjoe Chenf4e27e32014-11-25 16:04:22 +080019- interrupt-controller : Identifies the node as an interrupt controller
Jon Hunterba180092016-03-17 14:47:57 +000020- #interrupt-cells : Use the same format as specified by GIC in arm,gic.txt.
Yingjoe Chenf4e27e32014-11-25 16:04:22 +080021- interrupt-parent: phandle of irq parent for sysirq. The parent must
22 use the same interrupt-cells format as GIC.
23- reg: Physical base address of the intpol registers and length of memory
24 mapped region.
25
26Example:
27 sysirq: interrupt-controller@10200100 {
28 compatible = "mediatek,mt6589-sysirq", "mediatek,mt6577-sysirq";
29 interrupt-controller;
30 #interrupt-cells = <3>;
31 interrupt-parent = <&gic>;
32 reg = <0 0x10200100 0 0x1c>;
33 };