blob: 7f15f1b0325b51754e227717e9f86ca8784a5ca5 [file] [log] [blame]
Damien Riegel0f6d7852015-12-21 15:11:22 -05001TS-4800 FPGA interrupt controller
2
3TS-4800 FPGA has an internal interrupt controller. When one of the
4interrupts is triggered, the SoC is notified, usually using a GPIO as
5parent interrupt source.
6
7Required properties:
8- compatible: should be "technologic,ts4800-irqc"
9- interrupt-controller: identifies the node as an interrupt controller
10- reg: physical base address of the controller and length of memory mapped
11 region
12- #interrupt-cells: specifies the number of cells needed to encode an interrupt
13 source, should be 1.
14- interrupt-parent: phandle to the parent interrupt controller this one is
15 cascaded from
16- interrupts: specifies the interrupt line in the interrupt-parent controller