blob: e00c2e9f484dceea28c71df05461f0e61336f6ec [file] [log] [blame]
Philipp Zabel479e2e32012-06-25 16:16:25 +02001Freescale i.MX PWM controller
2
3Required properties:
Matt Porter67d7bc42015-03-09 09:24:21 -04004- compatible : should be "fsl,<soc>-pwm" and one of the following
5 compatible strings:
6 - "fsl,imx1-pwm" for PWM compatible with the one integrated on i.MX1
7 - "fsl,imx27-pwm" for PWM compatible with the one integrated on i.MX27
Philipp Zabel479e2e32012-06-25 16:16:25 +02008- reg: physical base address and length of the controller's registers
Laurent Pinchartebeec0a2013-07-18 00:54:23 +02009- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
10 the cells format.
Matt Porter67d7bc42015-03-09 09:24:21 -040011- clocks : Clock specifiers for both ipg and per clocks.
12- clock-names : Clock names should include both "ipg" and "per"
13See the clock consumer binding,
14 Documentation/devicetree/bindings/clock/clock-bindings.txt
Philipp Zabel479e2e32012-06-25 16:16:25 +020015- interrupts: The interrupt for the pwm controller
16
17Example:
18
19pwm1: pwm@53fb4000 {
20 #pwm-cells = <2>;
21 compatible = "fsl,imx53-pwm", "fsl,imx27-pwm";
22 reg = <0x53fb4000 0x4000>;
Matt Porter67d7bc42015-03-09 09:24:21 -040023 clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,
24 <&clks IMX5_CLK_PWM1_HF_GATE>;
25 clock-names = "ipg", "per";
Philipp Zabel479e2e32012-06-25 16:16:25 +020026 interrupts = <61>;
27};