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gerrit-public.fairphone.software / kernel / msm-4.9 / f5395480f5088a86cc8594d29b5c2f07f6995c3d / . / arch / arm / mach-omap2 / vc3xxx_data.c
blob: 95d7701300cbab23d400a5a924e41afd64e14846 [file] [log] [blame]
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]1/*
2 * OMAP3 Voltage Controller (VC) data
3 *
4 * Copyright (C) 2007, 2010 Texas Instruments, Inc.
5 * Rajendra Nayak <rnayak@ti.com>
6 * Lesly A M <x0080970@ti.com>
7 * Thara Gopinath <thara@ti.com>
8 *
9 * Copyright (C) 2008, 2011 Nokia Corporation
10 * Kalle Jokiniemi
11 * Paul Walmsley
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 */
17#include <linux/io.h>
18#include <linux/err.h>
19#include <linux/init.h>
20
21#include <plat/common.h>
22
23#include "prm-regbits-34xx.h"
24#include "voltage.h"
25
26#include "vc.h"
27
28/*
29 * VC data common to 34xx/36xx chips
30 * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file.
31 */
Kevin Hilmand84adcf2011-03-22 16:14:57 -0700[diff] [blame]32static struct omap_vc_common omap3_vc_common = {
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]33 .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET,
34 .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET,
Kevin Hilmane4e021c2011-06-09 11:01:55 -0700[diff] [blame]35 .smps_cmdra_reg = OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET,
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]36 .bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET,
37 .data_shift = OMAP3430_DATA_SHIFT,
38 .slaveaddr_shift = OMAP3430_SLAVEADDR_SHIFT,
39 .regaddr_shift = OMAP3430_REGADDR_SHIFT,
40 .valid = OMAP3430_VALID_MASK,
41 .cmd_on_shift = OMAP3430_VC_CMD_ON_SHIFT,
42 .cmd_on_mask = OMAP3430_VC_CMD_ON_MASK,
43 .cmd_onlp_shift = OMAP3430_VC_CMD_ONLP_SHIFT,
44 .cmd_ret_shift = OMAP3430_VC_CMD_RET_SHIFT,
45 .cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT,
Kevin Hilman24d31942011-03-29 15:57:16 -0700[diff] [blame]46 .cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET,
Kevin Hilmanf5395482011-03-30 16:36:30 -0700[diff] [blame^]47 .i2c_cfg_hsen_mask = OMAP3430_HSEN_MASK,
48 .i2c_cfg_reg = OMAP3_PRM_VC_I2C_CFG_OFFSET,
49 .i2c_mcode_mask = OMAP3430_MCODE_MASK,
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]50};
51
Kevin Hilmand84adcf2011-03-22 16:14:57 -0700[diff] [blame]52struct omap_vc_channel omap3_vc_mpu = {
53 .common = &omap3_vc_common,
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]54 .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET,
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]55 .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK,
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]56 .smps_volra_mask = OMAP3430_VOLRA0_MASK,
Kevin Hilmane4e021c2011-06-09 11:01:55 -0700[diff] [blame]57 .smps_cmdra_mask = OMAP3430_CMDRA0_MASK,
Kevin Hilman24d31942011-03-29 15:57:16 -0700[diff] [blame]58 .cfg_channel_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT,
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]59};
60
Kevin Hilmand84adcf2011-03-22 16:14:57 -0700[diff] [blame]61struct omap_vc_channel omap3_vc_core = {
62 .common = &omap3_vc_common,
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]63 .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET,
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]64 .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK,
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]65 .smps_volra_mask = OMAP3430_VOLRA1_MASK,
Kevin Hilmane4e021c2011-06-09 11:01:55 -0700[diff] [blame]66 .smps_cmdra_mask = OMAP3430_CMDRA1_MASK,
Kevin Hilman24d31942011-03-29 15:57:16 -0700[diff] [blame]67 .cfg_channel_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT,
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]68};