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Alexander Clouter7171d862008-05-31 22:32:37 +01001/*
2 * arch/arm/mach-orion5x/ts78xx-setup.c
3 *
4 * Maintainer: Alexander Clouter <alex@digriz.org.uk>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
Alexander Clouter7171d862008-05-31 22:32:37 +010014#include <linux/mv643xx_eth.h>
15#include <linux/ata_platform.h>
16#include <linux/m48t86.h>
17#include <asm/mach-types.h>
18#include <asm/mach/arch.h>
19#include <asm/mach/map.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010020#include <mach/orion5x.h>
Alexander Clouter7171d862008-05-31 22:32:37 +010021#include "common.h"
22#include "mpp.h"
23
24/*****************************************************************************
25 * TS-78xx Info
26 ****************************************************************************/
27
28/*
29 * FPGA - lives where the PCI bus would be at ORION5X_PCI_MEM_PHYS_BASE
30 */
31#define TS78XX_FPGA_REGS_PHYS_BASE 0xe8000000
32#define TS78XX_FPGA_REGS_VIRT_BASE 0xff900000
33#define TS78XX_FPGA_REGS_SIZE SZ_1M
34
35#define TS78XX_FPGA_REGS_SYSCON_ID (TS78XX_FPGA_REGS_VIRT_BASE | 0x000)
36#define TS78XX_FPGA_REGS_SYSCON_LCDI (TS78XX_FPGA_REGS_VIRT_BASE | 0x004)
37#define TS78XX_FPGA_REGS_SYSCON_LCDO (TS78XX_FPGA_REGS_VIRT_BASE | 0x008)
38
39#define TS78XX_FPGA_REGS_RTC_CTRL (TS78XX_FPGA_REGS_VIRT_BASE | 0x808)
40#define TS78XX_FPGA_REGS_RTC_DATA (TS78XX_FPGA_REGS_VIRT_BASE | 0x80c)
41
Alexander Clouter7171d862008-05-31 22:32:37 +010042/*****************************************************************************
43 * I/O Address Mapping
44 ****************************************************************************/
45static struct map_desc ts78xx_io_desc[] __initdata = {
46 {
47 .virtual = TS78XX_FPGA_REGS_VIRT_BASE,
48 .pfn = __phys_to_pfn(TS78XX_FPGA_REGS_PHYS_BASE),
49 .length = TS78XX_FPGA_REGS_SIZE,
50 .type = MT_DEVICE,
51 },
52};
53
54void __init ts78xx_map_io(void)
55{
56 orion5x_map_io();
57 iotable_init(ts78xx_io_desc, ARRAY_SIZE(ts78xx_io_desc));
58}
59
60/*****************************************************************************
Alexander Clouter7171d862008-05-31 22:32:37 +010061 * Ethernet
62 ****************************************************************************/
63static struct mv643xx_eth_platform_data ts78xx_eth_data = {
Lennert Buytenhekac8406052008-08-26 14:06:47 +020064 .phy_addr = MV643XX_ETH_PHY_ADDR(0),
Alexander Clouter7171d862008-05-31 22:32:37 +010065};
66
67/*****************************************************************************
68 * RTC M48T86 - nicked^Wborrowed from arch/arm/mach-ep93xx/ts72xx.c
69 ****************************************************************************/
70#ifdef CONFIG_RTC_DRV_M48T86
71static unsigned char ts78xx_rtc_readbyte(unsigned long addr)
72{
73 writeb(addr, TS78XX_FPGA_REGS_RTC_CTRL);
74 return readb(TS78XX_FPGA_REGS_RTC_DATA);
75}
76
77static void ts78xx_rtc_writebyte(unsigned char value, unsigned long addr)
78{
79 writeb(addr, TS78XX_FPGA_REGS_RTC_CTRL);
80 writeb(value, TS78XX_FPGA_REGS_RTC_DATA);
81}
82
83static struct m48t86_ops ts78xx_rtc_ops = {
84 .readbyte = ts78xx_rtc_readbyte,
85 .writebyte = ts78xx_rtc_writebyte,
86};
87
88static struct platform_device ts78xx_rtc_device = {
89 .name = "rtc-m48t86",
90 .id = -1,
91 .dev = {
92 .platform_data = &ts78xx_rtc_ops,
93 },
94 .num_resources = 0,
95};
96
97/*
98 * TS uses some of the user storage space on the RTC chip so see if it is
99 * present; as it's an optional feature at purchase time and not all boards
100 * will have it present
101 *
102 * I've used the method TS use in their rtc7800.c example for the detection
103 *
104 * TODO: track down a guinea pig without an RTC to see if we can work out a
105 * better RTC detection routine
106 */
107static int __init ts78xx_rtc_init(void)
108{
109 unsigned char tmp_rtc0, tmp_rtc1;
110
111 tmp_rtc0 = ts78xx_rtc_readbyte(126);
112 tmp_rtc1 = ts78xx_rtc_readbyte(127);
113
114 ts78xx_rtc_writebyte(0x00, 126);
115 ts78xx_rtc_writebyte(0x55, 127);
116 if (ts78xx_rtc_readbyte(127) == 0x55) {
117 ts78xx_rtc_writebyte(0xaa, 127);
118 if (ts78xx_rtc_readbyte(127) == 0xaa
119 && ts78xx_rtc_readbyte(126) == 0x00) {
120 ts78xx_rtc_writebyte(tmp_rtc0, 126);
121 ts78xx_rtc_writebyte(tmp_rtc1, 127);
122 platform_device_register(&ts78xx_rtc_device);
123 return 1;
124 }
125 }
126
127 return 0;
128};
129#else
130static int __init ts78xx_rtc_init(void)
131{
132 return 0;
133}
134#endif
135
136/*****************************************************************************
137 * SATA
138 ****************************************************************************/
139static struct mv_sata_platform_data ts78xx_sata_data = {
140 .n_ports = 2,
141};
142
143/*****************************************************************************
144 * print some information regarding the board
145 ****************************************************************************/
146static void __init ts78xx_print_board_id(void)
147{
148 unsigned int board_info;
149
150 board_info = readl(TS78XX_FPGA_REGS_SYSCON_ID);
151 printk(KERN_INFO "TS-78xx Info: FPGA rev=%.2x, Board Magic=%.6x, ",
152 board_info & 0xff,
153 (board_info >> 8) & 0xffffff);
154 board_info = readl(TS78XX_FPGA_REGS_SYSCON_LCDI);
155 printk("JP1=%d, JP2=%d\n",
156 (board_info >> 30) & 0x1,
157 (board_info >> 31) & 0x1);
158};
159
160/*****************************************************************************
161 * General Setup
162 ****************************************************************************/
163static struct orion5x_mpp_mode ts78xx_mpp_modes[] __initdata = {
164 { 0, MPP_UNUSED },
165 { 1, MPP_GPIO }, /* JTAG Clock */
166 { 2, MPP_GPIO }, /* JTAG Data In */
167 { 3, MPP_GPIO }, /* Lat ECP2 256 FPGA - PB2B */
168 { 4, MPP_GPIO }, /* JTAG Data Out */
169 { 5, MPP_GPIO }, /* JTAG TMS */
170 { 6, MPP_GPIO }, /* Lat ECP2 256 FPGA - PB31A_CLK4+ */
171 { 7, MPP_GPIO }, /* Lat ECP2 256 FPGA - PB22B */
172 { 8, MPP_UNUSED },
173 { 9, MPP_UNUSED },
174 { 10, MPP_UNUSED },
175 { 11, MPP_UNUSED },
176 { 12, MPP_UNUSED },
177 { 13, MPP_UNUSED },
178 { 14, MPP_UNUSED },
179 { 15, MPP_UNUSED },
180 { 16, MPP_UART },
181 { 17, MPP_UART },
182 { 18, MPP_UART },
183 { 19, MPP_UART },
Alexander Clouterf5412862009-02-06 21:59:15 +0000184 /*
185 * MPP[20] PCI Clock Out 1
186 * MPP[21] PCI Clock Out 0
187 * MPP[22] Unused
188 * MPP[23] Unused
189 * MPP[24] Unused
190 * MPP[25] Unused
191 */
Alexander Clouter7171d862008-05-31 22:32:37 +0100192 { -1 },
193};
194
195static void __init ts78xx_init(void)
196{
197 /*
198 * Setup basic Orion functions. Need to be called early.
199 */
200 orion5x_init();
201
202 ts78xx_print_board_id();
203
204 orion5x_mpp_conf(ts78xx_mpp_modes);
205
206 /*
Alexander Clouter7171d862008-05-31 22:32:37 +0100207 * Configure peripherals.
208 */
209 orion5x_ehci0_init();
210 orion5x_ehci1_init();
211 orion5x_eth_init(&ts78xx_eth_data);
212 orion5x_sata_init(&ts78xx_sata_data);
213 orion5x_uart0_init();
214 orion5x_uart1_init();
Saeed Bishara1d5a1a62008-06-16 23:25:12 -1100215 orion5x_xor_init();
Alexander Clouter7171d862008-05-31 22:32:37 +0100216
Alexander Clouter7171d862008-05-31 22:32:37 +0100217 if (!ts78xx_rtc_init())
218 printk(KERN_INFO "TS-78xx RTC not detected or enabled\n");
219}
220
221MACHINE_START(TS78XX, "Technologic Systems TS-78xx SBC")
222 /* Maintainer: Alexander Clouter <alex@digriz.org.uk> */
223 .phys_io = ORION5X_REGS_PHYS_BASE,
224 .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
225 .boot_params = 0x00000100,
226 .init_machine = ts78xx_init,
227 .map_io = ts78xx_map_io,
228 .init_irq = orion5x_init_irq,
229 .timer = &orion5x_timer,
230MACHINE_END