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Jeff Garzik1fdffbc2006-02-09 05:15:27 -05001/*
Dave Jonesf3a03b02007-07-16 11:23:03 -04002 * libata-sff.c - helper library for PCI IDE BMDMA
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05003 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2006 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2006 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
33 */
34
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050035#include <linux/kernel.h>
36#include <linux/pci.h>
37#include <linux/libata.h>
38
39#include "libata.h"
40
41/**
Tejun Heo90088bb2006-10-09 11:10:26 +090042 * ata_irq_on - Enable interrupts on a port.
43 * @ap: Port on which interrupts are enabled.
44 *
45 * Enable interrupts on a legacy IDE device using MMIO or PIO,
46 * wait for idle, clear any pending interrupts.
47 *
48 * LOCKING:
49 * Inherited from caller.
50 */
51u8 ata_irq_on(struct ata_port *ap)
52{
53 struct ata_ioports *ioaddr = &ap->ioaddr;
54 u8 tmp;
55
56 ap->ctl &= ~ATA_NIEN;
57 ap->last_ctl = ap->ctl;
58
Tejun Heo0d5ff562007-02-01 15:06:36 +090059 iowrite8(ap->ctl, ioaddr->ctl_addr);
Tejun Heo90088bb2006-10-09 11:10:26 +090060 tmp = ata_wait_idle(ap);
61
62 ap->ops->irq_clear(ap);
63
64 return tmp;
65}
66
Akira Iguchi83625002007-01-26 16:27:32 +090067u8 ata_dummy_irq_on (struct ata_port *ap) { return 0; }
68
69/**
70 * ata_irq_ack - Acknowledge a device interrupt.
71 * @ap: Port on which interrupts are enabled.
72 *
73 * Wait up to 10 ms for legacy IDE device to become idle (BUSY
74 * or BUSY+DRQ clear). Obtain dma status and port status from
75 * device. Clear the interrupt. Return port status.
76 *
77 * LOCKING:
78 */
79
80u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq)
81{
82 unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY;
Alan Coxd92e74d2007-06-07 16:19:15 +010083 u8 host_stat = 0, post_stat = 0, status;
Akira Iguchi83625002007-01-26 16:27:32 +090084
85 status = ata_busy_wait(ap, bits, 1000);
86 if (status & bits)
87 if (ata_msg_err(ap))
88 printk(KERN_ERR "abnormal status 0x%X\n", status);
89
Alan Coxd92e74d2007-06-07 16:19:15 +010090 if (ap->ioaddr.bmdma_addr) {
91 /* get controller status; clear intr, err bits */
92 host_stat = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
93 iowrite8(host_stat | ATA_DMA_INTR | ATA_DMA_ERR,
94 ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
Akira Iguchi83625002007-01-26 16:27:32 +090095
Alan Coxd92e74d2007-06-07 16:19:15 +010096 post_stat = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
97 }
Akira Iguchi83625002007-01-26 16:27:32 +090098 if (ata_msg_intr(ap))
99 printk(KERN_INFO "%s: irq ack: host_stat 0x%X, new host_stat 0x%X, drv_stat 0x%X\n",
100 __FUNCTION__,
101 host_stat, post_stat, status);
Akira Iguchi83625002007-01-26 16:27:32 +0900102 return status;
103}
104
105u8 ata_dummy_irq_ack(struct ata_port *ap, unsigned int chk_drq) { return 0; }
106
Tejun Heo90088bb2006-10-09 11:10:26 +0900107/**
Tejun Heo0d5ff562007-02-01 15:06:36 +0900108 * ata_tf_load - send taskfile registers to host controller
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500109 * @ap: Port to which output is sent
110 * @tf: ATA taskfile register set
111 *
112 * Outputs ATA taskfile to standard ATA host controller.
113 *
114 * LOCKING:
115 * Inherited from caller.
116 */
117
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500118void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
119{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900120 struct ata_ioports *ioaddr = &ap->ioaddr;
121 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
122
123 if (tf->ctl != ap->last_ctl) {
124 iowrite8(tf->ctl, ioaddr->ctl_addr);
125 ap->last_ctl = tf->ctl;
126 ata_wait_idle(ap);
127 }
128
129 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
130 iowrite8(tf->hob_feature, ioaddr->feature_addr);
131 iowrite8(tf->hob_nsect, ioaddr->nsect_addr);
132 iowrite8(tf->hob_lbal, ioaddr->lbal_addr);
133 iowrite8(tf->hob_lbam, ioaddr->lbam_addr);
134 iowrite8(tf->hob_lbah, ioaddr->lbah_addr);
135 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
136 tf->hob_feature,
137 tf->hob_nsect,
138 tf->hob_lbal,
139 tf->hob_lbam,
140 tf->hob_lbah);
141 }
142
143 if (is_addr) {
144 iowrite8(tf->feature, ioaddr->feature_addr);
145 iowrite8(tf->nsect, ioaddr->nsect_addr);
146 iowrite8(tf->lbal, ioaddr->lbal_addr);
147 iowrite8(tf->lbam, ioaddr->lbam_addr);
148 iowrite8(tf->lbah, ioaddr->lbah_addr);
149 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
150 tf->feature,
151 tf->nsect,
152 tf->lbal,
153 tf->lbam,
154 tf->lbah);
155 }
156
157 if (tf->flags & ATA_TFLAG_DEVICE) {
158 iowrite8(tf->device, ioaddr->device_addr);
159 VPRINTK("device 0x%X\n", tf->device);
160 }
161
162 ata_wait_idle(ap);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500163}
164
165/**
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500166 * ata_exec_command - issue ATA command to host controller
167 * @ap: port to which command is being issued
168 * @tf: ATA taskfile register set
169 *
Tejun Heo0d5ff562007-02-01 15:06:36 +0900170 * Issues ATA command, with proper synchronization with interrupt
171 * handler / other threads.
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500172 *
173 * LOCKING:
Jeff Garzikcca39742006-08-24 03:19:22 -0400174 * spin_lock_irqsave(host lock)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500175 */
176void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
177{
Tejun Heo44877b42007-02-21 01:06:51 +0900178 DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900179
180 iowrite8(tf->command, ap->ioaddr.command_addr);
181 ata_pause(ap);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500182}
183
184/**
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500185 * ata_tf_read - input device's ATA taskfile shadow registers
186 * @ap: Port from which input is read
187 * @tf: ATA taskfile register set for storing input
188 *
189 * Reads ATA taskfile registers for currently-selected device
190 * into @tf.
191 *
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500192 * LOCKING:
193 * Inherited from caller.
194 */
195void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
196{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900197 struct ata_ioports *ioaddr = &ap->ioaddr;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500198
Tejun Heo0d5ff562007-02-01 15:06:36 +0900199 tf->command = ata_check_status(ap);
200 tf->feature = ioread8(ioaddr->error_addr);
201 tf->nsect = ioread8(ioaddr->nsect_addr);
202 tf->lbal = ioread8(ioaddr->lbal_addr);
203 tf->lbam = ioread8(ioaddr->lbam_addr);
204 tf->lbah = ioread8(ioaddr->lbah_addr);
205 tf->device = ioread8(ioaddr->device_addr);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500206
Tejun Heo0d5ff562007-02-01 15:06:36 +0900207 if (tf->flags & ATA_TFLAG_LBA48) {
208 iowrite8(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
209 tf->hob_feature = ioread8(ioaddr->error_addr);
210 tf->hob_nsect = ioread8(ioaddr->nsect_addr);
211 tf->hob_lbal = ioread8(ioaddr->lbal_addr);
212 tf->hob_lbam = ioread8(ioaddr->lbam_addr);
213 tf->hob_lbah = ioread8(ioaddr->lbah_addr);
Petr Vandrovecfe36cb52007-07-20 07:44:44 -0400214 iowrite8(tf->ctl, ioaddr->ctl_addr);
215 ap->last_ctl = tf->ctl;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900216 }
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500217}
218
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500219/**
220 * ata_check_status - Read device status reg & clear interrupt
221 * @ap: port where the device is
222 *
223 * Reads ATA taskfile status register for currently-selected device
224 * and return its value. This also clears pending interrupts
225 * from this device
226 *
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500227 * LOCKING:
228 * Inherited from caller.
229 */
230u8 ata_check_status(struct ata_port *ap)
231{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900232 return ioread8(ap->ioaddr.status_addr);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500233}
234
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500235/**
236 * ata_altstatus - Read device alternate status reg
237 * @ap: port where the device is
238 *
239 * Reads ATA taskfile alternate status register for
240 * currently-selected device and return its value.
241 *
242 * Note: may NOT be used as the check_altstatus() entry in
243 * ata_port_operations.
244 *
245 * LOCKING:
246 * Inherited from caller.
247 */
248u8 ata_altstatus(struct ata_port *ap)
249{
250 if (ap->ops->check_altstatus)
251 return ap->ops->check_altstatus(ap);
252
Tejun Heo0d5ff562007-02-01 15:06:36 +0900253 return ioread8(ap->ioaddr.altstatus_addr);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500254}
255
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500256/**
Tejun Heo0d5ff562007-02-01 15:06:36 +0900257 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500258 * @qc: Info associated with this ATA transaction.
259 *
260 * LOCKING:
Jeff Garzikcca39742006-08-24 03:19:22 -0400261 * spin_lock_irqsave(host lock)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500262 */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900263void ata_bmdma_setup(struct ata_queued_cmd *qc)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500264{
265 struct ata_port *ap = qc->ap;
266 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
267 u8 dmactl;
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500268
269 /* load PRD table addr. */
270 mb(); /* make sure PRD table writes are visible to controller */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900271 iowrite32(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500272
273 /* specify data direction, triple-check start bit is clear */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900274 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500275 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
276 if (!rw)
277 dmactl |= ATA_DMA_WR;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900278 iowrite8(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500279
280 /* issue r/w command */
281 ap->ops->exec_command(ap, &qc->tf);
282}
283
284/**
Tejun Heo0d5ff562007-02-01 15:06:36 +0900285 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500286 * @qc: Info associated with this ATA transaction.
287 *
288 * LOCKING:
Jeff Garzikcca39742006-08-24 03:19:22 -0400289 * spin_lock_irqsave(host lock)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500290 */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900291void ata_bmdma_start (struct ata_queued_cmd *qc)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500292{
293 struct ata_port *ap = qc->ap;
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500294 u8 dmactl;
295
296 /* start host DMA transaction */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900297 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
298 iowrite8(dmactl | ATA_DMA_START, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500299
Alan Coxe1cc9de2007-09-20 15:03:07 +0100300 /* Strictly, one may wish to issue an ioread8() here, to
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500301 * flush the mmio write. However, control also passes
302 * to the hardware at this point, and it will interrupt
303 * us when we are to resume control. So, in effect,
304 * we don't care when the mmio write flushes.
305 * Further, a read of the DMA status register _immediately_
306 * following the write may not be what certain flaky hardware
307 * is expected, so I think it is best to not add a readb()
308 * without first all the MMIO ATA cards/mobos.
309 * Or maybe I'm just being paranoid.
Alan Coxe1cc9de2007-09-20 15:03:07 +0100310 *
311 * FIXME: The posting of this write means I/O starts are
312 * unneccessarily delayed for MMIO
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500313 */
314}
315
316/**
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500317 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
318 * @ap: Port associated with this ATA transaction.
319 *
320 * Clear interrupt and error flags in DMA status register.
321 *
322 * May be used as the irq_clear() entry in ata_port_operations.
323 *
324 * LOCKING:
Jeff Garzikcca39742006-08-24 03:19:22 -0400325 * spin_lock_irqsave(host lock)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500326 */
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500327void ata_bmdma_irq_clear(struct ata_port *ap)
328{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900329 void __iomem *mmio = ap->ioaddr.bmdma_addr;
330
331 if (!mmio)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500332 return;
333
Tejun Heo0d5ff562007-02-01 15:06:36 +0900334 iowrite8(ioread8(mmio + ATA_DMA_STATUS), mmio + ATA_DMA_STATUS);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500335}
336
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500337/**
338 * ata_bmdma_status - Read PCI IDE BMDMA status
339 * @ap: Port associated with this ATA transaction.
340 *
341 * Read and return BMDMA status register.
342 *
343 * May be used as the bmdma_status() entry in ata_port_operations.
344 *
345 * LOCKING:
Jeff Garzikcca39742006-08-24 03:19:22 -0400346 * spin_lock_irqsave(host lock)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500347 */
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500348u8 ata_bmdma_status(struct ata_port *ap)
349{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900350 return ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500351}
352
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500353/**
354 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
355 * @qc: Command we are ending DMA for
356 *
357 * Clears the ATA_DMA_START flag in the dma control register
358 *
359 * May be used as the bmdma_stop() entry in ata_port_operations.
360 *
361 * LOCKING:
Jeff Garzikcca39742006-08-24 03:19:22 -0400362 * spin_lock_irqsave(host lock)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500363 */
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500364void ata_bmdma_stop(struct ata_queued_cmd *qc)
365{
366 struct ata_port *ap = qc->ap;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900367 void __iomem *mmio = ap->ioaddr.bmdma_addr;
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500368
Tejun Heo0d5ff562007-02-01 15:06:36 +0900369 /* clear start/stop bit */
370 iowrite8(ioread8(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
371 mmio + ATA_DMA_CMD);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500372
373 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
374 ata_altstatus(ap); /* dummy read */
375}
376
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900377/**
378 * ata_bmdma_freeze - Freeze BMDMA controller port
379 * @ap: port to freeze
380 *
381 * Freeze BMDMA controller port.
382 *
383 * LOCKING:
384 * Inherited from caller.
385 */
386void ata_bmdma_freeze(struct ata_port *ap)
387{
388 struct ata_ioports *ioaddr = &ap->ioaddr;
389
390 ap->ctl |= ATA_NIEN;
391 ap->last_ctl = ap->ctl;
392
Tejun Heo0d5ff562007-02-01 15:06:36 +0900393 iowrite8(ap->ctl, ioaddr->ctl_addr);
Tejun Heo0f0a3ad2006-11-17 12:24:22 +0900394
395 /* Under certain circumstances, some controllers raise IRQ on
396 * ATA_NIEN manipulation. Also, many controllers fail to mask
397 * previously pending IRQ on ATA_NIEN assertion. Clear it.
398 */
399 ata_chk_status(ap);
400
401 ap->ops->irq_clear(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900402}
403
404/**
405 * ata_bmdma_thaw - Thaw BMDMA controller port
406 * @ap: port to thaw
407 *
408 * Thaw BMDMA controller port.
409 *
410 * LOCKING:
411 * Inherited from caller.
412 */
413void ata_bmdma_thaw(struct ata_port *ap)
414{
415 /* clear & re-enable interrupts */
416 ata_chk_status(ap);
417 ap->ops->irq_clear(ap);
Akira Iguchi83625002007-01-26 16:27:32 +0900418 ap->ops->irq_on(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900419}
420
421/**
422 * ata_bmdma_drive_eh - Perform EH with given methods for BMDMA controller
423 * @ap: port to handle error for
Tejun Heof5914a42006-05-31 18:27:48 +0900424 * @prereset: prereset method (can be NULL)
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900425 * @softreset: softreset method (can be NULL)
426 * @hardreset: hardreset method (can be NULL)
427 * @postreset: postreset method (can be NULL)
428 *
429 * Handle error for ATA BMDMA controller. It can handle both
430 * PATA and SATA controllers. Many controllers should be able to
431 * use this EH as-is or with some added handling before and
432 * after.
433 *
434 * This function is intended to be used for constructing
435 * ->error_handler callback by low level drivers.
436 *
437 * LOCKING:
438 * Kernel thread context (may sleep)
439 */
Tejun Heof5914a42006-05-31 18:27:48 +0900440void ata_bmdma_drive_eh(struct ata_port *ap, ata_prereset_fn_t prereset,
441 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
442 ata_postreset_fn_t postreset)
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900443{
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900444 struct ata_queued_cmd *qc;
445 unsigned long flags;
446 int thaw = 0;
447
448 qc = __ata_qc_from_tag(ap, ap->active_tag);
449 if (qc && !(qc->flags & ATA_QCFLAG_FAILED))
450 qc = NULL;
451
452 /* reset PIO HSM and stop DMA engine */
Jeff Garzikba6a1302006-06-22 23:46:10 -0400453 spin_lock_irqsave(ap->lock, flags);
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900454
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900455 ap->hsm_task_state = HSM_ST_IDLE;
456
457 if (qc && (qc->tf.protocol == ATA_PROT_DMA ||
458 qc->tf.protocol == ATA_PROT_ATAPI_DMA)) {
459 u8 host_stat;
460
Robert Hancockfbbb2622006-10-27 19:08:41 -0700461 host_stat = ap->ops->bmdma_status(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900462
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900463 /* BMDMA controllers indicate host bus error by
464 * setting DMA_ERR bit and timing out. As it wasn't
465 * really a timeout event, adjust error mask and
466 * cancel frozen state.
467 */
Alan18d90de2007-01-24 11:42:38 +0000468 if (qc->err_mask == AC_ERR_TIMEOUT && (host_stat & ATA_DMA_ERR)) {
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900469 qc->err_mask = AC_ERR_HOST_BUS;
470 thaw = 1;
471 }
472
473 ap->ops->bmdma_stop(qc);
474 }
475
476 ata_altstatus(ap);
477 ata_chk_status(ap);
478 ap->ops->irq_clear(ap);
479
Jeff Garzikba6a1302006-06-22 23:46:10 -0400480 spin_unlock_irqrestore(ap->lock, flags);
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900481
482 if (thaw)
483 ata_eh_thaw_port(ap);
484
485 /* PIO and DMA engines have been stopped, perform recovery */
Tejun Heof5914a42006-05-31 18:27:48 +0900486 ata_do_eh(ap, prereset, softreset, hardreset, postreset);
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900487}
488
489/**
490 * ata_bmdma_error_handler - Stock error handler for BMDMA controller
491 * @ap: port to handle error for
492 *
493 * Stock error handler for BMDMA controller.
494 *
495 * LOCKING:
496 * Kernel thread context (may sleep)
497 */
498void ata_bmdma_error_handler(struct ata_port *ap)
499{
500 ata_reset_fn_t hardreset;
501
502 hardreset = NULL;
503 if (sata_scr_valid(ap))
504 hardreset = sata_std_hardreset;
505
Tejun Heof5914a42006-05-31 18:27:48 +0900506 ata_bmdma_drive_eh(ap, ata_std_prereset, ata_std_softreset, hardreset,
507 ata_std_postreset);
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900508}
509
510/**
511 * ata_bmdma_post_internal_cmd - Stock post_internal_cmd for
512 * BMDMA controller
513 * @qc: internal command to clean up
514 *
515 * LOCKING:
516 * Kernel thread context (may sleep)
517 */
518void ata_bmdma_post_internal_cmd(struct ata_queued_cmd *qc)
519{
Alan61dd08c2007-01-25 15:09:05 +0000520 if (qc->ap->ioaddr.bmdma_addr)
521 ata_bmdma_stop(qc);
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900522}
523
Alan Coxd92e74d2007-06-07 16:19:15 +0100524/**
525 * ata_sff_port_start - Set port up for dma.
526 * @ap: Port to initialize
527 *
528 * Called just after data structures for each port are
529 * initialized. Allocates space for PRD table if the device
530 * is DMA capable SFF.
531 *
532 * May be used as the port_start() entry in ata_port_operations.
533 *
534 * LOCKING:
535 * Inherited from caller.
536 */
537
538int ata_sff_port_start(struct ata_port *ap)
539{
540 if (ap->ioaddr.bmdma_addr)
541 return ata_port_start(ap);
542 return 0;
543}
544
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500545#ifdef CONFIG_PCI
Alan4112e162007-01-08 12:10:05 +0000546
547static int ata_resources_present(struct pci_dev *pdev, int port)
548{
549 int i;
Jeff Garzika84471f2007-02-26 05:51:33 -0500550
Alan4112e162007-01-08 12:10:05 +0000551 /* Check the PCI resources for this channel are enabled */
552 port = port * 2;
553 for (i = 0; i < 2; i ++) {
554 if (pci_resource_start(pdev, port + i) == 0 ||
Tejun Heo55a6ade2007-03-09 19:43:35 +0900555 pci_resource_len(pdev, port + i) == 0)
556 return 0;
Alan4112e162007-01-08 12:10:05 +0000557 }
558 return 1;
559}
Jeff Garzika84471f2007-02-26 05:51:33 -0500560
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500561/**
Tejun Heo0f834de2007-04-17 23:44:07 +0900562 * ata_pci_init_bmdma - acquire PCI BMDMA resources and init ATA host
563 * @host: target ATA host
564 *
565 * Acquire PCI BMDMA resources and initialize @host accordingly.
566 *
567 * LOCKING:
568 * Inherited from calling layer (may sleep).
569 *
570 * RETURNS:
571 * 0 on success, -errno otherwise.
572 */
Tejun Heo1626aeb2007-05-04 12:43:58 +0200573int ata_pci_init_bmdma(struct ata_host *host)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500574{
Tejun Heo0f834de2007-04-17 23:44:07 +0900575 struct device *gdev = host->dev;
576 struct pci_dev *pdev = to_pci_dev(gdev);
577 int i, rc;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500578
Alan Cox6fdc99a2007-07-26 18:41:30 +0100579 /* No BAR4 allocation: No DMA */
580 if (pci_resource_start(pdev, 4) == 0)
581 return 0;
582
Tejun Heo0f834de2007-04-17 23:44:07 +0900583 /* TODO: If we get no DMA mask we should fall back to PIO */
584 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
585 if (rc)
586 return rc;
587 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
588 if (rc)
589 return rc;
590
591 /* request and iomap DMA region */
592 rc = pcim_iomap_regions(pdev, 1 << 4, DRV_NAME);
593 if (rc) {
594 dev_printk(KERN_ERR, gdev, "failed to request/iomap BAR4\n");
595 return -ENOMEM;
596 }
597 host->iomap = pcim_iomap_table(pdev);
598
Tejun Heo1626aeb2007-05-04 12:43:58 +0200599 for (i = 0; i < 2; i++) {
Tejun Heo0f834de2007-04-17 23:44:07 +0900600 struct ata_port *ap = host->ports[i];
Tejun Heo0f834de2007-04-17 23:44:07 +0900601 void __iomem *bmdma = host->iomap[4] + 8 * i;
602
603 if (ata_port_is_dummy(ap))
604 continue;
605
Tejun Heo21b0ad42007-04-17 23:44:07 +0900606 ap->ioaddr.bmdma_addr = bmdma;
Tejun Heo0f834de2007-04-17 23:44:07 +0900607 if ((!(ap->flags & ATA_FLAG_IGN_SIMPLEX)) &&
608 (ioread8(bmdma + 2) & 0x80))
609 host->flags |= ATA_HOST_SIMPLEX;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900610 }
611
Tejun Heo0f834de2007-04-17 23:44:07 +0900612 return 0;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500613}
614
Tejun Heod491b272007-04-17 23:44:07 +0900615/**
Tejun Heod583bc12007-07-04 18:02:07 +0900616 * ata_pci_init_sff_host - acquire native PCI ATA resources and init host
Tejun Heod491b272007-04-17 23:44:07 +0900617 * @host: target ATA host
Tejun Heod491b272007-04-17 23:44:07 +0900618 *
Tejun Heo1626aeb2007-05-04 12:43:58 +0200619 * Acquire native PCI ATA resources for @host and initialize the
620 * first two ports of @host accordingly. Ports marked dummy are
621 * skipped and allocation failure makes the port dummy.
Tejun Heod491b272007-04-17 23:44:07 +0900622 *
Tejun Heod583bc12007-07-04 18:02:07 +0900623 * Note that native PCI resources are valid even for legacy hosts
624 * as we fix up pdev resources array early in boot, so this
625 * function can be used for both native and legacy SFF hosts.
626 *
Tejun Heod491b272007-04-17 23:44:07 +0900627 * LOCKING:
628 * Inherited from calling layer (may sleep).
629 *
630 * RETURNS:
Tejun Heo1626aeb2007-05-04 12:43:58 +0200631 * 0 if at least one port is initialized, -ENODEV if no port is
632 * available.
Tejun Heod491b272007-04-17 23:44:07 +0900633 */
Tejun Heod583bc12007-07-04 18:02:07 +0900634int ata_pci_init_sff_host(struct ata_host *host)
Tejun Heod491b272007-04-17 23:44:07 +0900635{
636 struct device *gdev = host->dev;
637 struct pci_dev *pdev = to_pci_dev(gdev);
Tejun Heo1626aeb2007-05-04 12:43:58 +0200638 unsigned int mask = 0;
Tejun Heod491b272007-04-17 23:44:07 +0900639 int i, rc;
640
Tejun Heod491b272007-04-17 23:44:07 +0900641 /* request, iomap BARs and init port addresses accordingly */
642 for (i = 0; i < 2; i++) {
643 struct ata_port *ap = host->ports[i];
644 int base = i * 2;
645 void __iomem * const *iomap;
646
Tejun Heo1626aeb2007-05-04 12:43:58 +0200647 if (ata_port_is_dummy(ap))
Tejun Heod491b272007-04-17 23:44:07 +0900648 continue;
649
Tejun Heo1626aeb2007-05-04 12:43:58 +0200650 /* Discard disabled ports. Some controllers show
651 * their unused channels this way. Disabled ports are
652 * made dummy.
653 */
654 if (!ata_resources_present(pdev, i)) {
655 ap->ops = &ata_dummy_port_ops;
656 continue;
657 }
658
Tejun Heod491b272007-04-17 23:44:07 +0900659 rc = pcim_iomap_regions(pdev, 0x3 << base, DRV_NAME);
660 if (rc) {
Tejun Heo1626aeb2007-05-04 12:43:58 +0200661 dev_printk(KERN_WARNING, gdev,
662 "failed to request/iomap BARs for port %d "
663 "(errno=%d)\n", i, rc);
Tejun Heod491b272007-04-17 23:44:07 +0900664 if (rc == -EBUSY)
665 pcim_pin_device(pdev);
Tejun Heo1626aeb2007-05-04 12:43:58 +0200666 ap->ops = &ata_dummy_port_ops;
667 continue;
Tejun Heod491b272007-04-17 23:44:07 +0900668 }
669 host->iomap = iomap = pcim_iomap_table(pdev);
670
671 ap->ioaddr.cmd_addr = iomap[base];
672 ap->ioaddr.altstatus_addr =
673 ap->ioaddr.ctl_addr = (void __iomem *)
674 ((unsigned long)iomap[base + 1] | ATA_PCI_CTL_OFS);
675 ata_std_ports(&ap->ioaddr);
Tejun Heo1626aeb2007-05-04 12:43:58 +0200676
677 mask |= 1 << i;
678 }
679
680 if (!mask) {
681 dev_printk(KERN_ERR, gdev, "no available native port\n");
682 return -ENODEV;
Tejun Heod491b272007-04-17 23:44:07 +0900683 }
684
685 return 0;
686}
687
Tejun Heo21b0ad42007-04-17 23:44:07 +0900688/**
Tejun Heod583bc12007-07-04 18:02:07 +0900689 * ata_pci_prepare_sff_host - helper to prepare native PCI ATA host
Tejun Heo21b0ad42007-04-17 23:44:07 +0900690 * @pdev: target PCI device
Tejun Heo1626aeb2007-05-04 12:43:58 +0200691 * @ppi: array of port_info, must be enough for two ports
Tejun Heo21b0ad42007-04-17 23:44:07 +0900692 * @r_host: out argument for the initialized ATA host
693 *
694 * Helper to allocate ATA host for @pdev, acquire all native PCI
695 * resources and initialize it accordingly in one go.
696 *
697 * LOCKING:
698 * Inherited from calling layer (may sleep).
699 *
700 * RETURNS:
701 * 0 on success, -errno otherwise.
702 */
Tejun Heod583bc12007-07-04 18:02:07 +0900703int ata_pci_prepare_sff_host(struct pci_dev *pdev,
704 const struct ata_port_info * const * ppi,
705 struct ata_host **r_host)
Tejun Heo21b0ad42007-04-17 23:44:07 +0900706{
707 struct ata_host *host;
Tejun Heo21b0ad42007-04-17 23:44:07 +0900708 int rc;
709
710 if (!devres_open_group(&pdev->dev, NULL, GFP_KERNEL))
711 return -ENOMEM;
712
713 host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2);
714 if (!host) {
715 dev_printk(KERN_ERR, &pdev->dev,
716 "failed to allocate ATA host\n");
717 rc = -ENOMEM;
718 goto err_out;
719 }
720
Tejun Heod583bc12007-07-04 18:02:07 +0900721 rc = ata_pci_init_sff_host(host);
Tejun Heo21b0ad42007-04-17 23:44:07 +0900722 if (rc)
723 goto err_out;
724
725 /* init DMA related stuff */
726 rc = ata_pci_init_bmdma(host);
727 if (rc)
728 goto err_bmdma;
729
730 devres_remove_group(&pdev->dev, NULL);
731 *r_host = host;
732 return 0;
733
734 err_bmdma:
735 /* This is necessary because PCI and iomap resources are
736 * merged and releasing the top group won't release the
737 * acquired resources if some of those have been acquired
738 * before entering this function.
739 */
740 pcim_iounmap_regions(pdev, 0xf);
741 err_out:
742 devres_release_group(&pdev->dev, NULL);
743 return rc;
744}
745
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500746/**
747 * ata_pci_init_one - Initialize/register PCI IDE host controller
748 * @pdev: Controller to be initialized
Tejun Heo1626aeb2007-05-04 12:43:58 +0200749 * @ppi: array of port_info, must be enough for two ports
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500750 *
751 * This is a helper function which can be called from a driver's
752 * xxx_init_one() probe function if the hardware uses traditional
753 * IDE taskfile registers.
754 *
755 * This function calls pci_enable_device(), reserves its register
756 * regions, sets the dma mask, enables bus master mode, and calls
757 * ata_device_add()
758 *
Alan Cox2ec7df02006-08-10 16:59:10 +0900759 * ASSUMPTION:
760 * Nobody makes a single channel controller that appears solely as
761 * the secondary legacy port on PCI.
762 *
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500763 * LOCKING:
764 * Inherited from PCI layer (may sleep).
765 *
766 * RETURNS:
767 * Zero on success, negative on errno-based value on error.
768 */
Tejun Heo1626aeb2007-05-04 12:43:58 +0200769int ata_pci_init_one(struct pci_dev *pdev,
770 const struct ata_port_info * const * ppi)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500771{
Tejun Heof0d36ef2007-01-20 16:00:28 +0900772 struct device *dev = &pdev->dev;
Tejun Heo1626aeb2007-05-04 12:43:58 +0200773 const struct ata_port_info *pi = NULL;
Tejun Heo0f834de2007-04-17 23:44:07 +0900774 struct ata_host *host = NULL;
Jeff Garzikc791c302006-09-28 03:40:11 -0400775 u8 mask;
Tejun Heo1626aeb2007-05-04 12:43:58 +0200776 int legacy_mode = 0;
777 int i, rc;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500778
779 DPRINTK("ENTER\n");
780
Tejun Heo1626aeb2007-05-04 12:43:58 +0200781 /* look up the first valid port_info */
782 for (i = 0; i < 2 && ppi[i]; i++) {
783 if (ppi[i]->port_ops != &ata_dummy_port_ops) {
784 pi = ppi[i];
785 break;
786 }
787 }
788
789 if (!pi) {
790 dev_printk(KERN_ERR, &pdev->dev,
791 "no valid port_info specified\n");
792 return -EINVAL;
793 }
794
Tejun Heof0d36ef2007-01-20 16:00:28 +0900795 if (!devres_open_group(dev, NULL, GFP_KERNEL))
796 return -ENOMEM;
797
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500798 /* FIXME: Really for ATA it isn't safe because the device may be
799 multi-purpose and we want to leave it alone if it was already
800 enabled. Secondly for shared use as Arjan says we want refcounting
801
802 Checking dev->is_enabled is insufficient as this is not set at
803 boot for the primary video which is BIOS enabled
Tejun Heod491b272007-04-17 23:44:07 +0900804 */
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500805
Tejun Heof0d36ef2007-01-20 16:00:28 +0900806 rc = pcim_enable_device(pdev);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500807 if (rc)
Tejun Heof0d36ef2007-01-20 16:00:28 +0900808 goto err_out;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500809
Jeff Garzikc791c302006-09-28 03:40:11 -0400810 if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
811 u8 tmp8;
812
813 /* TODO: What if one channel is in native mode ... */
814 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
815 mask = (1 << 2) | (1 << 0);
816 if ((tmp8 & mask) != mask)
Tejun Heo1626aeb2007-05-04 12:43:58 +0200817 legacy_mode = 1;
Alan Cox8eb166b2006-10-16 16:24:50 +0100818#if defined(CONFIG_NO_ATA_LEGACY)
819 /* Some platforms with PCI limits cannot address compat
820 port space. In that case we punt if their firmware has
821 left a device in compatibility mode */
822 if (legacy_mode) {
823 printk(KERN_ERR "ata: Compatibility mode ATA is not supported on this platform, skipping.\n");
Tejun Heof0d36ef2007-01-20 16:00:28 +0900824 rc = -EOPNOTSUPP;
825 goto err_out;
Alan Cox8eb166b2006-10-16 16:24:50 +0100826 }
827#endif
Jeff Garzikc791c302006-09-28 03:40:11 -0400828 }
829
Tejun Heod583bc12007-07-04 18:02:07 +0900830 /* prepare host */
831 rc = ata_pci_prepare_sff_host(pdev, ppi, &host);
832 if (rc)
Tejun Heod491b272007-04-17 23:44:07 +0900833 goto err_out;
Tejun Heod491b272007-04-17 23:44:07 +0900834
Tejun Heod491b272007-04-17 23:44:07 +0900835 pci_set_master(pdev);
836
837 /* start host and request IRQ */
838 rc = ata_host_start(host);
839 if (rc)
840 goto err_out;
841
Tejun Heo40318262007-07-03 01:38:47 +0900842 if (!legacy_mode) {
Tejun Heo1626aeb2007-05-04 12:43:58 +0200843 rc = devm_request_irq(dev, pdev->irq, pi->port_ops->irq_handler,
Tejun Heod491b272007-04-17 23:44:07 +0900844 IRQF_SHARED, DRV_NAME, host);
Tejun Heod583bc12007-07-04 18:02:07 +0900845 if (rc)
846 goto err_out;
Tejun Heo40318262007-07-03 01:38:47 +0900847 host->irq = pdev->irq;
848 } else {
Tejun Heod583bc12007-07-04 18:02:07 +0900849 if (!ata_port_is_dummy(host->ports[0])) {
850 host->irq = ATA_PRIMARY_IRQ(pdev);
851 rc = devm_request_irq(dev, host->irq,
852 pi->port_ops->irq_handler,
853 IRQF_SHARED, DRV_NAME, host);
854 if (rc)
855 goto err_out;
856 }
Tejun Heo0f834de2007-04-17 23:44:07 +0900857
Tejun Heod583bc12007-07-04 18:02:07 +0900858 if (!ata_port_is_dummy(host->ports[1])) {
859 host->irq2 = ATA_SECONDARY_IRQ(pdev);
860 rc = devm_request_irq(dev, host->irq2,
861 pi->port_ops->irq_handler,
862 IRQF_SHARED, DRV_NAME, host);
863 if (rc)
864 goto err_out;
865 }
Jeff Garzikc791c302006-09-28 03:40:11 -0400866 }
Tejun Heod491b272007-04-17 23:44:07 +0900867
868 /* register */
Tejun Heo1626aeb2007-05-04 12:43:58 +0200869 rc = ata_host_register(host, pi->sht);
Tejun Heod491b272007-04-17 23:44:07 +0900870 if (rc)
871 goto err_out;
872
Tejun Heof0d36ef2007-01-20 16:00:28 +0900873 devres_remove_group(dev, NULL);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500874 return 0;
875
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500876err_out:
Tejun Heof0d36ef2007-01-20 16:00:28 +0900877 devres_release_group(dev, NULL);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500878 return rc;
879}
880
Alan Coxd33d44f2006-03-21 15:59:57 +0000881/**
882 * ata_pci_clear_simplex - attempt to kick device out of simplex
883 * @pdev: PCI device
884 *
885 * Some PCI ATA devices report simplex mode but in fact can be told to
Jeff Garzik2e9edbf2006-03-24 09:56:57 -0500886 * enter non simplex mode. This implements the neccessary logic to
Alan Coxd33d44f2006-03-21 15:59:57 +0000887 * perform the task on such devices. Calling it on other devices will
888 * have -undefined- behaviour.
889 */
890
891int ata_pci_clear_simplex(struct pci_dev *pdev)
892{
893 unsigned long bmdma = pci_resource_start(pdev, 4);
894 u8 simplex;
895
896 if (bmdma == 0)
897 return -ENOENT;
898
899 simplex = inb(bmdma + 0x02);
900 outb(simplex & 0x60, bmdma + 0x02);
901 simplex = inb(bmdma + 0x02);
902 if (simplex & 0x80)
903 return -EOPNOTSUPP;
904 return 0;
905}
906
Alan Coxa76b62c2007-03-09 09:34:07 -0500907unsigned long ata_pci_default_filter(struct ata_device *adev, unsigned long xfer_mask)
Alan Coxd33d44f2006-03-21 15:59:57 +0000908{
909 /* Filter out DMA modes if the device has been configured by
910 the BIOS as PIO only */
Jeff Garzik2e9edbf2006-03-24 09:56:57 -0500911
Alan Coxa76b62c2007-03-09 09:34:07 -0500912 if (adev->ap->ioaddr.bmdma_addr == 0)
Alan Coxd33d44f2006-03-21 15:59:57 +0000913 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
914 return xfer_mask;
915}
916
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500917#endif /* CONFIG_PCI */
918