Daniel Walker | 2682fd3 | 2010-02-24 15:47:58 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2007 Google, Inc. |
| 3 | * Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. |
| 4 | * Author: Brian Swetland <swetland@google.com> |
| 5 | * |
| 6 | * This software is licensed under the terms of the GNU General Public |
| 7 | * License version 2, as published by the Free Software Foundation, and |
| 8 | * may be copied, distributed, and modified under those terms. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | */ |
| 16 | |
| 17 | #include <linux/kernel.h> |
| 18 | #include <linux/init.h> |
| 19 | #include <linux/platform_device.h> |
| 20 | #include <linux/input.h> |
| 21 | #include <linux/io.h> |
| 22 | #include <linux/delay.h> |
Daniel Walker | 2682fd3 | 2010-02-24 15:47:58 -0800 | [diff] [blame] | 23 | #include <linux/power_supply.h> |
| 24 | |
| 25 | #include <mach/hardware.h> |
| 26 | #include <asm/mach-types.h> |
| 27 | #include <asm/mach/arch.h> |
| 28 | #include <asm/mach/map.h> |
| 29 | #include <asm/mach/flash.h> |
| 30 | #include <asm/setup.h> |
| 31 | #ifdef CONFIG_CACHE_L2X0 |
| 32 | #include <asm/hardware/cache-l2x0.h> |
| 33 | #endif |
| 34 | |
| 35 | #include <mach/vreg.h> |
| 36 | #include <mach/mpp.h> |
| 37 | #include <mach/gpio.h> |
| 38 | #include <mach/board.h> |
| 39 | #include <mach/msm_iomap.h> |
| 40 | |
| 41 | #include <linux/mtd/nand.h> |
| 42 | #include <linux/mtd/partitions.h> |
| 43 | |
| 44 | #include "devices.h" |
| 45 | #include "socinfo.h" |
| 46 | #include "clock.h" |
| 47 | |
| 48 | static struct resource smc91x_resources[] = { |
| 49 | [0] = { |
| 50 | .start = 0x9C004300, |
| 51 | .end = 0x9C0043ff, |
| 52 | .flags = IORESOURCE_MEM, |
| 53 | }, |
| 54 | [1] = { |
| 55 | .start = MSM_GPIO_TO_INT(132), |
| 56 | .end = MSM_GPIO_TO_INT(132), |
| 57 | .flags = IORESOURCE_IRQ, |
| 58 | }, |
| 59 | }; |
| 60 | |
| 61 | static struct platform_device smc91x_device = { |
| 62 | .name = "smc91x", |
| 63 | .id = 0, |
| 64 | .num_resources = ARRAY_SIZE(smc91x_resources), |
| 65 | .resource = smc91x_resources, |
| 66 | }; |
| 67 | |
| 68 | static struct platform_device *devices[] __initdata = { |
| 69 | &msm_device_uart3, |
| 70 | &msm_device_smd, |
| 71 | &msm_device_dmov, |
| 72 | &msm_device_nand, |
| 73 | &smc91x_device, |
| 74 | }; |
| 75 | |
| 76 | extern struct sys_timer msm_timer; |
| 77 | |
| 78 | static void __init msm7x2x_init_irq(void) |
| 79 | { |
| 80 | msm_init_irq(); |
| 81 | } |
| 82 | |
| 83 | static void __init msm7x2x_init(void) |
| 84 | { |
| 85 | if (socinfo_init() < 0) |
| 86 | BUG(); |
| 87 | |
| 88 | if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa()) { |
| 89 | smc91x_resources[0].start = 0x98000300; |
| 90 | smc91x_resources[0].end = 0x980003ff; |
| 91 | smc91x_resources[1].start = MSM_GPIO_TO_INT(85); |
| 92 | smc91x_resources[1].end = MSM_GPIO_TO_INT(85); |
| 93 | if (gpio_tlmm_config(GPIO_CFG(85, 0, |
| 94 | GPIO_INPUT, |
| 95 | GPIO_PULL_DOWN, |
| 96 | GPIO_2MA), |
| 97 | GPIO_ENABLE)) { |
| 98 | printk(KERN_ERR |
| 99 | "%s: Err: Config GPIO-85 INT\n", |
| 100 | __func__); |
| 101 | } |
| 102 | } |
| 103 | |
| 104 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
| 105 | } |
| 106 | |
| 107 | static void __init msm7x2x_map_io(void) |
| 108 | { |
| 109 | msm_map_common_io(); |
| 110 | /* Technically dependent on the SoC but using machine_is |
| 111 | * macros since socinfo is not available this early and there |
| 112 | * are plans to restructure the code which will eliminate the |
| 113 | * need for socinfo. |
| 114 | */ |
| 115 | if (machine_is_msm7x27_surf() || machine_is_msm7x27_ffa()) |
| 116 | msm_clock_init(msm_clocks_7x27, msm_num_clocks_7x27); |
| 117 | |
| 118 | if (machine_is_msm7x25_surf() || machine_is_msm7x25_ffa()) |
| 119 | msm_clock_init(msm_clocks_7x25, msm_num_clocks_7x25); |
| 120 | |
| 121 | #ifdef CONFIG_CACHE_L2X0 |
| 122 | if (machine_is_msm7x27_surf() || machine_is_msm7x27_ffa()) { |
| 123 | /* 7x27 has 256KB L2 cache: |
| 124 | 64Kb/Way and 4-Way Associativity; |
| 125 | R/W latency: 3 cycles; |
| 126 | evmon/parity/share disabled. */ |
| 127 | l2x0_init(MSM_L2CC_BASE, 0x00068012, 0xfe000000); |
| 128 | } |
| 129 | #endif |
| 130 | } |
| 131 | |
| 132 | MACHINE_START(MSM7X27_SURF, "QCT MSM7x27 SURF") |
Nicolas Pitre | f631dd4 | 2011-07-05 22:38:14 -0400 | [diff] [blame^] | 133 | .atag_offset = 0x100, |
Daniel Walker | 2682fd3 | 2010-02-24 15:47:58 -0800 | [diff] [blame] | 134 | .map_io = msm7x2x_map_io, |
| 135 | .init_irq = msm7x2x_init_irq, |
| 136 | .init_machine = msm7x2x_init, |
| 137 | .timer = &msm_timer, |
| 138 | MACHINE_END |
| 139 | |
| 140 | MACHINE_START(MSM7X27_FFA, "QCT MSM7x27 FFA") |
Nicolas Pitre | f631dd4 | 2011-07-05 22:38:14 -0400 | [diff] [blame^] | 141 | .atag_offset = 0x100, |
Daniel Walker | 2682fd3 | 2010-02-24 15:47:58 -0800 | [diff] [blame] | 142 | .map_io = msm7x2x_map_io, |
| 143 | .init_irq = msm7x2x_init_irq, |
| 144 | .init_machine = msm7x2x_init, |
| 145 | .timer = &msm_timer, |
| 146 | MACHINE_END |
| 147 | |
| 148 | MACHINE_START(MSM7X25_SURF, "QCT MSM7x25 SURF") |
Nicolas Pitre | f631dd4 | 2011-07-05 22:38:14 -0400 | [diff] [blame^] | 149 | .atag_offset = 0x100, |
Daniel Walker | 2682fd3 | 2010-02-24 15:47:58 -0800 | [diff] [blame] | 150 | .map_io = msm7x2x_map_io, |
| 151 | .init_irq = msm7x2x_init_irq, |
| 152 | .init_machine = msm7x2x_init, |
| 153 | .timer = &msm_timer, |
| 154 | MACHINE_END |
| 155 | |
| 156 | MACHINE_START(MSM7X25_FFA, "QCT MSM7x25 FFA") |
Nicolas Pitre | f631dd4 | 2011-07-05 22:38:14 -0400 | [diff] [blame^] | 157 | .atag_offset = 0x100, |
Daniel Walker | 2682fd3 | 2010-02-24 15:47:58 -0800 | [diff] [blame] | 158 | .map_io = msm7x2x_map_io, |
| 159 | .init_irq = msm7x2x_init_irq, |
| 160 | .init_machine = msm7x2x_init, |
| 161 | .timer = &msm_timer, |
| 162 | MACHINE_END |