blob: 558ccfb8d45803b3c3f68cadea2cfdc7e5e69440 [file] [log] [blame]
Barry Song156a0992012-08-23 13:41:58 +08001if ARCH_SIRF
2
3menu "CSR SiRF primaII/Marco/Polo Specific Features"
4
5config ARCH_PRIMA2
6 bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
7 default y
8 select CPU_V7
Barry Songc1e3c112012-08-23 13:41:59 +08009 select SIRF_IRQ
Russell Kingb1b3f492012-10-06 17:12:25 +010010 select ZONE_DMA
Barry Song156a0992012-08-23 13:41:58 +080011 help
12 Support for CSR SiRFSoC ARM Cortex A9 Platform
13
14endmenu
15
Barry Songc1e3c112012-08-23 13:41:59 +080016config SIRF_IRQ
17 bool
18
Barry Song156a0992012-08-23 13:41:58 +080019endif