blob: 4cbf89dda733106fe3f063b2ce4bb5f8bd3edf2e [file] [log] [blame]
Daniel Walker62a6cc52010-05-05 07:27:16 -07001/*
2 * Copyright (C) 2008 Google, Inc.
3 * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/platform_device.h>
18
19#include <linux/dma-mapping.h>
20#include <mach/irqs.h>
21#include <mach/msm_iomap.h>
22#include <mach/dma.h>
23#include <mach/board.h>
24
25#include "devices.h"
26
27#include <asm/mach/flash.h>
28
29#include <mach/mmc.h>
Stephen Boydce1c80f2011-01-26 16:20:53 -080030#include "clock-pcom.h"
Daniel Walker62a6cc52010-05-05 07:27:16 -070031
32static struct resource resources_uart3[] = {
33 {
34 .start = INT_UART3,
35 .end = INT_UART3,
36 .flags = IORESOURCE_IRQ,
37 },
38 {
39 .start = MSM_UART3_PHYS,
40 .end = MSM_UART3_PHYS + MSM_UART3_SIZE - 1,
41 .flags = IORESOURCE_MEM,
42 },
43};
44
45struct platform_device msm_device_uart3 = {
46 .name = "msm_serial",
47 .id = 2,
48 .num_resources = ARRAY_SIZE(resources_uart3),
49 .resource = resources_uart3,
50};
51
Niranjana Vishwanathapura88b52272010-10-06 13:52:11 -070052struct platform_device msm_device_smd = {
53 .name = "msm_smd",
54 .id = -1,
55};
56
Pavankumar Kondeti7032d512010-12-08 13:37:07 +053057static struct resource resources_otg[] = {
58 {
59 .start = MSM_HSUSB_PHYS,
60 .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
61 .flags = IORESOURCE_MEM,
62 },
63 {
64 .start = INT_USB_HS,
65 .end = INT_USB_HS,
66 .flags = IORESOURCE_IRQ,
67 },
68};
69
70struct platform_device msm_device_otg = {
71 .name = "msm_otg",
72 .id = -1,
73 .num_resources = ARRAY_SIZE(resources_otg),
74 .resource = resources_otg,
75 .dev = {
76 .coherent_dma_mask = 0xffffffff,
77 },
78};
79
80static struct resource resources_hsusb[] = {
81 {
82 .start = MSM_HSUSB_PHYS,
83 .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
84 .flags = IORESOURCE_MEM,
85 },
86 {
87 .start = INT_USB_HS,
88 .end = INT_USB_HS,
89 .flags = IORESOURCE_IRQ,
90 },
91};
92
93struct platform_device msm_device_hsusb = {
94 .name = "msm_hsusb",
95 .id = -1,
96 .num_resources = ARRAY_SIZE(resources_hsusb),
97 .resource = resources_hsusb,
98 .dev = {
99 .coherent_dma_mask = 0xffffffff,
100 },
101};
102
103static u64 dma_mask = 0xffffffffULL;
104static struct resource resources_hsusb_host[] = {
105 {
106 .start = MSM_HSUSB_PHYS,
107 .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
108 .flags = IORESOURCE_MEM,
109 },
110 {
111 .start = INT_USB_HS,
112 .end = INT_USB_HS,
113 .flags = IORESOURCE_IRQ,
114 },
115};
116
117struct platform_device msm_device_hsusb_host = {
118 .name = "msm_hsusb_host",
119 .id = -1,
120 .num_resources = ARRAY_SIZE(resources_hsusb_host),
121 .resource = resources_hsusb_host,
122 .dev = {
123 .dma_mask = &dma_mask,
124 .coherent_dma_mask = 0xffffffffULL,
125 },
126};
127
Daniel Walker62a6cc52010-05-05 07:27:16 -0700128struct clk msm_clocks_8x50[] = {
129 CLK_PCOM("adm_clk", ADM_CLK, NULL, 0),
Stephen Boydf689ac92011-01-26 16:20:56 -0800130 CLK_PCOM("ce_clk", CE_CLK, NULL, 0),
Daniel Walker62a6cc52010-05-05 07:27:16 -0700131 CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, CLK_MIN),
132 CLK_PCOM("ebi2_clk", EBI2_CLK, NULL, 0),
133 CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0),
134 CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF | CLK_MINMAX),
135 CLK_PCOM("gp_clk", GP_CLK, NULL, 0),
136 CLK_PCOM("grp_clk", GRP_3D_CLK, NULL, 0),
Stephen Boydf689ac92011-01-26 16:20:56 -0800137 CLK_PCOM("i2c_clk", I2C_CLK, NULL, 0),
Daniel Walker62a6cc52010-05-05 07:27:16 -0700138 CLK_PCOM("icodec_rx_clk", ICODEC_RX_CLK, NULL, 0),
139 CLK_PCOM("icodec_tx_clk", ICODEC_TX_CLK, NULL, 0),
140 CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF),
141 CLK_PCOM("mdc_clk", MDC_CLK, NULL, 0),
142 CLK_PCOM("mddi_clk", PMDH_CLK, NULL, OFF | CLK_MINMAX),
143 CLK_PCOM("mdp_clk", MDP_CLK, NULL, OFF),
144 CLK_PCOM("mdp_lcdc_pclk_clk", MDP_LCDC_PCLK_CLK, NULL, 0),
145 CLK_PCOM("mdp_lcdc_pad_pclk_clk", MDP_LCDC_PAD_PCLK_CLK, NULL, 0),
146 CLK_PCOM("mdp_vsync_clk", MDP_VSYNC_CLK, NULL, 0),
147 CLK_PCOM("pbus_clk", PBUS_CLK, NULL, CLK_MIN),
148 CLK_PCOM("pcm_clk", PCM_CLK, NULL, 0),
149 CLK_PCOM("sdac_clk", SDAC_CLK, NULL, OFF),
150 CLK_PCOM("spi_clk", SPI_CLK, NULL, 0),
151 CLK_PCOM("tsif_clk", TSIF_CLK, NULL, 0),
152 CLK_PCOM("tsif_ref_clk", TSIF_REF_CLK, NULL, 0),
153 CLK_PCOM("tv_dac_clk", TV_DAC_CLK, NULL, 0),
154 CLK_PCOM("tv_enc_clk", TV_ENC_CLK, NULL, 0),
Stephen Boydf689ac92011-01-26 16:20:56 -0800155 CLK_PCOM("uart_clk", UART1_CLK, NULL, OFF),
156 CLK_PCOM("uart_clk", UART2_CLK, NULL, 0),
Daniel Walker62a6cc52010-05-05 07:27:16 -0700157 CLK_PCOM("uart_clk", UART3_CLK, &msm_device_uart3.dev, OFF),
Stephen Boydf689ac92011-01-26 16:20:56 -0800158 CLK_PCOM("uartdm_clk", UART1DM_CLK, NULL, OFF),
159 CLK_PCOM("uartdm_clk", UART2DM_CLK, NULL, 0),
Daniel Walker62a6cc52010-05-05 07:27:16 -0700160 CLK_PCOM("usb_hs_clk", USB_HS_CLK, NULL, OFF),
161 CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, NULL, OFF),
162 CLK_PCOM("usb_otg_clk", USB_OTG_CLK, NULL, 0),
163 CLK_PCOM("vdc_clk", VDC_CLK, NULL, OFF | CLK_MIN),
164 CLK_PCOM("vfe_clk", VFE_CLK, NULL, OFF),
165 CLK_PCOM("vfe_mdc_clk", VFE_MDC_CLK, NULL, OFF),
166 CLK_PCOM("vfe_axi_clk", VFE_AXI_CLK, NULL, OFF),
167 CLK_PCOM("usb_hs2_clk", USB_HS2_CLK, NULL, OFF),
168 CLK_PCOM("usb_hs2_pclk", USB_HS2_P_CLK, NULL, OFF),
169 CLK_PCOM("usb_hs3_clk", USB_HS3_CLK, NULL, OFF),
170 CLK_PCOM("usb_hs3_pclk", USB_HS3_P_CLK, NULL, OFF),
171 CLK_PCOM("usb_phy_clk", USB_PHY_CLK, NULL, 0),
172};
173
174unsigned msm_num_clocks_8x50 = ARRAY_SIZE(msm_clocks_8x50);
175