David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is subject to the terms and conditions of the GNU General Public |
| 3 | * License. See the file "COPYING" in the main directory of this archive |
| 4 | * for more details. |
| 5 | * |
| 6 | * Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com> |
| 7 | * Copyright (C) 2000, 2001 Ralf Baechle <ralf@gnu.org> |
| 8 | * Copyright (C) 2005 Ilya A. Volynets-Evenbakh <ilya@total-knowledge.com> |
| 9 | * swiped from i386, and cloned for MIPS by Geert, polished by Ralf. |
| 10 | * IP32 changes by Ilya. |
David Daney | b93b2ab | 2010-10-01 13:27:34 -0700 | [diff] [blame] | 11 | * Copyright (C) 2010 Cavium Networks, Inc. |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 12 | */ |
David Daney | e8635b4 | 2009-04-23 17:44:38 -0700 | [diff] [blame] | 13 | #include <linux/dma-mapping.h> |
David Daney | e8635b4 | 2009-04-23 17:44:38 -0700 | [diff] [blame] | 14 | #include <linux/scatterlist.h> |
David Daney | b93b2ab | 2010-10-01 13:27:34 -0700 | [diff] [blame] | 15 | #include <linux/bootmem.h> |
Paul Gortmaker | cae39d1 | 2011-07-28 18:46:31 -0400 | [diff] [blame] | 16 | #include <linux/export.h> |
David Daney | b93b2ab | 2010-10-01 13:27:34 -0700 | [diff] [blame] | 17 | #include <linux/swiotlb.h> |
| 18 | #include <linux/types.h> |
| 19 | #include <linux/init.h> |
| 20 | #include <linux/mm.h> |
David Daney | e8635b4 | 2009-04-23 17:44:38 -0700 | [diff] [blame] | 21 | |
David Daney | b93b2ab | 2010-10-01 13:27:34 -0700 | [diff] [blame] | 22 | #include <asm/bootinfo.h> |
David Daney | e8635b4 | 2009-04-23 17:44:38 -0700 | [diff] [blame] | 23 | |
| 24 | #include <asm/octeon/octeon.h> |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 25 | |
David Daney | e8635b4 | 2009-04-23 17:44:38 -0700 | [diff] [blame] | 26 | #ifdef CONFIG_PCI |
David Daney | 01a6221 | 2009-06-29 17:18:51 -0700 | [diff] [blame] | 27 | #include <asm/octeon/pci-octeon.h> |
David Daney | b93b2ab | 2010-10-01 13:27:34 -0700 | [diff] [blame] | 28 | #include <asm/octeon/cvmx-npi-defs.h> |
| 29 | #include <asm/octeon/cvmx-pci-defs.h> |
David Daney | e8635b4 | 2009-04-23 17:44:38 -0700 | [diff] [blame] | 30 | |
David Daney | b93b2ab | 2010-10-01 13:27:34 -0700 | [diff] [blame] | 31 | static dma_addr_t octeon_hole_phys_to_dma(phys_addr_t paddr) |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 32 | { |
David Daney | b93b2ab | 2010-10-01 13:27:34 -0700 | [diff] [blame] | 33 | if (paddr >= CVMX_PCIE_BAR1_PHYS_BASE && paddr < (CVMX_PCIE_BAR1_PHYS_BASE + CVMX_PCIE_BAR1_PHYS_SIZE)) |
| 34 | return paddr - CVMX_PCIE_BAR1_PHYS_BASE + CVMX_PCIE_BAR1_RC_BASE; |
David Daney | e8635b4 | 2009-04-23 17:44:38 -0700 | [diff] [blame] | 35 | else |
David Daney | b93b2ab | 2010-10-01 13:27:34 -0700 | [diff] [blame] | 36 | return paddr; |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 37 | } |
| 38 | |
David Daney | b93b2ab | 2010-10-01 13:27:34 -0700 | [diff] [blame] | 39 | static phys_addr_t octeon_hole_dma_to_phys(dma_addr_t daddr) |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 40 | { |
David Daney | b93b2ab | 2010-10-01 13:27:34 -0700 | [diff] [blame] | 41 | if (daddr >= CVMX_PCIE_BAR1_RC_BASE) |
| 42 | return daddr + CVMX_PCIE_BAR1_PHYS_BASE - CVMX_PCIE_BAR1_RC_BASE; |
| 43 | else |
| 44 | return daddr; |
| 45 | } |
David Daney | e8635b4 | 2009-04-23 17:44:38 -0700 | [diff] [blame] | 46 | |
David Daney | b93b2ab | 2010-10-01 13:27:34 -0700 | [diff] [blame] | 47 | static dma_addr_t octeon_gen1_phys_to_dma(struct device *dev, phys_addr_t paddr) |
| 48 | { |
| 49 | if (paddr >= 0x410000000ull && paddr < 0x420000000ull) |
| 50 | paddr -= 0x400000000ull; |
| 51 | return octeon_hole_phys_to_dma(paddr); |
| 52 | } |
| 53 | |
| 54 | static phys_addr_t octeon_gen1_dma_to_phys(struct device *dev, dma_addr_t daddr) |
| 55 | { |
| 56 | daddr = octeon_hole_dma_to_phys(daddr); |
| 57 | |
| 58 | if (daddr >= 0x10000000ull && daddr < 0x20000000ull) |
| 59 | daddr += 0x400000000ull; |
| 60 | |
| 61 | return daddr; |
| 62 | } |
| 63 | |
| 64 | static dma_addr_t octeon_big_phys_to_dma(struct device *dev, phys_addr_t paddr) |
| 65 | { |
| 66 | if (paddr >= 0x410000000ull && paddr < 0x420000000ull) |
| 67 | paddr -= 0x400000000ull; |
| 68 | |
| 69 | /* Anything in the BAR1 hole or above goes via BAR2 */ |
| 70 | if (paddr >= 0xf0000000ull) |
| 71 | paddr = OCTEON_BAR2_PCI_ADDRESS + paddr; |
| 72 | |
| 73 | return paddr; |
| 74 | } |
| 75 | |
| 76 | static phys_addr_t octeon_big_dma_to_phys(struct device *dev, dma_addr_t daddr) |
| 77 | { |
| 78 | if (daddr >= OCTEON_BAR2_PCI_ADDRESS) |
| 79 | daddr -= OCTEON_BAR2_PCI_ADDRESS; |
| 80 | |
| 81 | if (daddr >= 0x10000000ull && daddr < 0x20000000ull) |
| 82 | daddr += 0x400000000ull; |
| 83 | return daddr; |
| 84 | } |
| 85 | |
| 86 | static dma_addr_t octeon_small_phys_to_dma(struct device *dev, |
| 87 | phys_addr_t paddr) |
| 88 | { |
| 89 | if (paddr >= 0x410000000ull && paddr < 0x420000000ull) |
| 90 | paddr -= 0x400000000ull; |
| 91 | |
| 92 | /* Anything not in the BAR1 range goes via BAR2 */ |
| 93 | if (paddr >= octeon_bar1_pci_phys && paddr < octeon_bar1_pci_phys + 0x8000000ull) |
| 94 | paddr = paddr - octeon_bar1_pci_phys; |
| 95 | else |
| 96 | paddr = OCTEON_BAR2_PCI_ADDRESS + paddr; |
| 97 | |
| 98 | return paddr; |
| 99 | } |
| 100 | |
| 101 | static phys_addr_t octeon_small_dma_to_phys(struct device *dev, |
| 102 | dma_addr_t daddr) |
| 103 | { |
| 104 | if (daddr >= OCTEON_BAR2_PCI_ADDRESS) |
| 105 | daddr -= OCTEON_BAR2_PCI_ADDRESS; |
| 106 | else |
| 107 | daddr += octeon_bar1_pci_phys; |
| 108 | |
| 109 | if (daddr >= 0x10000000ull && daddr < 0x20000000ull) |
| 110 | daddr += 0x400000000ull; |
| 111 | return daddr; |
| 112 | } |
| 113 | |
| 114 | #endif /* CONFIG_PCI */ |
| 115 | |
| 116 | static dma_addr_t octeon_dma_map_page(struct device *dev, struct page *page, |
| 117 | unsigned long offset, size_t size, enum dma_data_direction direction, |
| 118 | struct dma_attrs *attrs) |
| 119 | { |
| 120 | dma_addr_t daddr = swiotlb_map_page(dev, page, offset, size, |
| 121 | direction, attrs); |
| 122 | mb(); |
| 123 | |
| 124 | return daddr; |
| 125 | } |
| 126 | |
| 127 | static int octeon_dma_map_sg(struct device *dev, struct scatterlist *sg, |
| 128 | int nents, enum dma_data_direction direction, struct dma_attrs *attrs) |
| 129 | { |
| 130 | int r = swiotlb_map_sg_attrs(dev, sg, nents, direction, attrs); |
| 131 | mb(); |
| 132 | return r; |
| 133 | } |
| 134 | |
| 135 | static void octeon_dma_sync_single_for_device(struct device *dev, |
| 136 | dma_addr_t dma_handle, size_t size, enum dma_data_direction direction) |
| 137 | { |
| 138 | swiotlb_sync_single_for_device(dev, dma_handle, size, direction); |
| 139 | mb(); |
| 140 | } |
| 141 | |
| 142 | static void octeon_dma_sync_sg_for_device(struct device *dev, |
| 143 | struct scatterlist *sg, int nelems, enum dma_data_direction direction) |
| 144 | { |
| 145 | swiotlb_sync_sg_for_device(dev, sg, nelems, direction); |
| 146 | mb(); |
| 147 | } |
| 148 | |
| 149 | static void *octeon_dma_alloc_coherent(struct device *dev, size_t size, |
| 150 | dma_addr_t *dma_handle, gfp_t gfp) |
| 151 | { |
| 152 | void *ret; |
| 153 | |
| 154 | if (dma_alloc_from_coherent(dev, size, dma_handle, &ret)) |
| 155 | return ret; |
| 156 | |
| 157 | /* ignore region specifiers */ |
| 158 | gfp &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM); |
| 159 | |
| 160 | #ifdef CONFIG_ZONE_DMA |
| 161 | if (dev == NULL) |
| 162 | gfp |= __GFP_DMA; |
| 163 | else if (dev->coherent_dma_mask <= DMA_BIT_MASK(24)) |
| 164 | gfp |= __GFP_DMA; |
| 165 | else |
| 166 | #endif |
| 167 | #ifdef CONFIG_ZONE_DMA32 |
| 168 | if (dev->coherent_dma_mask <= DMA_BIT_MASK(32)) |
| 169 | gfp |= __GFP_DMA32; |
| 170 | else |
| 171 | #endif |
| 172 | ; |
| 173 | |
| 174 | /* Don't invoke OOM killer */ |
| 175 | gfp |= __GFP_NORETRY; |
| 176 | |
| 177 | ret = swiotlb_alloc_coherent(dev, size, dma_handle, gfp); |
| 178 | |
| 179 | mb(); |
| 180 | |
| 181 | return ret; |
| 182 | } |
| 183 | |
| 184 | static void octeon_dma_free_coherent(struct device *dev, size_t size, |
| 185 | void *vaddr, dma_addr_t dma_handle) |
| 186 | { |
| 187 | int order = get_order(size); |
| 188 | |
| 189 | if (dma_release_from_coherent(dev, order, vaddr)) |
David Daney | e8635b4 | 2009-04-23 17:44:38 -0700 | [diff] [blame] | 190 | return; |
| 191 | |
David Daney | b93b2ab | 2010-10-01 13:27:34 -0700 | [diff] [blame] | 192 | swiotlb_free_coherent(dev, size, vaddr, dma_handle); |
| 193 | } |
David Daney | e8635b4 | 2009-04-23 17:44:38 -0700 | [diff] [blame] | 194 | |
David Daney | b93b2ab | 2010-10-01 13:27:34 -0700 | [diff] [blame] | 195 | static dma_addr_t octeon_unity_phys_to_dma(struct device *dev, phys_addr_t paddr) |
| 196 | { |
| 197 | return paddr; |
| 198 | } |
David Daney | e8635b4 | 2009-04-23 17:44:38 -0700 | [diff] [blame] | 199 | |
David Daney | b93b2ab | 2010-10-01 13:27:34 -0700 | [diff] [blame] | 200 | static phys_addr_t octeon_unity_dma_to_phys(struct device *dev, dma_addr_t daddr) |
| 201 | { |
| 202 | return daddr; |
| 203 | } |
David Daney | e8635b4 | 2009-04-23 17:44:38 -0700 | [diff] [blame] | 204 | |
David Daney | b93b2ab | 2010-10-01 13:27:34 -0700 | [diff] [blame] | 205 | struct octeon_dma_map_ops { |
| 206 | struct dma_map_ops dma_map_ops; |
| 207 | dma_addr_t (*phys_to_dma)(struct device *dev, phys_addr_t paddr); |
| 208 | phys_addr_t (*dma_to_phys)(struct device *dev, dma_addr_t daddr); |
| 209 | }; |
| 210 | |
| 211 | dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr) |
| 212 | { |
| 213 | struct octeon_dma_map_ops *ops = container_of(get_dma_ops(dev), |
| 214 | struct octeon_dma_map_ops, |
| 215 | dma_map_ops); |
| 216 | |
| 217 | return ops->phys_to_dma(dev, paddr); |
| 218 | } |
| 219 | EXPORT_SYMBOL(phys_to_dma); |
| 220 | |
| 221 | phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr) |
| 222 | { |
| 223 | struct octeon_dma_map_ops *ops = container_of(get_dma_ops(dev), |
| 224 | struct octeon_dma_map_ops, |
| 225 | dma_map_ops); |
| 226 | |
| 227 | return ops->dma_to_phys(dev, daddr); |
| 228 | } |
| 229 | EXPORT_SYMBOL(dma_to_phys); |
| 230 | |
| 231 | static struct octeon_dma_map_ops octeon_linear_dma_map_ops = { |
| 232 | .dma_map_ops = { |
| 233 | .alloc_coherent = octeon_dma_alloc_coherent, |
| 234 | .free_coherent = octeon_dma_free_coherent, |
| 235 | .map_page = octeon_dma_map_page, |
| 236 | .unmap_page = swiotlb_unmap_page, |
| 237 | .map_sg = octeon_dma_map_sg, |
| 238 | .unmap_sg = swiotlb_unmap_sg_attrs, |
| 239 | .sync_single_for_cpu = swiotlb_sync_single_for_cpu, |
| 240 | .sync_single_for_device = octeon_dma_sync_single_for_device, |
| 241 | .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu, |
| 242 | .sync_sg_for_device = octeon_dma_sync_sg_for_device, |
| 243 | .mapping_error = swiotlb_dma_mapping_error, |
| 244 | .dma_supported = swiotlb_dma_supported |
| 245 | }, |
| 246 | .phys_to_dma = octeon_unity_phys_to_dma, |
| 247 | .dma_to_phys = octeon_unity_dma_to_phys |
| 248 | }; |
| 249 | |
| 250 | char *octeon_swiotlb; |
| 251 | |
| 252 | void __init plat_swiotlb_setup(void) |
| 253 | { |
| 254 | int i; |
| 255 | phys_t max_addr; |
| 256 | phys_t addr_size; |
| 257 | size_t swiotlbsize; |
| 258 | unsigned long swiotlb_nslabs; |
| 259 | |
| 260 | max_addr = 0; |
| 261 | addr_size = 0; |
| 262 | |
| 263 | for (i = 0 ; i < boot_mem_map.nr_map; i++) { |
| 264 | struct boot_mem_map_entry *e = &boot_mem_map.map[i]; |
| 265 | if (e->type != BOOT_MEM_RAM) |
| 266 | continue; |
| 267 | |
| 268 | /* These addresses map low for PCI. */ |
| 269 | if (e->addr > 0x410000000ull) |
| 270 | continue; |
| 271 | |
| 272 | addr_size += e->size; |
| 273 | |
| 274 | if (max_addr < e->addr + e->size) |
| 275 | max_addr = e->addr + e->size; |
| 276 | |
David Daney | e8635b4 | 2009-04-23 17:44:38 -0700 | [diff] [blame] | 277 | } |
| 278 | |
David Daney | b93b2ab | 2010-10-01 13:27:34 -0700 | [diff] [blame] | 279 | swiotlbsize = PAGE_SIZE; |
David Daney | e8635b4 | 2009-04-23 17:44:38 -0700 | [diff] [blame] | 280 | |
David Daney | b93b2ab | 2010-10-01 13:27:34 -0700 | [diff] [blame] | 281 | #ifdef CONFIG_PCI |
| 282 | /* |
| 283 | * For OCTEON_DMA_BAR_TYPE_SMALL, size the iotlb at 1/4 memory |
| 284 | * size to a maximum of 64MB |
| 285 | */ |
| 286 | if (OCTEON_IS_MODEL(OCTEON_CN31XX) |
| 287 | || OCTEON_IS_MODEL(OCTEON_CN38XX_PASS2)) { |
| 288 | swiotlbsize = addr_size / 4; |
| 289 | if (swiotlbsize > 64 * (1<<20)) |
| 290 | swiotlbsize = 64 * (1<<20); |
| 291 | } else if (max_addr > 0xf0000000ul) { |
| 292 | /* |
| 293 | * Otherwise only allocate a big iotlb if there is |
| 294 | * memory past the BAR1 hole. |
| 295 | */ |
| 296 | swiotlbsize = 64 * (1<<20); |
| 297 | } |
David Daney | e8635b4 | 2009-04-23 17:44:38 -0700 | [diff] [blame] | 298 | #endif |
David Daney | b93b2ab | 2010-10-01 13:27:34 -0700 | [diff] [blame] | 299 | swiotlb_nslabs = swiotlbsize >> IO_TLB_SHIFT; |
| 300 | swiotlb_nslabs = ALIGN(swiotlb_nslabs, IO_TLB_SEGSIZE); |
| 301 | swiotlbsize = swiotlb_nslabs << IO_TLB_SHIFT; |
| 302 | |
| 303 | octeon_swiotlb = alloc_bootmem_low_pages(swiotlbsize); |
| 304 | |
| 305 | swiotlb_init_with_tbl(octeon_swiotlb, swiotlb_nslabs, 1); |
| 306 | |
| 307 | mips_dma_map_ops = &octeon_linear_dma_map_ops.dma_map_ops; |
David Daney | 5b3b168 | 2009-01-08 16:46:40 -0800 | [diff] [blame] | 308 | } |
David Daney | b93b2ab | 2010-10-01 13:27:34 -0700 | [diff] [blame] | 309 | |
| 310 | #ifdef CONFIG_PCI |
| 311 | static struct octeon_dma_map_ops _octeon_pci_dma_map_ops = { |
| 312 | .dma_map_ops = { |
| 313 | .alloc_coherent = octeon_dma_alloc_coherent, |
| 314 | .free_coherent = octeon_dma_free_coherent, |
| 315 | .map_page = octeon_dma_map_page, |
| 316 | .unmap_page = swiotlb_unmap_page, |
| 317 | .map_sg = octeon_dma_map_sg, |
| 318 | .unmap_sg = swiotlb_unmap_sg_attrs, |
| 319 | .sync_single_for_cpu = swiotlb_sync_single_for_cpu, |
| 320 | .sync_single_for_device = octeon_dma_sync_single_for_device, |
| 321 | .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu, |
| 322 | .sync_sg_for_device = octeon_dma_sync_sg_for_device, |
| 323 | .mapping_error = swiotlb_dma_mapping_error, |
| 324 | .dma_supported = swiotlb_dma_supported |
| 325 | }, |
| 326 | }; |
| 327 | |
| 328 | struct dma_map_ops *octeon_pci_dma_map_ops; |
| 329 | |
| 330 | void __init octeon_pci_dma_init(void) |
| 331 | { |
| 332 | switch (octeon_dma_bar_type) { |
| 333 | case OCTEON_DMA_BAR_TYPE_PCIE: |
| 334 | _octeon_pci_dma_map_ops.phys_to_dma = octeon_gen1_phys_to_dma; |
| 335 | _octeon_pci_dma_map_ops.dma_to_phys = octeon_gen1_dma_to_phys; |
| 336 | break; |
| 337 | case OCTEON_DMA_BAR_TYPE_BIG: |
| 338 | _octeon_pci_dma_map_ops.phys_to_dma = octeon_big_phys_to_dma; |
| 339 | _octeon_pci_dma_map_ops.dma_to_phys = octeon_big_dma_to_phys; |
| 340 | break; |
| 341 | case OCTEON_DMA_BAR_TYPE_SMALL: |
| 342 | _octeon_pci_dma_map_ops.phys_to_dma = octeon_small_phys_to_dma; |
| 343 | _octeon_pci_dma_map_ops.dma_to_phys = octeon_small_dma_to_phys; |
| 344 | break; |
| 345 | default: |
| 346 | BUG(); |
| 347 | } |
| 348 | octeon_pci_dma_map_ops = &_octeon_pci_dma_map_ops.dma_map_ops; |
| 349 | } |
| 350 | #endif /* CONFIG_PCI */ |