| Robin Getz | f16295e | 2007-08-03 18:07:17 +0800 | [diff] [blame] | 1 | /* |
| 2 | * File: arch/blackfin/mach-common/arch_checks.c |
| 3 | * Based on: |
| 4 | * Author: Robin Getz <rgetz@blackfin.uclinux.org> |
| 5 | * |
| 6 | * Created: 25Jul07 |
| 7 | * Description: Do some checking to make sure things are OK |
| 8 | * |
| 9 | * Modified: |
| 10 | * Copyright 2004-2007 Analog Devices Inc. |
| 11 | * |
| 12 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
| 13 | * |
| 14 | * This program is free software; you can redistribute it and/or modify |
| 15 | * it under the terms of the GNU General Public License as published by |
| 16 | * the Free Software Foundation; either version 2 of the License, or |
| 17 | * (at your option) any later version. |
| 18 | * |
| 19 | * This program is distributed in the hope that it will be useful, |
| 20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 22 | * GNU General Public License for more details. |
| 23 | * |
| 24 | * You should have received a copy of the GNU General Public License |
| 25 | * along with this program; if not, see the file COPYING, or write |
| 26 | * to the Free Software Foundation, Inc., |
| 27 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 28 | */ |
| 29 | |
| Mike Frysinger | 1375204 | 2008-08-06 17:10:57 +0800 | [diff] [blame] | 30 | #include <asm/fixed_code.h> |
| Bryan Wu | 639f657 | 2008-08-27 10:51:02 +0800 | [diff] [blame] | 31 | #include <mach/anomaly.h> |
| 32 | #include <asm/clocks.h> |
| Robin Getz | f16295e | 2007-08-03 18:07:17 +0800 | [diff] [blame] | 33 | |
| 34 | #ifdef CONFIG_BFIN_KERNEL_CLOCK |
| 35 | |
| 36 | # if (CONFIG_VCO_HZ > CONFIG_MAX_VCO_HZ) |
| 37 | # error "VCO selected is more than maximum value. Please change the VCO multipler" |
| 38 | # endif |
| 39 | |
| 40 | # if (CONFIG_SCLK_HZ > CONFIG_MAX_SCLK_HZ) |
| 41 | # error "Sclk value selected is more than maximum. Please select a proper value for SCLK multiplier" |
| 42 | # endif |
| 43 | |
| 44 | # if (CONFIG_SCLK_HZ < CONFIG_MIN_SCLK_HZ) |
| 45 | # error "Sclk value selected is less than minimum. Please select a proper value for SCLK multiplier" |
| 46 | # endif |
| 47 | |
| 48 | # if (ANOMALY_05000273) && (CONFIG_SCLK_HZ * 2 > CONFIG_CCLK_HZ) |
| 49 | # error "ANOMALY 05000273, please make sure CCLK is at least 2x SCLK" |
| 50 | # endif |
| 51 | |
| 52 | # if (CONFIG_SCLK_HZ > CONFIG_CCLK_HZ) && (CONFIG_SCLK_HZ != CONFIG_CLKIN_HZ) && (CONFIG_CCLK_HZ != CONFIG_CLKIN_HZ) |
| 53 | # error "Please select sclk less than cclk" |
| 54 | # endif |
| 55 | |
| 56 | #endif /* CONFIG_BFIN_KERNEL_CLOCK */ |
| Mike Frysinger | 1375204 | 2008-08-06 17:10:57 +0800 | [diff] [blame] | 57 | |
| 58 | #if CONFIG_BOOT_LOAD < FIXED_CODE_END |
| 59 | # error "The kernel load address must be after the fixed code section" |
| 60 | #endif |
| 61 | |
| 62 | #if (CONFIG_BOOT_LOAD & 0x3) |
| 63 | # error "The kernel load address must be 4 byte aligned" |
| 64 | #endif |