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Gregory CLEMENT45f59842012-11-14 22:51:08 +01001/*
2 * SMP support: Entry point for secondary CPUs
3 *
4 * Copyright (C) 2012 Marvell
5 *
6 * Yehuda Yitschak <yehuday@marvell.com>
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
9 *
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without any
12 * warranty of any kind, whether express or implied.
13 *
14 * This file implements the assembly entry point for secondary CPUs in
15 * an SMP kernel. The only thing we need to do is to add the CPU to
16 * the coherency fabric by writing to 2 registers. Currently the base
17 * register addresses are hard coded due to the early initialisation
18 * problems.
19 */
20
21#include <linux/linkage.h>
22#include <linux/init.h>
23
Gregory CLEMENT45f59842012-11-14 22:51:08 +010024/*
25 * Armada XP specific entry point for secondary CPUs.
26 * We add the CPU to the coherency fabric and then jump to secondary
27 * startup
28 */
29ENTRY(armada_xp_secondary_startup)
Thomas Petazzoni580ff0e2013-06-06 12:24:28 +020030 /* Get coherency fabric base physical address */
31 adr r0, 1f
32 ldr r1, [r0]
33 ldr r0, [r0, r1]
Gregory CLEMENT45f59842012-11-14 22:51:08 +010034
35 /* Read CPU id */
36 mrc p15, 0, r1, c0, c0, 5
37 and r1, r1, #0xF
38
39 /* Add CPU to coherency fabric */
Gregory CLEMENT45f59842012-11-14 22:51:08 +010040 bl ll_set_cpu_coherent
41 b secondary_startup
42
43ENDPROC(armada_xp_secondary_startup)
Thomas Petazzoni580ff0e2013-06-06 12:24:28 +020044
45 .align 2
461:
47 .long coherency_phys_base - .