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Paul Mackerrasf8ef2702005-11-19 20:46:04 +11001#ifndef __ASM_POWERPC_PCI_H
2#define __ASM_POWERPC_PCI_H
Linus Torvalds1da177e2005-04-16 15:20:36 -07003#ifdef __KERNEL__
4
5/*
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <linux/types.h>
13#include <linux/slab.h>
14#include <linux/string.h>
15#include <linux/dma-mapping.h>
16
17#include <asm/machdep.h>
18#include <asm/scatterlist.h>
19#include <asm/io.h>
20#include <asm/prom.h>
Paul Mackerrasf8ef2702005-11-19 20:46:04 +110021#include <asm/pci-bridge.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070022
23#include <asm-generic/pci-dma-compat.h>
24
25#define PCIBIOS_MIN_IO 0x1000
26#define PCIBIOS_MIN_MEM 0x10000000
27
28struct pci_dev;
29
Paul Mackerrasf8ef2702005-11-19 20:46:04 +110030/* Values for the `which' argument to sys_pciconfig_iobase syscall. */
31#define IOBASE_BRIDGE_NUMBER 0
32#define IOBASE_MEMORY 1
33#define IOBASE_IO 2
34#define IOBASE_ISA_IO 3
35#define IOBASE_ISA_MEM 4
36
37/*
38 * Set this to 1 if you want the kernel to re-assign all PCI
39 * bus numbers
40 */
41extern int pci_assign_all_buses;
42#define pcibios_assign_all_busses() (pci_assign_all_buses)
43
Linus Torvalds1da177e2005-04-16 15:20:36 -070044#define pcibios_scan_all_fns(a, b) 0
Linus Torvalds1da177e2005-04-16 15:20:36 -070045
46static inline void pcibios_set_master(struct pci_dev *dev)
47{
48 /* No special bus mastering setup handling */
49}
50
David Shaohua Lic9c3e452005-04-01 00:07:31 -050051static inline void pcibios_penalize_isa_irq(int irq, int active)
Linus Torvalds1da177e2005-04-16 15:20:36 -070052{
53 /* We don't do dynamic PCI IRQ allocation */
54}
55
56#define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ
57static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
58{
59 if (ppc_md.pci_get_legacy_ide_irq)
60 return ppc_md.pci_get_legacy_ide_irq(dev, channel);
61 return channel ? 15 : 14;
62}
63
Paul Mackerrasf8ef2702005-11-19 20:46:04 +110064#ifdef CONFIG_PPC64
Matthew Wilcoxedb2d972006-10-10 08:01:21 -060065
66/*
67 * We want to avoid touching the cacheline size or MWI bit.
68 * pSeries firmware sets the cacheline size (which is not the cpu cacheline
69 * size in all cases) and hardware treats MWI the same as memory write.
70 */
71#define PCI_DISABLE_MWI
Linus Torvalds1da177e2005-04-16 15:20:36 -070072
Benjamin Herrenschmidt12d04ee2006-11-11 17:25:02 +110073extern struct dma_mapping_ops *pci_dma_ops;
Linus Torvalds1da177e2005-04-16 15:20:36 -070074
75/* For DAC DMA, we currently don't support it by default, but
Paul Mackerrasf8ef2702005-11-19 20:46:04 +110076 * we let 64-bit platforms override this.
Linus Torvalds1da177e2005-04-16 15:20:36 -070077 */
78static inline int pci_dac_dma_supported(struct pci_dev *hwdev,u64 mask)
79{
Benjamin Herrenschmidt12d04ee2006-11-11 17:25:02 +110080 if (pci_dma_ops && pci_dma_ops->dac_dma_supported)
81 return pci_dma_ops->dac_dma_supported(&hwdev->dev, mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -070082 return 0;
83}
84
Andrew Mortonbb4a61b2005-06-06 23:07:46 -070085#ifdef CONFIG_PCI
David S. Millere24c2d92005-06-02 12:55:50 -070086static inline void pci_dma_burst_advice(struct pci_dev *pdev,
87 enum pci_dma_burst_strategy *strat,
88 unsigned long *strategy_parameter)
89{
90 unsigned long cacheline_size;
91 u8 byte;
92
93 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
94 if (byte == 0)
95 cacheline_size = 1024;
96 else
97 cacheline_size = (int) byte * 4;
98
99 *strat = PCI_DMA_BURST_MULTIPLE;
100 *strategy_parameter = cacheline_size;
101}
Andrew Mortonbb4a61b2005-06-06 23:07:46 -0700102#endif
David S. Millere24c2d92005-06-02 12:55:50 -0700103
Linus Torvalds1da177e2005-04-16 15:20:36 -0700104extern int pci_domain_nr(struct pci_bus *bus);
105
106/* Decide whether to display the domain number in /proc */
107extern int pci_proc_domain(struct pci_bus *bus);
108
Paul Mackerrasf8ef2702005-11-19 20:46:04 +1100109#else /* 32-bit */
110
111#ifdef CONFIG_PCI
112static inline void pci_dma_burst_advice(struct pci_dev *pdev,
113 enum pci_dma_burst_strategy *strat,
114 unsigned long *strategy_parameter)
115{
116 *strat = PCI_DMA_BURST_INFINITY;
117 *strategy_parameter = ~0UL;
118}
119#endif
120
121/*
122 * At present there are very few 32-bit PPC machines that can have
123 * memory above the 4GB point, and we don't support that.
124 */
125#define pci_dac_dma_supported(pci_dev, mask) (0)
126
127/* Return the index of the PCI controller for device PDEV. */
128#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
129
130/* Set the name of the bus as it appears in /proc/bus/pci */
131static inline int pci_proc_domain(struct pci_bus *bus)
132{
133 return 0;
134}
135
136#endif /* CONFIG_PPC64 */
137
Linus Torvalds1da177e2005-04-16 15:20:36 -0700138struct vm_area_struct;
139/* Map a range of PCI memory or I/O space for a device into user space */
140int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
141 enum pci_mmap_state mmap_state, int write_combine);
142
143/* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
144#define HAVE_PCI_MMAP 1
145
Roland Dreier1d4454e2006-12-06 15:15:38 -0800146#if defined(CONFIG_PPC64) || defined(CONFIG_NOT_COHERENT_CACHE)
147/*
148 * For 64-bit kernels, pci_unmap_{single,page} is not a nop.
149 * For 32-bit non-coherent kernels, pci_dma_sync_single_for_cpu() and
150 * so on are not nops.
151 * and thus...
152 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700153#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
154 dma_addr_t ADDR_NAME;
155#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
156 __u32 LEN_NAME;
157#define pci_unmap_addr(PTR, ADDR_NAME) \
158 ((PTR)->ADDR_NAME)
159#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
160 (((PTR)->ADDR_NAME) = (VAL))
161#define pci_unmap_len(PTR, LEN_NAME) \
162 ((PTR)->LEN_NAME)
163#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
164 (((PTR)->LEN_NAME) = (VAL))
165
Roland Dreier1d4454e2006-12-06 15:15:38 -0800166#else /* 32-bit && coherent */
167
168/* pci_unmap_{page,single} is a nop so... */
169#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
170#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
171#define pci_unmap_addr(PTR, ADDR_NAME) (0)
172#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
173#define pci_unmap_len(PTR, LEN_NAME) (0)
174#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
175
176#endif /* CONFIG_PPC64 || CONFIG_NOT_COHERENT_CACHE */
177
178#ifdef CONFIG_PPC64
179
Paul Mackerrasf8ef2702005-11-19 20:46:04 +1100180/* The PCI address space does not equal the physical memory address
181 * space (we have an IOMMU). The IDE and SCSI device layers use
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182 * this boolean for bounce buffer decisions.
183 */
184#define PCI_DMA_BUS_IS_PHYS (0)
Paul Mackerrasf8ef2702005-11-19 20:46:04 +1100185
186#else /* 32-bit */
187
188/* The PCI address space does equal the physical memory
189 * address space (no IOMMU). The IDE and SCSI device layers use
190 * this boolean for bounce buffer decisions.
191 */
192#define PCI_DMA_BUS_IS_PHYS (1)
193
Paul Mackerrasf8ef2702005-11-19 20:46:04 +1100194#endif /* CONFIG_PPC64 */
Roland Dreier1d4454e2006-12-06 15:15:38 -0800195
Paul Mackerrasf8ef2702005-11-19 20:46:04 +1100196extern void pcibios_resource_to_bus(struct pci_dev *dev,
197 struct pci_bus_region *region,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700198 struct resource *res);
199
Paul Mackerrasf8ef2702005-11-19 20:46:04 +1100200extern void pcibios_bus_to_resource(struct pci_dev *dev,
201 struct resource *res,
Dominik Brodowski43c34732005-08-04 18:06:21 -0700202 struct pci_bus_region *region);
203
Paul Mackerrasf8ef2702005-11-19 20:46:04 +1100204static inline struct resource *pcibios_select_root(struct pci_dev *pdev,
205 struct resource *res)
David S. Miller085ae412005-08-08 13:19:08 -0700206{
207 struct resource *root = NULL;
208
209 if (res->flags & IORESOURCE_IO)
210 root = &ioport_resource;
211 if (res->flags & IORESOURCE_MEM)
212 root = &iomem_resource;
213
214 return root;
215}
216
Paul Mackerrasf8ef2702005-11-19 20:46:04 +1100217extern int unmap_bus_range(struct pci_bus *bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218
Paul Mackerrasf8ef2702005-11-19 20:46:04 +1100219extern int remap_bus_range(struct pci_bus *bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700220
Paul Mackerrasf8ef2702005-11-19 20:46:04 +1100221extern void pcibios_fixup_device_resources(struct pci_dev *dev,
222 struct pci_bus *bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700223
Benjamin Herrenschmidt12d04ee2006-11-11 17:25:02 +1100224extern void pcibios_setup_new_device(struct pci_dev *dev);
225
Linas Vepstasfacf0782005-11-03 18:52:01 -0600226extern void pcibios_claim_one_bus(struct pci_bus *b);
227
Linus Torvalds1da177e2005-04-16 15:20:36 -0700228extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
229
John Roseead83712005-11-04 15:30:56 -0600230extern struct pci_dev *of_create_pci_dev(struct device_node *node,
231 struct pci_bus *bus, int devfn);
232
233extern void of_scan_pci_bridge(struct device_node *node,
234 struct pci_dev *dev);
235
236extern void of_scan_bus(struct device_node *node, struct pci_bus *bus);
237
Linus Torvalds1da177e2005-04-16 15:20:36 -0700238extern int pci_read_irq_line(struct pci_dev *dev);
239
240extern void pcibios_add_platform_entries(struct pci_dev *dev);
241
242struct file;
243extern pgprot_t pci_phys_mem_access_prot(struct file *file,
Roland Dreier8b150472005-10-28 17:46:18 -0700244 unsigned long pfn,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700245 unsigned long size,
246 pgprot_t prot);
247
Michael Ellerman2311b1f2005-05-13 17:44:10 +1000248#define HAVE_ARCH_PCI_RESOURCE_TO_USER
249extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
250 const struct resource *rsrc,
Greg Kroah-Hartmane31dd6e2006-06-12 17:06:02 -0700251 resource_size_t *start, resource_size_t *end);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700252
253#endif /* __KERNEL__ */
Paul Mackerrasf8ef2702005-11-19 20:46:04 +1100254#endif /* __ASM_POWERPC_PCI_H */