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gerrit-public.fairphone.software / kernel / msm-4.9 / f7dff2b12654149c9cac8d8c79b6588759edd5a9 / . / include / asm-sparc64 / ttable.h
blob: f2352606a79f5a1dd6e0f8ff305d6becc1665ce7 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]1/* $Id: ttable.h,v 1.18 2002/02/09 19:49:32 davem Exp $ */
2#ifndef _SPARC64_TTABLE_H
3#define _SPARC64_TTABLE_H
4
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]5#include <asm/utrap.h>
6
7#ifdef __ASSEMBLY__
8#include <asm/thread_info.h>
9#endif
10
11#define BOOT_KERNEL b sparc64_boot; nop; nop; nop; nop; nop; nop; nop;
12
13/* We need a "cleaned" instruction... */
14#define CLEAN_WINDOW \
15 rdpr %cleanwin, %l0; add %l0, 1, %l0; \
16 wrpr %l0, 0x0, %cleanwin; \
17 clr %o0; clr %o1; clr %o2; clr %o3; \
18 clr %o4; clr %o5; clr %o6; clr %o7; \
19 clr %l0; clr %l1; clr %l2; clr %l3; \
20 clr %l4; clr %l5; clr %l6; clr %l7; \
21 retry; \
22 nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;
23
24#define TRAP(routine) \
25 sethi %hi(109f), %g7; \
26 ba,pt %xcc, etrap; \
27109: or %g7, %lo(109b), %g7; \
28 call routine; \
29 add %sp, PTREGS_OFF, %o0; \
30 ba,pt %xcc, rtrap; \
31 clr %l6; \
32 nop;
33
34#define TRAP_7INSNS(routine) \
35 sethi %hi(109f), %g7; \
36 ba,pt %xcc, etrap; \
37109: or %g7, %lo(109b), %g7; \
38 call routine; \
39 add %sp, PTREGS_OFF, %o0; \
40 ba,pt %xcc, rtrap; \
41 clr %l6;
42
43#define TRAP_SAVEFPU(routine) \
44 sethi %hi(109f), %g7; \
45 ba,pt %xcc, do_fptrap; \
46109: or %g7, %lo(109b), %g7; \
47 call routine; \
48 add %sp, PTREGS_OFF, %o0; \
49 ba,pt %xcc, rtrap; \
50 clr %l6; \
51 nop;
52
53#define TRAP_NOSAVE(routine) \
54 ba,pt %xcc, routine; \
55 nop; \
56 nop; nop; nop; nop; nop; nop;
57
58#define TRAP_NOSAVE_7INSNS(routine) \
59 ba,pt %xcc, routine; \
60 nop; \
61 nop; nop; nop; nop; nop;
62
63#define TRAPTL1(routine) \
64 sethi %hi(109f), %g7; \
65 ba,pt %xcc, etraptl1; \
66109: or %g7, %lo(109b), %g7; \
67 call routine; \
68 add %sp, PTREGS_OFF, %o0; \
69 ba,pt %xcc, rtrap; \
70 clr %l6; \
71 nop;
72
73#define TRAP_ARG(routine, arg) \
74 sethi %hi(109f), %g7; \
75 ba,pt %xcc, etrap; \
76109: or %g7, %lo(109b), %g7; \
77 add %sp, PTREGS_OFF, %o0; \
78 call routine; \
79 mov arg, %o1; \
80 ba,pt %xcc, rtrap; \
81 clr %l6;
82
83#define TRAPTL1_ARG(routine, arg) \
84 sethi %hi(109f), %g7; \
85 ba,pt %xcc, etraptl1; \
86109: or %g7, %lo(109b), %g7; \
87 add %sp, PTREGS_OFF, %o0; \
88 call routine; \
89 mov arg, %o1; \
90 ba,pt %xcc, rtrap; \
91 clr %l6;
92
93#define SYSCALL_TRAP(routine, systbl) \
94 sethi %hi(109f), %g7; \
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]95 ba,pt %xcc, etrap; \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]96109: or %g7, %lo(109b), %g7; \
97 sethi %hi(systbl), %l7; \
98 ba,pt %xcc, routine; \
99 or %l7, %lo(systbl), %l7; \
100 nop; nop;
101
102#define INDIRECT_SOLARIS_SYSCALL(num) \
103 sethi %hi(109f), %g7; \
104 ba,pt %xcc, etrap; \
105109: or %g7, %lo(109b), %g7; \
106 ba,pt %xcc, tl0_solaris + 0xc; \
107 mov num, %g1; \
108 nop;nop;nop;
109
110#define TRAP_UTRAP(handler,lvl) \
David S. Miller56fb4df2006-02-26 23:24:22 -0800[diff] [blame]111 mov handler, %g3; \
112 ba,pt %xcc, utrap_trap; \
113 mov lvl, %g4; \
114 nop; \
115 nop; \
116 nop; \
117 nop; \
118 nop;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]119
120#ifdef CONFIG_SUNOS_EMUL
121#define SUNOS_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall32, sunos_sys_table)
122#else
123#define SUNOS_SYSCALL_TRAP TRAP(sunos_syscall)
124#endif
125#ifdef CONFIG_COMPAT
126#define LINUX_32BIT_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall32, sys_call_table32)
127#else
128#define LINUX_32BIT_SYSCALL_TRAP BTRAP(0x110)
129#endif
130#define LINUX_64BIT_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall, sys_call_table64)
131#define GETCC_TRAP TRAP(getcc)
132#define SETCC_TRAP TRAP(setcc)
133#ifdef CONFIG_SOLARIS_EMUL
134#define SOLARIS_SYSCALL_TRAP TRAP(solaris_sparc_syscall)
135#else
136#define SOLARIS_SYSCALL_TRAP TRAP(solaris_syscall)
137#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]138#define BREAKPOINT_TRAP TRAP(breakpoint_trap)
139
140#define TRAP_IRQ(routine, level) \
141 rdpr %pil, %g2; \
142 wrpr %g0, 15, %pil; \
143 b,pt %xcc, etrap_irq; \
144 rd %pc, %g7; \
145 mov level, %o0; \
146 call routine; \
147 add %sp, PTREGS_OFF, %o1; \
148 ba,a,pt %xcc, rtrap_irq;
149
150#define TICK_SMP_IRQ \
151 rdpr %pil, %g2; \
152 wrpr %g0, 15, %pil; \
153 sethi %hi(109f), %g7; \
154 b,pt %xcc, etrap_irq; \
155109: or %g7, %lo(109b), %g7; \
156 call smp_percpu_timer_interrupt; \
157 add %sp, PTREGS_OFF, %o0; \
158 ba,a,pt %xcc, rtrap_irq;
159
160#define TRAP_IVEC TRAP_NOSAVE(do_ivec)
161
162#define BTRAP(lvl) TRAP_ARG(bad_trap, lvl)
163
164#define BTRAPTL1(lvl) TRAPTL1_ARG(bad_trap_tl1, lvl)
165
166#define FLUSH_WINDOW_TRAP \
167 ba,pt %xcc, etrap; \
168 rd %pc, %g7; \
169 flushw; \
170 ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %l1; \
171 add %l1, 4, %l2; \
172 stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]; \
173 ba,pt %xcc, rtrap_clr_l6; \
174 stx %l2, [%sp + PTREGS_OFF + PT_V9_TNPC];
175
176#ifdef CONFIG_KPROBES
177#define KPROBES_TRAP(lvl) TRAP_IRQ(kprobe_trap, lvl)
178#else
179#define KPROBES_TRAP(lvl) TRAP_ARG(bad_trap, lvl)
180#endif
181
David S. Miller12eaa322006-02-10 15:39:51 -0800[diff] [blame]182#define SUN4V_ITSB_MISS \
183 ldxa [%g0] ASI_SCRATCHPAD, %g2; \
184 ldx [%g2 + HV_FAULT_I_ADDR_OFFSET], %g4; \
185 ldx [%g2 + HV_FAULT_I_CTX_OFFSET], %g5; \
David S. Miller8b234272006-02-17 18:01:02 -0800[diff] [blame]186 srlx %g4, 22, %g6; \
David S. Miller459b6e62006-02-11 12:21:20 -0800[diff] [blame]187 ba,pt %xcc, sun4v_itsb_miss; \
David S. Miller8b234272006-02-17 18:01:02 -0800[diff] [blame]188 nop; \
189 nop; \
David S. Miller459b6e62006-02-11 12:21:20 -0800[diff] [blame]190 nop;
David S. Milleraa9143b2006-02-09 16:12:22 -0800[diff] [blame]191
David S. Miller459b6e62006-02-11 12:21:20 -0800[diff] [blame]192#define SUN4V_DTSB_MISS \
David S. Miller12eaa322006-02-10 15:39:51 -0800[diff] [blame]193 ldxa [%g0] ASI_SCRATCHPAD, %g2; \
194 ldx [%g2 + HV_FAULT_D_ADDR_OFFSET], %g4; \
195 ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5; \
David S. Miller8b234272006-02-17 18:01:02 -0800[diff] [blame]196 srlx %g4, 22, %g6; \
David S. Miller459b6e62006-02-11 12:21:20 -0800[diff] [blame]197 ba,pt %xcc, sun4v_dtsb_miss; \
David S. Miller8b234272006-02-17 18:01:02 -0800[diff] [blame]198 nop; \
199 nop; \
David S. Miller459b6e62006-02-11 12:21:20 -0800[diff] [blame]200 nop;
David S. Milleraa9143b2006-02-09 16:12:22 -0800[diff] [blame]201
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]202/* Before touching these macros, you owe it to yourself to go and
203 * see how arch/sparc64/kernel/winfixup.S works... -DaveM
204 *
205 * For the user cases we used to use the %asi register, but
206 * it turns out that the "wr xxx, %asi" costs ~5 cycles, so
207 * now we use immediate ASI loads and stores instead. Kudos
208 * to Greg Onufer for pointing out this performance anomaly.
209 *
210 * Further note that we cannot use the g2, g4, g5, and g7 alternate
211 * globals in the spill routines, check out the save instruction in
212 * arch/sparc64/kernel/etrap.S to see what I mean about g2, and
213 * g4/g5 are the globals which are preserved by etrap processing
214 * for the caller of it. The g7 register is the return pc for
215 * etrap. Finally, g6 is the current thread register so we cannot
216 * us it in the spill handlers either. Most of these rules do not
217 * apply to fill processing, only g6 is not usable.
218 */
219
220/* Normal kernel spill */
221#define SPILL_0_NORMAL \
222 stx %l0, [%sp + STACK_BIAS + 0x00]; \
223 stx %l1, [%sp + STACK_BIAS + 0x08]; \
224 stx %l2, [%sp + STACK_BIAS + 0x10]; \
225 stx %l3, [%sp + STACK_BIAS + 0x18]; \
226 stx %l4, [%sp + STACK_BIAS + 0x20]; \
227 stx %l5, [%sp + STACK_BIAS + 0x28]; \
228 stx %l6, [%sp + STACK_BIAS + 0x30]; \
229 stx %l7, [%sp + STACK_BIAS + 0x38]; \
230 stx %i0, [%sp + STACK_BIAS + 0x40]; \
231 stx %i1, [%sp + STACK_BIAS + 0x48]; \
232 stx %i2, [%sp + STACK_BIAS + 0x50]; \
233 stx %i3, [%sp + STACK_BIAS + 0x58]; \
234 stx %i4, [%sp + STACK_BIAS + 0x60]; \
235 stx %i5, [%sp + STACK_BIAS + 0x68]; \
236 stx %i6, [%sp + STACK_BIAS + 0x70]; \
237 stx %i7, [%sp + STACK_BIAS + 0x78]; \
238 saved; retry; nop; nop; nop; nop; nop; nop; \
239 nop; nop; nop; nop; nop; nop; nop; nop;
240
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]241#define SPILL_0_NORMAL_ETRAP \
242etrap_kernel_spill: \
243 stx %l0, [%sp + STACK_BIAS + 0x00]; \
244 stx %l1, [%sp + STACK_BIAS + 0x08]; \
245 stx %l2, [%sp + STACK_BIAS + 0x10]; \
246 stx %l3, [%sp + STACK_BIAS + 0x18]; \
247 stx %l4, [%sp + STACK_BIAS + 0x20]; \
248 stx %l5, [%sp + STACK_BIAS + 0x28]; \
249 stx %l6, [%sp + STACK_BIAS + 0x30]; \
250 stx %l7, [%sp + STACK_BIAS + 0x38]; \
251 stx %i0, [%sp + STACK_BIAS + 0x40]; \
252 stx %i1, [%sp + STACK_BIAS + 0x48]; \
253 stx %i2, [%sp + STACK_BIAS + 0x50]; \
254 stx %i3, [%sp + STACK_BIAS + 0x58]; \
255 stx %i4, [%sp + STACK_BIAS + 0x60]; \
256 stx %i5, [%sp + STACK_BIAS + 0x68]; \
257 stx %i6, [%sp + STACK_BIAS + 0x70]; \
258 stx %i7, [%sp + STACK_BIAS + 0x78]; \
259 saved; \
260 sub %g1, 2, %g1; \
261 ba,pt %xcc, etrap_save; \
262 wrpr %g1, %cwp; \
263 nop; nop; nop; nop; nop; nop; nop; nop; \
264 nop; nop; nop; nop;
265
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]266/* Normal 64bit spill */
267#define SPILL_1_GENERIC(ASI) \
268 add %sp, STACK_BIAS + 0x00, %g1; \
269 stxa %l0, [%g1 + %g0] ASI; \
270 mov 0x08, %g3; \
271 stxa %l1, [%g1 + %g3] ASI; \
272 add %g1, 0x10, %g1; \
273 stxa %l2, [%g1 + %g0] ASI; \
274 stxa %l3, [%g1 + %g3] ASI; \
275 add %g1, 0x10, %g1; \
276 stxa %l4, [%g1 + %g0] ASI; \
277 stxa %l5, [%g1 + %g3] ASI; \
278 add %g1, 0x10, %g1; \
279 stxa %l6, [%g1 + %g0] ASI; \
280 stxa %l7, [%g1 + %g3] ASI; \
281 add %g1, 0x10, %g1; \
282 stxa %i0, [%g1 + %g0] ASI; \
283 stxa %i1, [%g1 + %g3] ASI; \
284 add %g1, 0x10, %g1; \
285 stxa %i2, [%g1 + %g0] ASI; \
286 stxa %i3, [%g1 + %g3] ASI; \
287 add %g1, 0x10, %g1; \
288 stxa %i4, [%g1 + %g0] ASI; \
289 stxa %i5, [%g1 + %g3] ASI; \
290 add %g1, 0x10, %g1; \
291 stxa %i6, [%g1 + %g0] ASI; \
292 stxa %i7, [%g1 + %g3] ASI; \
293 saved; \
294 retry; nop; nop; \
295 b,a,pt %xcc, spill_fixup_dax; \
296 b,a,pt %xcc, spill_fixup_mna; \
297 b,a,pt %xcc, spill_fixup;
298
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]299#define SPILL_1_GENERIC_ETRAP \
300etrap_user_spill_64bit: \
301 stxa %l0, [%sp + STACK_BIAS + 0x00] %asi; \
302 stxa %l1, [%sp + STACK_BIAS + 0x08] %asi; \
303 stxa %l2, [%sp + STACK_BIAS + 0x10] %asi; \
304 stxa %l3, [%sp + STACK_BIAS + 0x18] %asi; \
305 stxa %l4, [%sp + STACK_BIAS + 0x20] %asi; \
306 stxa %l5, [%sp + STACK_BIAS + 0x28] %asi; \
307 stxa %l6, [%sp + STACK_BIAS + 0x30] %asi; \
308 stxa %l7, [%sp + STACK_BIAS + 0x38] %asi; \
309 stxa %i0, [%sp + STACK_BIAS + 0x40] %asi; \
310 stxa %i1, [%sp + STACK_BIAS + 0x48] %asi; \
311 stxa %i2, [%sp + STACK_BIAS + 0x50] %asi; \
312 stxa %i3, [%sp + STACK_BIAS + 0x58] %asi; \
313 stxa %i4, [%sp + STACK_BIAS + 0x60] %asi; \
314 stxa %i5, [%sp + STACK_BIAS + 0x68] %asi; \
315 stxa %i6, [%sp + STACK_BIAS + 0x70] %asi; \
316 stxa %i7, [%sp + STACK_BIAS + 0x78] %asi; \
317 saved; \
318 sub %g1, 2, %g1; \
319 ba,pt %xcc, etrap_save; \
320 wrpr %g1, %cwp; \
321 nop; nop; nop; nop; nop; \
322 nop; nop; nop; nop; \
323 ba,a,pt %xcc, etrap_spill_fixup_64bit; \
324 ba,a,pt %xcc, etrap_spill_fixup_64bit; \
325 ba,a,pt %xcc, etrap_spill_fixup_64bit;
326
327#define SPILL_1_GENERIC_ETRAP_FIXUP \
328etrap_spill_fixup_64bit: \
329 ldub [%g6 + TI_WSAVED], %g1; \
330 sll %g1, 3, %g3; \
331 add %g6, %g3, %g3; \
332 stx %sp, [%g3 + TI_RWIN_SPTRS]; \
333 sll %g1, 7, %g3; \
334 add %g6, %g3, %g3; \
335 stx %l0, [%g3 + TI_REG_WINDOW + 0x00]; \
336 stx %l1, [%g3 + TI_REG_WINDOW + 0x08]; \
337 stx %l2, [%g3 + TI_REG_WINDOW + 0x10]; \
338 stx %l3, [%g3 + TI_REG_WINDOW + 0x18]; \
339 stx %l4, [%g3 + TI_REG_WINDOW + 0x20]; \
340 stx %l5, [%g3 + TI_REG_WINDOW + 0x28]; \
341 stx %l6, [%g3 + TI_REG_WINDOW + 0x30]; \
342 stx %l7, [%g3 + TI_REG_WINDOW + 0x38]; \
343 stx %i0, [%g3 + TI_REG_WINDOW + 0x40]; \
344 stx %i1, [%g3 + TI_REG_WINDOW + 0x48]; \
345 stx %i2, [%g3 + TI_REG_WINDOW + 0x50]; \
346 stx %i3, [%g3 + TI_REG_WINDOW + 0x58]; \
347 stx %i4, [%g3 + TI_REG_WINDOW + 0x60]; \
348 stx %i5, [%g3 + TI_REG_WINDOW + 0x68]; \
349 stx %i6, [%g3 + TI_REG_WINDOW + 0x70]; \
350 stx %i7, [%g3 + TI_REG_WINDOW + 0x78]; \
351 add %g1, 1, %g1; \
352 stb %g1, [%g6 + TI_WSAVED]; \
353 saved; \
354 rdpr %cwp, %g1; \
355 sub %g1, 2, %g1; \
356 ba,pt %xcc, etrap_save; \
357 wrpr %g1, %cwp; \
358 nop; nop; nop
359
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]360/* Normal 32bit spill */
361#define SPILL_2_GENERIC(ASI) \
362 srl %sp, 0, %sp; \
363 stwa %l0, [%sp + %g0] ASI; \
364 mov 0x04, %g3; \
365 stwa %l1, [%sp + %g3] ASI; \
366 add %sp, 0x08, %g1; \
367 stwa %l2, [%g1 + %g0] ASI; \
368 stwa %l3, [%g1 + %g3] ASI; \
369 add %g1, 0x08, %g1; \
370 stwa %l4, [%g1 + %g0] ASI; \
371 stwa %l5, [%g1 + %g3] ASI; \
372 add %g1, 0x08, %g1; \
373 stwa %l6, [%g1 + %g0] ASI; \
374 stwa %l7, [%g1 + %g3] ASI; \
375 add %g1, 0x08, %g1; \
376 stwa %i0, [%g1 + %g0] ASI; \
377 stwa %i1, [%g1 + %g3] ASI; \
378 add %g1, 0x08, %g1; \
379 stwa %i2, [%g1 + %g0] ASI; \
380 stwa %i3, [%g1 + %g3] ASI; \
381 add %g1, 0x08, %g1; \
382 stwa %i4, [%g1 + %g0] ASI; \
383 stwa %i5, [%g1 + %g3] ASI; \
384 add %g1, 0x08, %g1; \
385 stwa %i6, [%g1 + %g0] ASI; \
386 stwa %i7, [%g1 + %g3] ASI; \
387 saved; \
388 retry; nop; nop; \
389 b,a,pt %xcc, spill_fixup_dax; \
390 b,a,pt %xcc, spill_fixup_mna; \
391 b,a,pt %xcc, spill_fixup;
392
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]393#define SPILL_2_GENERIC_ETRAP \
394etrap_user_spill_32bit: \
395 srl %sp, 0, %sp; \
396 stwa %l0, [%sp + 0x00] %asi; \
397 stwa %l1, [%sp + 0x04] %asi; \
398 stwa %l2, [%sp + 0x08] %asi; \
399 stwa %l3, [%sp + 0x0c] %asi; \
400 stwa %l4, [%sp + 0x10] %asi; \
401 stwa %l5, [%sp + 0x14] %asi; \
402 stwa %l6, [%sp + 0x18] %asi; \
403 stwa %l7, [%sp + 0x1c] %asi; \
404 stwa %i0, [%sp + 0x20] %asi; \
405 stwa %i1, [%sp + 0x24] %asi; \
406 stwa %i2, [%sp + 0x28] %asi; \
407 stwa %i3, [%sp + 0x2c] %asi; \
408 stwa %i4, [%sp + 0x30] %asi; \
409 stwa %i5, [%sp + 0x34] %asi; \
410 stwa %i6, [%sp + 0x38] %asi; \
411 stwa %i7, [%sp + 0x3c] %asi; \
412 saved; \
413 sub %g1, 2, %g1; \
414 ba,pt %xcc, etrap_save; \
415 wrpr %g1, %cwp; \
416 nop; nop; nop; nop; \
417 nop; nop; nop; nop; \
418 ba,a,pt %xcc, etrap_spill_fixup_32bit; \
419 ba,a,pt %xcc, etrap_spill_fixup_32bit; \
420 ba,a,pt %xcc, etrap_spill_fixup_32bit;
421
422#define SPILL_2_GENERIC_ETRAP_FIXUP \
423etrap_spill_fixup_32bit: \
424 ldub [%g6 + TI_WSAVED], %g1; \
425 sll %g1, 3, %g3; \
426 add %g6, %g3, %g3; \
427 stx %sp, [%g3 + TI_RWIN_SPTRS]; \
428 sll %g1, 7, %g3; \
429 add %g6, %g3, %g3; \
430 stw %l0, [%g3 + TI_REG_WINDOW + 0x00]; \
431 stw %l1, [%g3 + TI_REG_WINDOW + 0x04]; \
432 stw %l2, [%g3 + TI_REG_WINDOW + 0x08]; \
433 stw %l3, [%g3 + TI_REG_WINDOW + 0x0c]; \
434 stw %l4, [%g3 + TI_REG_WINDOW + 0x10]; \
435 stw %l5, [%g3 + TI_REG_WINDOW + 0x14]; \
436 stw %l6, [%g3 + TI_REG_WINDOW + 0x18]; \
437 stw %l7, [%g3 + TI_REG_WINDOW + 0x1c]; \
438 stw %i0, [%g3 + TI_REG_WINDOW + 0x20]; \
439 stw %i1, [%g3 + TI_REG_WINDOW + 0x24]; \
440 stw %i2, [%g3 + TI_REG_WINDOW + 0x28]; \
441 stw %i3, [%g3 + TI_REG_WINDOW + 0x2c]; \
442 stw %i4, [%g3 + TI_REG_WINDOW + 0x30]; \
443 stw %i5, [%g3 + TI_REG_WINDOW + 0x34]; \
444 stw %i6, [%g3 + TI_REG_WINDOW + 0x38]; \
445 stw %i7, [%g3 + TI_REG_WINDOW + 0x3c]; \
446 add %g1, 1, %g1; \
447 stb %g1, [%g6 + TI_WSAVED]; \
448 saved; \
449 rdpr %cwp, %g1; \
450 sub %g1, 2, %g1; \
451 ba,pt %xcc, etrap_save; \
452 wrpr %g1, %cwp; \
453 nop; nop; nop
454
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]455#define SPILL_1_NORMAL SPILL_1_GENERIC(ASI_AIUP)
456#define SPILL_2_NORMAL SPILL_2_GENERIC(ASI_AIUP)
457#define SPILL_3_NORMAL SPILL_0_NORMAL
458#define SPILL_4_NORMAL SPILL_0_NORMAL
459#define SPILL_5_NORMAL SPILL_0_NORMAL
460#define SPILL_6_NORMAL SPILL_0_NORMAL
461#define SPILL_7_NORMAL SPILL_0_NORMAL
462
463#define SPILL_0_OTHER SPILL_0_NORMAL
464#define SPILL_1_OTHER SPILL_1_GENERIC(ASI_AIUS)
465#define SPILL_2_OTHER SPILL_2_GENERIC(ASI_AIUS)
466#define SPILL_3_OTHER SPILL_3_NORMAL
467#define SPILL_4_OTHER SPILL_4_NORMAL
468#define SPILL_5_OTHER SPILL_5_NORMAL
469#define SPILL_6_OTHER SPILL_6_NORMAL
470#define SPILL_7_OTHER SPILL_7_NORMAL
471
472/* Normal kernel fill */
473#define FILL_0_NORMAL \
474 ldx [%sp + STACK_BIAS + 0x00], %l0; \
475 ldx [%sp + STACK_BIAS + 0x08], %l1; \
476 ldx [%sp + STACK_BIAS + 0x10], %l2; \
477 ldx [%sp + STACK_BIAS + 0x18], %l3; \
478 ldx [%sp + STACK_BIAS + 0x20], %l4; \
479 ldx [%sp + STACK_BIAS + 0x28], %l5; \
480 ldx [%sp + STACK_BIAS + 0x30], %l6; \
481 ldx [%sp + STACK_BIAS + 0x38], %l7; \
482 ldx [%sp + STACK_BIAS + 0x40], %i0; \
483 ldx [%sp + STACK_BIAS + 0x48], %i1; \
484 ldx [%sp + STACK_BIAS + 0x50], %i2; \
485 ldx [%sp + STACK_BIAS + 0x58], %i3; \
486 ldx [%sp + STACK_BIAS + 0x60], %i4; \
487 ldx [%sp + STACK_BIAS + 0x68], %i5; \
488 ldx [%sp + STACK_BIAS + 0x70], %i6; \
489 ldx [%sp + STACK_BIAS + 0x78], %i7; \
490 restored; retry; nop; nop; nop; nop; nop; nop; \
491 nop; nop; nop; nop; nop; nop; nop; nop;
492
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]493#define FILL_0_NORMAL_RTRAP \
494kern_rtt_fill: \
495 rdpr %cwp, %g1; \
496 sub %g1, 1, %g1; \
497 wrpr %g1, %cwp; \
498 ldx [%sp + STACK_BIAS + 0x00], %l0; \
499 ldx [%sp + STACK_BIAS + 0x08], %l1; \
500 ldx [%sp + STACK_BIAS + 0x10], %l2; \
501 ldx [%sp + STACK_BIAS + 0x18], %l3; \
502 ldx [%sp + STACK_BIAS + 0x20], %l4; \
503 ldx [%sp + STACK_BIAS + 0x28], %l5; \
504 ldx [%sp + STACK_BIAS + 0x30], %l6; \
505 ldx [%sp + STACK_BIAS + 0x38], %l7; \
506 ldx [%sp + STACK_BIAS + 0x40], %i0; \
507 ldx [%sp + STACK_BIAS + 0x48], %i1; \
508 ldx [%sp + STACK_BIAS + 0x50], %i2; \
509 ldx [%sp + STACK_BIAS + 0x58], %i3; \
510 ldx [%sp + STACK_BIAS + 0x60], %i4; \
511 ldx [%sp + STACK_BIAS + 0x68], %i5; \
512 ldx [%sp + STACK_BIAS + 0x70], %i6; \
513 ldx [%sp + STACK_BIAS + 0x78], %i7; \
514 restored; \
515 add %g1, 1, %g1; \
516 ba,pt %xcc, kern_rtt_restore; \
517 wrpr %g1, %cwp; \
518 nop; nop; nop; nop; nop; \
519 nop; nop; nop; nop;
520
521
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]522/* Normal 64bit fill */
523#define FILL_1_GENERIC(ASI) \
524 add %sp, STACK_BIAS + 0x00, %g1; \
525 ldxa [%g1 + %g0] ASI, %l0; \
526 mov 0x08, %g2; \
527 mov 0x10, %g3; \
528 ldxa [%g1 + %g2] ASI, %l1; \
529 mov 0x18, %g5; \
530 ldxa [%g1 + %g3] ASI, %l2; \
531 ldxa [%g1 + %g5] ASI, %l3; \
532 add %g1, 0x20, %g1; \
533 ldxa [%g1 + %g0] ASI, %l4; \
534 ldxa [%g1 + %g2] ASI, %l5; \
535 ldxa [%g1 + %g3] ASI, %l6; \
536 ldxa [%g1 + %g5] ASI, %l7; \
537 add %g1, 0x20, %g1; \
538 ldxa [%g1 + %g0] ASI, %i0; \
539 ldxa [%g1 + %g2] ASI, %i1; \
540 ldxa [%g1 + %g3] ASI, %i2; \
541 ldxa [%g1 + %g5] ASI, %i3; \
542 add %g1, 0x20, %g1; \
543 ldxa [%g1 + %g0] ASI, %i4; \
544 ldxa [%g1 + %g2] ASI, %i5; \
545 ldxa [%g1 + %g3] ASI, %i6; \
546 ldxa [%g1 + %g5] ASI, %i7; \
547 restored; \
548 retry; nop; nop; nop; nop; \
549 b,a,pt %xcc, fill_fixup_dax; \
550 b,a,pt %xcc, fill_fixup_mna; \
551 b,a,pt %xcc, fill_fixup;
552
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]553#define FILL_1_GENERIC_RTRAP \
554user_rtt_fill_64bit: \
555 ldxa [%sp + STACK_BIAS + 0x00] %asi, %l0; \
556 ldxa [%sp + STACK_BIAS + 0x08] %asi, %l1; \
557 ldxa [%sp + STACK_BIAS + 0x10] %asi, %l2; \
558 ldxa [%sp + STACK_BIAS + 0x18] %asi, %l3; \
559 ldxa [%sp + STACK_BIAS + 0x20] %asi, %l4; \
560 ldxa [%sp + STACK_BIAS + 0x28] %asi, %l5; \
561 ldxa [%sp + STACK_BIAS + 0x30] %asi, %l6; \
562 ldxa [%sp + STACK_BIAS + 0x38] %asi, %l7; \
563 ldxa [%sp + STACK_BIAS + 0x40] %asi, %i0; \
564 ldxa [%sp + STACK_BIAS + 0x48] %asi, %i1; \
565 ldxa [%sp + STACK_BIAS + 0x50] %asi, %i2; \
566 ldxa [%sp + STACK_BIAS + 0x58] %asi, %i3; \
567 ldxa [%sp + STACK_BIAS + 0x60] %asi, %i4; \
568 ldxa [%sp + STACK_BIAS + 0x68] %asi, %i5; \
569 ldxa [%sp + STACK_BIAS + 0x70] %asi, %i6; \
570 ldxa [%sp + STACK_BIAS + 0x78] %asi, %i7; \
571 ba,pt %xcc, user_rtt_pre_restore; \
572 restored; \
573 nop; nop; nop; nop; nop; nop; \
574 nop; nop; nop; nop; nop; \
575 ba,a,pt %xcc, user_rtt_fill_fixup; \
576 ba,a,pt %xcc, user_rtt_fill_fixup; \
577 ba,a,pt %xcc, user_rtt_fill_fixup;
578
579
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]580/* Normal 32bit fill */
581#define FILL_2_GENERIC(ASI) \
582 srl %sp, 0, %sp; \
583 lduwa [%sp + %g0] ASI, %l0; \
584 mov 0x04, %g2; \
585 mov 0x08, %g3; \
586 lduwa [%sp + %g2] ASI, %l1; \
587 mov 0x0c, %g5; \
588 lduwa [%sp + %g3] ASI, %l2; \
589 lduwa [%sp + %g5] ASI, %l3; \
590 add %sp, 0x10, %g1; \
591 lduwa [%g1 + %g0] ASI, %l4; \
592 lduwa [%g1 + %g2] ASI, %l5; \
593 lduwa [%g1 + %g3] ASI, %l6; \
594 lduwa [%g1 + %g5] ASI, %l7; \
595 add %g1, 0x10, %g1; \
596 lduwa [%g1 + %g0] ASI, %i0; \
597 lduwa [%g1 + %g2] ASI, %i1; \
598 lduwa [%g1 + %g3] ASI, %i2; \
599 lduwa [%g1 + %g5] ASI, %i3; \
600 add %g1, 0x10, %g1; \
601 lduwa [%g1 + %g0] ASI, %i4; \
602 lduwa [%g1 + %g2] ASI, %i5; \
603 lduwa [%g1 + %g3] ASI, %i6; \
604 lduwa [%g1 + %g5] ASI, %i7; \
605 restored; \
606 retry; nop; nop; nop; nop; \
607 b,a,pt %xcc, fill_fixup_dax; \
608 b,a,pt %xcc, fill_fixup_mna; \
609 b,a,pt %xcc, fill_fixup;
610
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]611#define FILL_2_GENERIC_RTRAP \
612user_rtt_fill_32bit: \
613 srl %sp, 0, %sp; \
614 lduwa [%sp + 0x00] %asi, %l0; \
615 lduwa [%sp + 0x04] %asi, %l1; \
616 lduwa [%sp + 0x08] %asi, %l2; \
617 lduwa [%sp + 0x0c] %asi, %l3; \
618 lduwa [%sp + 0x10] %asi, %l4; \
619 lduwa [%sp + 0x14] %asi, %l5; \
620 lduwa [%sp + 0x18] %asi, %l6; \
621 lduwa [%sp + 0x1c] %asi, %l7; \
622 lduwa [%sp + 0x20] %asi, %i0; \
623 lduwa [%sp + 0x24] %asi, %i1; \
624 lduwa [%sp + 0x28] %asi, %i2; \
625 lduwa [%sp + 0x2c] %asi, %i3; \
626 lduwa [%sp + 0x30] %asi, %i4; \
627 lduwa [%sp + 0x34] %asi, %i5; \
628 lduwa [%sp + 0x38] %asi, %i6; \
629 lduwa [%sp + 0x3c] %asi, %i7; \
630 ba,pt %xcc, user_rtt_pre_restore; \
631 restored; \
632 nop; nop; nop; nop; nop; \
633 nop; nop; nop; nop; nop; \
634 ba,a,pt %xcc, user_rtt_fill_fixup; \
635 ba,a,pt %xcc, user_rtt_fill_fixup; \
636 ba,a,pt %xcc, user_rtt_fill_fixup;
637
638
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]639#define FILL_1_NORMAL FILL_1_GENERIC(ASI_AIUP)
640#define FILL_2_NORMAL FILL_2_GENERIC(ASI_AIUP)
641#define FILL_3_NORMAL FILL_0_NORMAL
642#define FILL_4_NORMAL FILL_0_NORMAL
643#define FILL_5_NORMAL FILL_0_NORMAL
644#define FILL_6_NORMAL FILL_0_NORMAL
645#define FILL_7_NORMAL FILL_0_NORMAL
646
647#define FILL_0_OTHER FILL_0_NORMAL
648#define FILL_1_OTHER FILL_1_GENERIC(ASI_AIUS)
649#define FILL_2_OTHER FILL_2_GENERIC(ASI_AIUS)
650#define FILL_3_OTHER FILL_3_NORMAL
651#define FILL_4_OTHER FILL_4_NORMAL
652#define FILL_5_OTHER FILL_5_NORMAL
653#define FILL_6_OTHER FILL_6_NORMAL
654#define FILL_7_OTHER FILL_7_NORMAL
655
656#endif /* !(_SPARC64_TTABLE_H) */