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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
2 */
Dave Airlie0d6aa602006-01-02 20:14:23 +11003/*
Dave Airliebc54fd12005-06-23 22:46:46 +10004 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07005 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * All Rights Reserved.
Dave Airliebc54fd12005-06-23 22:46:46 +10007 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the
10 * "Software"), to deal in the Software without restriction, including
11 * without limitation the rights to use, copy, modify, merge, publish,
12 * distribute, sub license, and/or sell copies of the Software, and to
13 * permit persons to whom the Software is furnished to do so, subject to
14 * the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the
17 * next paragraph) shall be included in all copies or substantial portions
18 * of the Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
21 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
23 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
24 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
25 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
26 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 *
Dave Airlie0d6aa602006-01-02 20:14:23 +110028 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070029
Jesse Barnes5669fca2009-02-17 15:13:31 -080030#include <linux/device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070031#include "drmP.h"
32#include "drm.h"
33#include "i915_drm.h"
34#include "i915_drv.h"
Kenneth Graunkef49f0582010-09-11 01:19:14 -070035#include "intel_drv.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070036
Jesse Barnes79e53942008-11-07 14:24:08 -080037#include <linux/console.h>
Zhao Yakui354ff962009-07-08 14:13:12 +080038#include "drm_crtc_helper.h"
Jesse Barnes79e53942008-11-07 14:24:08 -080039
Kyle McMartind6073d72009-05-26 12:27:34 -040040static int i915_modeset = -1;
Jesse Barnes79e53942008-11-07 14:24:08 -080041module_param_named(modeset, i915_modeset, int, 0400);
42
43unsigned int i915_fbpercrtc = 0;
44module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
Linus Torvalds1da177e2005-04-16 15:20:36 -070045
Jesse Barnes652c3932009-08-17 13:31:43 -070046unsigned int i915_powersave = 1;
47module_param_named(powersave, i915_powersave, int, 0400);
48
Jesse Barnes33814342010-01-14 20:48:02 +000049unsigned int i915_lvds_downclock = 0;
50module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
51
Kristian Høgsberg112b7152009-01-04 16:55:33 -050052static struct drm_driver driver;
Zhenyu Wang1f7a6e32010-02-23 14:05:24 +080053extern int intel_agp_enabled;
Kristian Høgsberg112b7152009-01-04 16:55:33 -050054
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -050055#define INTEL_VGA_DEVICE(id, info) { \
Kristian Høgsberg49ae35f2009-12-16 15:16:15 -050056 .class = PCI_CLASS_DISPLAY_VGA << 8, \
57 .class_mask = 0xffff00, \
58 .vendor = 0x8086, \
59 .device = id, \
60 .subvendor = PCI_ANY_ID, \
61 .subdevice = PCI_ANY_ID, \
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -050062 .driver_data = (unsigned long) info }
Kristian Høgsberg49ae35f2009-12-16 15:16:15 -050063
Tobias Klauser9a7e8492010-05-20 10:33:46 +020064static const struct intel_device_info intel_i830_info = {
Chris Wilsona6c45cf2010-09-17 00:32:17 +010065 .gen = 2, .is_mobile = 1, .cursor_needs_physical = 1,
Chris Wilson315781482010-08-12 09:42:51 +010066 .has_overlay = 1, .overlay_needs_physical = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -050067};
68
Tobias Klauser9a7e8492010-05-20 10:33:46 +020069static const struct intel_device_info intel_845g_info = {
Chris Wilsona6c45cf2010-09-17 00:32:17 +010070 .gen = 2,
Chris Wilson315781482010-08-12 09:42:51 +010071 .has_overlay = 1, .overlay_needs_physical = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -050072};
73
Tobias Klauser9a7e8492010-05-20 10:33:46 +020074static const struct intel_device_info intel_i85x_info = {
Chris Wilsona6c45cf2010-09-17 00:32:17 +010075 .gen = 2, .is_i85x = 1, .is_mobile = 1,
Adam Jackson5ce8ba72010-04-15 14:03:30 -040076 .cursor_needs_physical = 1,
Chris Wilson315781482010-08-12 09:42:51 +010077 .has_overlay = 1, .overlay_needs_physical = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -050078};
79
Tobias Klauser9a7e8492010-05-20 10:33:46 +020080static const struct intel_device_info intel_i865g_info = {
Chris Wilsona6c45cf2010-09-17 00:32:17 +010081 .gen = 2,
Chris Wilson315781482010-08-12 09:42:51 +010082 .has_overlay = 1, .overlay_needs_physical = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -050083};
84
Tobias Klauser9a7e8492010-05-20 10:33:46 +020085static const struct intel_device_info intel_i915g_info = {
Chris Wilsona6c45cf2010-09-17 00:32:17 +010086 .gen = 3, .is_i915g = 1, .cursor_needs_physical = 1,
Chris Wilson315781482010-08-12 09:42:51 +010087 .has_overlay = 1, .overlay_needs_physical = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -050088};
Tobias Klauser9a7e8492010-05-20 10:33:46 +020089static const struct intel_device_info intel_i915gm_info = {
Chris Wilsona6c45cf2010-09-17 00:32:17 +010090 .gen = 3, .is_mobile = 1,
Kristian Høgsbergb295d1b2009-12-16 15:16:17 -050091 .cursor_needs_physical = 1,
Chris Wilson315781482010-08-12 09:42:51 +010092 .has_overlay = 1, .overlay_needs_physical = 1,
Chris Wilsona6c45cf2010-09-17 00:32:17 +010093 .supports_tv = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -050094};
Tobias Klauser9a7e8492010-05-20 10:33:46 +020095static const struct intel_device_info intel_i945g_info = {
Chris Wilsona6c45cf2010-09-17 00:32:17 +010096 .gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1,
Chris Wilson315781482010-08-12 09:42:51 +010097 .has_overlay = 1, .overlay_needs_physical = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -050098};
Tobias Klauser9a7e8492010-05-20 10:33:46 +020099static const struct intel_device_info intel_i945gm_info = {
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100100 .gen = 3, .is_i945gm = 1, .is_mobile = 1,
Kristian Høgsbergb295d1b2009-12-16 15:16:17 -0500101 .has_hotplug = 1, .cursor_needs_physical = 1,
Chris Wilson315781482010-08-12 09:42:51 +0100102 .has_overlay = 1, .overlay_needs_physical = 1,
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100103 .supports_tv = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500104};
105
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200106static const struct intel_device_info intel_i965g_info = {
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100107 .gen = 4, .is_broadwater = 1,
Chris Wilsonc96c3a8c2010-08-11 09:59:24 +0100108 .has_hotplug = 1,
Chris Wilson315781482010-08-12 09:42:51 +0100109 .has_overlay = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500110};
111
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200112static const struct intel_device_info intel_i965gm_info = {
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100113 .gen = 4, .is_crestline = 1,
Chris Wilsonc96c3a8c2010-08-11 09:59:24 +0100114 .is_mobile = 1, .has_fbc = 1, .has_rc6 = 1, .has_hotplug = 1,
Chris Wilson315781482010-08-12 09:42:51 +0100115 .has_overlay = 1,
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100116 .supports_tv = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500117};
118
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200119static const struct intel_device_info intel_g33_info = {
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100120 .gen = 3, .is_g33 = 1,
Chris Wilsonc96c3a8c2010-08-11 09:59:24 +0100121 .need_gfx_hws = 1, .has_hotplug = 1,
Chris Wilson315781482010-08-12 09:42:51 +0100122 .has_overlay = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500123};
124
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200125static const struct intel_device_info intel_g45_info = {
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100126 .gen = 4, .is_g4x = 1, .need_gfx_hws = 1,
Chris Wilsonc96c3a8c2010-08-11 09:59:24 +0100127 .has_pipe_cxsr = 1, .has_hotplug = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500128};
129
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200130static const struct intel_device_info intel_gm45_info = {
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100131 .gen = 4, .is_g4x = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500132 .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
Chris Wilsonc96c3a8c2010-08-11 09:59:24 +0100133 .has_pipe_cxsr = 1, .has_hotplug = 1,
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100134 .supports_tv = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500135};
136
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200137static const struct intel_device_info intel_pineview_info = {
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100138 .gen = 3, .is_g33 = 1, .is_pineview = 1, .is_mobile = 1,
Chris Wilsonc96c3a8c2010-08-11 09:59:24 +0100139 .need_gfx_hws = 1, .has_hotplug = 1,
Chris Wilson315781482010-08-12 09:42:51 +0100140 .has_overlay = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500141};
142
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200143static const struct intel_device_info intel_ironlake_d_info = {
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100144 .gen = 5, .is_ironlake = 1,
Chris Wilsonc96c3a8c2010-08-11 09:59:24 +0100145 .need_gfx_hws = 1, .has_pipe_cxsr = 1, .has_hotplug = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500146};
147
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200148static const struct intel_device_info intel_ironlake_m_info = {
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100149 .gen = 5, .is_ironlake = 1, .is_mobile = 1,
Chris Wilsonc96c3a8c2010-08-11 09:59:24 +0100150 .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1, .has_hotplug = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500151};
152
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200153static const struct intel_device_info intel_sandybridge_d_info = {
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100154 .gen = 6,
Chris Wilsonc96c3a8c2010-08-11 09:59:24 +0100155 .need_gfx_hws = 1, .has_hotplug = 1,
Eric Anholtf6e450a2009-11-02 12:08:22 -0800156};
157
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200158static const struct intel_device_info intel_sandybridge_m_info = {
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100159 .gen = 6, .is_mobile = 1,
Chris Wilsonc96c3a8c2010-08-11 09:59:24 +0100160 .need_gfx_hws = 1, .has_hotplug = 1,
Eric Anholta13e4092010-01-07 15:08:18 -0800161};
162
Chris Wilson6103da02010-07-05 18:01:47 +0100163static const struct pci_device_id pciidlist[] = { /* aka */
164 INTEL_VGA_DEVICE(0x3577, &intel_i830_info), /* I830_M */
165 INTEL_VGA_DEVICE(0x2562, &intel_845g_info), /* 845_G */
166 INTEL_VGA_DEVICE(0x3582, &intel_i85x_info), /* I855_GM */
Adam Jackson5ce8ba72010-04-15 14:03:30 -0400167 INTEL_VGA_DEVICE(0x358e, &intel_i85x_info),
Chris Wilson6103da02010-07-05 18:01:47 +0100168 INTEL_VGA_DEVICE(0x2572, &intel_i865g_info), /* I865_G */
169 INTEL_VGA_DEVICE(0x2582, &intel_i915g_info), /* I915_G */
170 INTEL_VGA_DEVICE(0x258a, &intel_i915g_info), /* E7221_G */
171 INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info), /* I915_GM */
172 INTEL_VGA_DEVICE(0x2772, &intel_i945g_info), /* I945_G */
173 INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info), /* I945_GM */
174 INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info), /* I945_GME */
175 INTEL_VGA_DEVICE(0x2972, &intel_i965g_info), /* I946_GZ */
176 INTEL_VGA_DEVICE(0x2982, &intel_i965g_info), /* G35_G */
177 INTEL_VGA_DEVICE(0x2992, &intel_i965g_info), /* I965_Q */
178 INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info), /* I965_G */
179 INTEL_VGA_DEVICE(0x29b2, &intel_g33_info), /* Q35_G */
180 INTEL_VGA_DEVICE(0x29c2, &intel_g33_info), /* G33_G */
181 INTEL_VGA_DEVICE(0x29d2, &intel_g33_info), /* Q33_G */
182 INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info), /* I965_GM */
183 INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info), /* I965_GME */
184 INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info), /* GM45_G */
185 INTEL_VGA_DEVICE(0x2e02, &intel_g45_info), /* IGD_E_G */
186 INTEL_VGA_DEVICE(0x2e12, &intel_g45_info), /* Q45_G */
187 INTEL_VGA_DEVICE(0x2e22, &intel_g45_info), /* G45_G */
188 INTEL_VGA_DEVICE(0x2e32, &intel_g45_info), /* G41_G */
189 INTEL_VGA_DEVICE(0x2e42, &intel_g45_info), /* B43_G */
Chris Wilson41a51422010-09-17 08:22:30 +0100190 INTEL_VGA_DEVICE(0x2e92, &intel_g45_info), /* B43_G.1 */
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500191 INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
192 INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
193 INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
194 INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
Eric Anholtf6e450a2009-11-02 12:08:22 -0800195 INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info),
Zhenyu Wang85540482010-09-07 13:45:32 +0800196 INTEL_VGA_DEVICE(0x0112, &intel_sandybridge_d_info),
197 INTEL_VGA_DEVICE(0x0122, &intel_sandybridge_d_info),
Eric Anholta13e4092010-01-07 15:08:18 -0800198 INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info),
Zhenyu Wang85540482010-09-07 13:45:32 +0800199 INTEL_VGA_DEVICE(0x0116, &intel_sandybridge_m_info),
Zhenyu Wang4fefe432010-08-19 09:46:16 +0800200 INTEL_VGA_DEVICE(0x0126, &intel_sandybridge_m_info),
Zhenyu Wang85540482010-09-07 13:45:32 +0800201 INTEL_VGA_DEVICE(0x010A, &intel_sandybridge_d_info),
Kristian Høgsberg49ae35f2009-12-16 15:16:15 -0500202 {0, 0, 0}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700203};
204
Jesse Barnes79e53942008-11-07 14:24:08 -0800205#if defined(CONFIG_DRM_I915_KMS)
206MODULE_DEVICE_TABLE(pci, pciidlist);
207#endif
208
Zhenyu Wang3bad0782010-04-07 16:15:53 +0800209#define INTEL_PCH_DEVICE_ID_MASK 0xff00
210#define INTEL_PCH_CPT_DEVICE_ID_TYPE 0x1c00
211
212void intel_detect_pch (struct drm_device *dev)
213{
214 struct drm_i915_private *dev_priv = dev->dev_private;
215 struct pci_dev *pch;
216
217 /*
218 * The reason to probe ISA bridge instead of Dev31:Fun0 is to
219 * make graphics device passthrough work easy for VMM, that only
220 * need to expose ISA bridge to let driver know the real hardware
221 * underneath. This is a requirement from virtualization team.
222 */
223 pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL);
224 if (pch) {
225 if (pch->vendor == PCI_VENDOR_ID_INTEL) {
226 int id;
227 id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
228
229 if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
230 dev_priv->pch_type = PCH_CPT;
231 DRM_DEBUG_KMS("Found CougarPoint PCH\n");
232 }
233 }
234 pci_dev_put(pch);
235 }
236}
237
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100238static int i915_drm_freeze(struct drm_device *dev)
239{
Rafael J. Wysocki61caf872010-02-18 23:06:27 +0100240 struct drm_i915_private *dev_priv = dev->dev_private;
241
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100242 pci_save_state(dev->pdev);
243
244 /* If KMS is active, we do the leavevt stuff here */
245 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
246 int error = i915_gem_idle(dev);
247 if (error) {
248 dev_err(&dev->pdev->dev,
249 "GEM idle failed, resume might fail\n");
250 return error;
251 }
252 drm_irq_uninstall(dev);
253 }
254
255 i915_save_state(dev);
256
Chris Wilson44834a62010-08-19 16:09:23 +0100257 intel_opregion_fini(dev);
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100258
259 /* Modeset on resume, not lid events */
260 dev_priv->modeset_on_lid = 0;
Rafael J. Wysocki61caf872010-02-18 23:06:27 +0100261
262 return 0;
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100263}
264
Dave Airlie6a9ee8a2010-02-01 15:38:10 +1000265int i915_suspend(struct drm_device *dev, pm_message_t state)
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100266{
267 int error;
268
269 if (!dev || !dev->dev_private) {
270 DRM_ERROR("dev: %p\n", dev);
Keith Packard1ae8c0a2009-06-28 15:42:17 -0700271 DRM_ERROR("DRM not initialized, aborting suspend.\n");
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000272 return -ENODEV;
273 }
274
Dave Airlieb932ccb2008-02-20 10:02:20 +1000275 if (state.event == PM_EVENT_PRETHAW)
276 return 0;
277
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100278 error = i915_drm_freeze(dev);
279 if (error)
280 return error;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000281
Dave Airlieb932ccb2008-02-20 10:02:20 +1000282 if (state.event == PM_EVENT_SUSPEND) {
283 /* Shut down the device */
284 pci_disable_device(dev->pdev);
285 pci_set_power_state(dev->pdev, PCI_D3hot);
286 }
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000287
288 return 0;
289}
290
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100291static int i915_drm_thaw(struct drm_device *dev)
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000292{
Jesse Barnes5669fca2009-02-17 15:13:31 -0800293 struct drm_i915_private *dev_priv = dev->dev_private;
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100294 int error = 0;
Matthew Garrett8ee1c3d2008-08-05 19:37:25 +0100295
Rafael J. Wysocki61caf872010-02-18 23:06:27 +0100296 i915_restore_state(dev);
Chris Wilson44834a62010-08-19 16:09:23 +0100297 intel_opregion_setup(dev);
Rafael J. Wysocki61caf872010-02-18 23:06:27 +0100298
Jesse Barnes5669fca2009-02-17 15:13:31 -0800299 /* KMS EnterVT equivalent */
300 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
301 mutex_lock(&dev->struct_mutex);
302 dev_priv->mm.suspended = 0;
303
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100304 error = i915_gem_init_ringbuffer(dev);
Jesse Barnes5669fca2009-02-17 15:13:31 -0800305 mutex_unlock(&dev->struct_mutex);
Jesse Barnes226485e2009-02-23 15:41:09 -0800306
307 drm_irq_install(dev);
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100308
Zhao Yakui354ff962009-07-08 14:13:12 +0800309 /* Resume the modeset for every activated CRTC */
310 drm_helper_resume_force_mode(dev);
311 }
Jesse Barnes5669fca2009-02-17 15:13:31 -0800312
Chris Wilson44834a62010-08-19 16:09:23 +0100313 intel_opregion_init(dev);
314
Linus Torvaldsc9354c82009-11-02 09:29:55 -0800315 dev_priv->modeset_on_lid = 0;
Jesse Barnes06891e22009-09-14 10:58:48 -0700316
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100317 return error;
318}
319
Dave Airlie6a9ee8a2010-02-01 15:38:10 +1000320int i915_resume(struct drm_device *dev)
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100321{
322 if (pci_enable_device(dev->pdev))
323 return -EIO;
324
325 pci_set_master(dev->pdev);
326
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100327 return i915_drm_thaw(dev);
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000328}
329
Kenneth Graunkef49f0582010-09-11 01:19:14 -0700330static int i965_reset_complete(struct drm_device *dev)
331{
332 u8 gdrst;
Kenneth Graunkeeeccdca2010-09-11 01:24:50 -0700333 pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst);
Kenneth Graunkef49f0582010-09-11 01:19:14 -0700334 return gdrst & 0x1;
335}
336
Kenneth Graunke0573ed42010-09-11 03:17:19 -0700337static int i965_do_reset(struct drm_device *dev, u8 flags)
338{
339 u8 gdrst;
340
341 pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst);
342 pci_write_config_byte(dev->pdev, I965_GDRST, gdrst | flags | 0x1);
343
344 return wait_for(i965_reset_complete(dev), 500);
345}
346
347static int ironlake_do_reset(struct drm_device *dev, u8 flags)
348{
349 struct drm_i915_private *dev_priv = dev->dev_private;
350 u32 gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR);
351 I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, gdrst | flags | 0x1);
352 return wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500);
353}
354
Ben Gamari11ed50e2009-09-14 17:48:45 -0400355/**
356 * i965_reset - reset chip after a hang
357 * @dev: drm device to reset
358 * @flags: reset domains
359 *
360 * Reset the chip. Useful if a hang is detected. Returns zero on successful
361 * reset or otherwise an error code.
362 *
363 * Procedure is fairly simple:
364 * - reset the chip using the reset reg
365 * - re-init context state
366 * - re-init hardware status page
367 * - re-init ring buffer
368 * - re-init interrupt state
369 * - re-init display
370 */
Chris Wilsonf803aa52010-09-19 12:38:26 +0100371int i915_reset(struct drm_device *dev, u8 flags)
Ben Gamari11ed50e2009-09-14 17:48:45 -0400372{
373 drm_i915_private_t *dev_priv = dev->dev_private;
Ben Gamari11ed50e2009-09-14 17:48:45 -0400374 /*
375 * We really should only reset the display subsystem if we actually
376 * need to
377 */
378 bool need_display = true;
Kenneth Graunke0573ed42010-09-11 03:17:19 -0700379 int ret;
Ben Gamari11ed50e2009-09-14 17:48:45 -0400380
381 mutex_lock(&dev->struct_mutex);
382
383 /*
384 * Clear request list
385 */
Chris Wilsonb09a1fe2010-07-23 23:18:49 +0100386 i915_gem_retire_requests(dev);
Ben Gamari11ed50e2009-09-14 17:48:45 -0400387
Chris Wilson9375e442010-09-19 12:21:28 +0100388 /* Remove anything from the flushing lists. The GPU cache is likely
389 * to be lost on reset along with the data, so simply move the
390 * lost bo to the inactive list.
391 */
392 i915_gem_reset_flushing_list(dev);
393
Chris Wilson77f01232010-09-19 12:31:36 +0100394 /* Move everything out of the GPU domains to ensure we do any
395 * necessary invalidation upon reuse.
396 */
397 i915_gem_reset_inactive_gpu_domains(dev);
398
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100399 /*
Kenneth Graunkef49f0582010-09-11 01:19:14 -0700400 * Set the domains we want to reset (GRDOM/bits 2 and 3) as
401 * well as the reset bit (GR/bit 0). Setting the GR bit
402 * triggers the reset; when done, the hardware will clear it.
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100403 */
Chris Wilsonf803aa52010-09-19 12:38:26 +0100404 ret = -ENODEV;
405 switch (INTEL_INFO(dev)->gen) {
406 case 5:
Kenneth Graunke0573ed42010-09-11 03:17:19 -0700407 ret = ironlake_do_reset(dev, flags);
Chris Wilsonf803aa52010-09-19 12:38:26 +0100408 break;
409 case 4:
Kenneth Graunke0573ed42010-09-11 03:17:19 -0700410 ret = i965_do_reset(dev, flags);
Chris Wilsonf803aa52010-09-19 12:38:26 +0100411 break;
412 }
Kenneth Graunke0573ed42010-09-11 03:17:19 -0700413 if (ret) {
Chris Wilsonf803aa52010-09-19 12:38:26 +0100414 DRM_ERROR("Failed to reset chip.\n");
Daniel J Bluemanf953c932010-05-17 14:23:52 +0100415 mutex_unlock(&dev->struct_mutex);
Chris Wilsonf803aa52010-09-19 12:38:26 +0100416 return ret;
Ben Gamari11ed50e2009-09-14 17:48:45 -0400417 }
418
419 /* Ok, now get things going again... */
420
421 /*
422 * Everything depends on having the GTT running, so we need to start
423 * there. Fortunately we don't need to do this unless we reset the
424 * chip at a PCI level.
425 *
426 * Next we need to restore the context, but we don't use those
427 * yet either...
428 *
429 * Ring buffer needs to be re-initialized in the KMS case, or if X
430 * was running at the time of the reset (i.e. we weren't VT
431 * switched away).
432 */
433 if (drm_core_check_feature(dev, DRIVER_MODESET) ||
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800434 !dev_priv->mm.suspended) {
435 struct intel_ring_buffer *ring = &dev_priv->render_ring;
Ben Gamari11ed50e2009-09-14 17:48:45 -0400436 dev_priv->mm.suspended = 0;
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800437 ring->init(dev, ring);
Ben Gamari11ed50e2009-09-14 17:48:45 -0400438 mutex_unlock(&dev->struct_mutex);
439 drm_irq_uninstall(dev);
440 drm_irq_install(dev);
441 mutex_lock(&dev->struct_mutex);
442 }
443
Ben Gamari11ed50e2009-09-14 17:48:45 -0400444 mutex_unlock(&dev->struct_mutex);
Chris Wilson9fd98142010-09-18 08:08:06 +0100445
446 /*
447 * Perform a full modeset as on later generations, e.g. Ironlake, we may
448 * need to retrain the display link and cannot just restore the register
449 * values.
450 */
451 if (need_display) {
452 mutex_lock(&dev->mode_config.mutex);
453 drm_helper_resume_force_mode(dev);
454 mutex_unlock(&dev->mode_config.mutex);
455 }
456
Ben Gamari11ed50e2009-09-14 17:48:45 -0400457 return 0;
458}
459
460
Kristian Høgsberg112b7152009-01-04 16:55:33 -0500461static int __devinit
462i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
463{
Jordan Crousedcdb1672010-05-27 13:40:25 -0600464 return drm_get_pci_dev(pdev, ent, &driver);
Kristian Høgsberg112b7152009-01-04 16:55:33 -0500465}
466
467static void
468i915_pci_remove(struct pci_dev *pdev)
469{
470 struct drm_device *dev = pci_get_drvdata(pdev);
471
472 drm_put_dev(dev);
473}
474
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100475static int i915_pm_suspend(struct device *dev)
Kristian Høgsberg112b7152009-01-04 16:55:33 -0500476{
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100477 struct pci_dev *pdev = to_pci_dev(dev);
478 struct drm_device *drm_dev = pci_get_drvdata(pdev);
479 int error;
Kristian Høgsberg112b7152009-01-04 16:55:33 -0500480
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100481 if (!drm_dev || !drm_dev->dev_private) {
482 dev_err(dev, "DRM not initialized, aborting suspend.\n");
483 return -ENODEV;
484 }
Kristian Høgsberg112b7152009-01-04 16:55:33 -0500485
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100486 error = i915_drm_freeze(drm_dev);
487 if (error)
488 return error;
Kristian Høgsberg112b7152009-01-04 16:55:33 -0500489
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100490 pci_disable_device(pdev);
491 pci_set_power_state(pdev, PCI_D3hot);
Zhenyu Wangcbda12d2009-12-16 13:36:10 +0800492
Zhenyu Wangcbda12d2009-12-16 13:36:10 +0800493 return 0;
494}
495
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100496static int i915_pm_resume(struct device *dev)
Zhenyu Wangcbda12d2009-12-16 13:36:10 +0800497{
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100498 struct pci_dev *pdev = to_pci_dev(dev);
499 struct drm_device *drm_dev = pci_get_drvdata(pdev);
500
501 return i915_resume(drm_dev);
Zhenyu Wangcbda12d2009-12-16 13:36:10 +0800502}
503
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100504static int i915_pm_freeze(struct device *dev)
Zhenyu Wangcbda12d2009-12-16 13:36:10 +0800505{
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100506 struct pci_dev *pdev = to_pci_dev(dev);
507 struct drm_device *drm_dev = pci_get_drvdata(pdev);
508
509 if (!drm_dev || !drm_dev->dev_private) {
510 dev_err(dev, "DRM not initialized, aborting suspend.\n");
511 return -ENODEV;
512 }
513
514 return i915_drm_freeze(drm_dev);
515}
516
517static int i915_pm_thaw(struct device *dev)
518{
519 struct pci_dev *pdev = to_pci_dev(dev);
520 struct drm_device *drm_dev = pci_get_drvdata(pdev);
521
522 return i915_drm_thaw(drm_dev);
523}
524
525static int i915_pm_poweroff(struct device *dev)
526{
527 struct pci_dev *pdev = to_pci_dev(dev);
528 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100529
Rafael J. Wysocki61caf872010-02-18 23:06:27 +0100530 return i915_drm_freeze(drm_dev);
Zhenyu Wangcbda12d2009-12-16 13:36:10 +0800531}
532
Chris Wilsonb4b78d12010-06-06 15:40:20 +0100533static const struct dev_pm_ops i915_pm_ops = {
Zhenyu Wangcbda12d2009-12-16 13:36:10 +0800534 .suspend = i915_pm_suspend,
535 .resume = i915_pm_resume,
536 .freeze = i915_pm_freeze,
537 .thaw = i915_pm_thaw,
538 .poweroff = i915_pm_poweroff,
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100539 .restore = i915_pm_resume,
Zhenyu Wangcbda12d2009-12-16 13:36:10 +0800540};
541
Jesse Barnesde151cf2008-11-12 10:03:55 -0800542static struct vm_operations_struct i915_gem_vm_ops = {
543 .fault = i915_gem_fault,
Jesse Barnesab00b3e2009-02-11 14:01:46 -0800544 .open = drm_gem_vm_open,
545 .close = drm_gem_vm_close,
Jesse Barnesde151cf2008-11-12 10:03:55 -0800546};
547
Linus Torvalds1da177e2005-04-16 15:20:36 -0700548static struct drm_driver driver = {
Dave Airlie792d2b92005-11-11 23:30:27 +1100549 /* don't use mtrr's here, the Xserver or user space app should
550 * deal with them for intel hardware.
551 */
Eric Anholt673a3942008-07-30 12:06:12 -0700552 .driver_features =
553 DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/
554 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
Dave Airlie22eae942005-11-10 22:16:34 +1100555 .load = i915_driver_load,
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000556 .unload = i915_driver_unload,
Eric Anholt673a3942008-07-30 12:06:12 -0700557 .open = i915_driver_open,
Dave Airlie22eae942005-11-10 22:16:34 +1100558 .lastclose = i915_driver_lastclose,
559 .preclose = i915_driver_preclose,
Eric Anholt673a3942008-07-30 12:06:12 -0700560 .postclose = i915_driver_postclose,
Rafael J. Wysockid8e29202010-01-09 00:45:33 +0100561
562 /* Used in place of i915_pm_ops for non-DRIVER_MODESET */
563 .suspend = i915_suspend,
564 .resume = i915_resume,
565
Dave Airliecda17382005-07-10 17:31:26 +1000566 .device_is_agp = i915_driver_device_is_agp,
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700567 .enable_vblank = i915_enable_vblank,
568 .disable_vblank = i915_disable_vblank,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700569 .irq_preinstall = i915_driver_irq_preinstall,
570 .irq_postinstall = i915_driver_irq_postinstall,
571 .irq_uninstall = i915_driver_irq_uninstall,
572 .irq_handler = i915_driver_irq_handler,
573 .reclaim_buffers = drm_core_reclaim_buffers,
Dave Airlie7c1c2872008-11-28 14:22:24 +1000574 .master_create = i915_master_create,
575 .master_destroy = i915_master_destroy,
Ben Gamari955b12d2009-02-17 20:08:49 -0500576#if defined(CONFIG_DEBUG_FS)
Ben Gamari27c202a2009-07-01 22:26:52 -0400577 .debugfs_init = i915_debugfs_init,
578 .debugfs_cleanup = i915_debugfs_cleanup,
Ben Gamari955b12d2009-02-17 20:08:49 -0500579#endif
Eric Anholt673a3942008-07-30 12:06:12 -0700580 .gem_init_object = i915_gem_init_object,
581 .gem_free_object = i915_gem_free_object,
Jesse Barnesde151cf2008-11-12 10:03:55 -0800582 .gem_vm_ops = &i915_gem_vm_ops,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700583 .ioctls = i915_ioctls,
584 .fops = {
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000585 .owner = THIS_MODULE,
586 .open = drm_open,
587 .release = drm_release,
Arnd Bergmanned8b6702009-12-16 22:17:09 +0000588 .unlocked_ioctl = drm_ioctl,
Jesse Barnesde151cf2008-11-12 10:03:55 -0800589 .mmap = drm_gem_mmap,
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000590 .poll = drm_poll,
591 .fasync = drm_fasync,
Kristian Høgsbergc9a9c5e2009-09-12 04:33:34 +1000592 .read = drm_read,
Dave Airlie8ca7c1d2005-07-07 21:51:26 +1000593#ifdef CONFIG_COMPAT
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000594 .compat_ioctl = i915_compat_ioctl,
Dave Airlie8ca7c1d2005-07-07 21:51:26 +1000595#endif
Dave Airlie22eae942005-11-10 22:16:34 +1100596 },
597
Linus Torvalds1da177e2005-04-16 15:20:36 -0700598 .pci_driver = {
Dave Airlie22eae942005-11-10 22:16:34 +1100599 .name = DRIVER_NAME,
600 .id_table = pciidlist,
Kristian Høgsberg112b7152009-01-04 16:55:33 -0500601 .probe = i915_pci_probe,
602 .remove = i915_pci_remove,
Zhenyu Wangcbda12d2009-12-16 13:36:10 +0800603 .driver.pm = &i915_pm_ops,
Dave Airlie22eae942005-11-10 22:16:34 +1100604 },
Dave Airliebc5f4522007-11-05 12:50:58 +1000605
Dave Airlie22eae942005-11-10 22:16:34 +1100606 .name = DRIVER_NAME,
607 .desc = DRIVER_DESC,
608 .date = DRIVER_DATE,
609 .major = DRIVER_MAJOR,
610 .minor = DRIVER_MINOR,
611 .patchlevel = DRIVER_PATCHLEVEL,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700612};
613
614static int __init i915_init(void)
615{
Zhenyu Wang1f7a6e32010-02-23 14:05:24 +0800616 if (!intel_agp_enabled) {
617 DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
618 return -ENODEV;
619 }
620
Linus Torvalds1da177e2005-04-16 15:20:36 -0700621 driver.num_ioctls = i915_max_ioctl;
Jesse Barnes79e53942008-11-07 14:24:08 -0800622
Chris Wilson31169712009-09-14 16:50:28 +0100623 i915_gem_shrinker_init();
624
Jesse Barnes79e53942008-11-07 14:24:08 -0800625 /*
626 * If CONFIG_DRM_I915_KMS is set, default to KMS unless
627 * explicitly disabled with the module pararmeter.
628 *
629 * Otherwise, just follow the parameter (defaulting to off).
630 *
631 * Allow optional vga_text_mode_force boot option to override
632 * the default behavior.
633 */
634#if defined(CONFIG_DRM_I915_KMS)
635 if (i915_modeset != 0)
636 driver.driver_features |= DRIVER_MODESET;
637#endif
638 if (i915_modeset == 1)
639 driver.driver_features |= DRIVER_MODESET;
640
641#ifdef CONFIG_VGA_CONSOLE
642 if (vgacon_text_force() && i915_modeset == -1)
643 driver.driver_features &= ~DRIVER_MODESET;
644#endif
645
Jesse Barnesf97108d2010-01-29 11:27:07 -0800646 if (!(driver.driver_features & DRIVER_MODESET)) {
647 driver.suspend = i915_suspend;
648 driver.resume = i915_resume;
649 }
650
Linus Torvalds1da177e2005-04-16 15:20:36 -0700651 return drm_init(&driver);
652}
653
654static void __exit i915_exit(void)
655{
Chris Wilson31169712009-09-14 16:50:28 +0100656 i915_gem_shrinker_exit();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700657 drm_exit(&driver);
658}
659
660module_init(i915_init);
661module_exit(i915_exit);
662
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000663MODULE_AUTHOR(DRIVER_AUTHOR);
664MODULE_DESCRIPTION(DRIVER_DESC);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700665MODULE_LICENSE("GPL and additional rights");